[PATCH] D141756: [6/15][Clang][RISCV][NFC] Instructions with a mask destination register is always tail agnostic

Craig Topper via Phabricator via cfe-commits cfe-commits at lists.llvm.org
Tue Jan 17 16:36:13 PST 2023

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craig.topper accepted this revision.
craig.topper added a comment.

LGTM


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D141756/new/

https://reviews.llvm.org/D141756

Previous message: [PATCH] D141756: [6/15][Clang][RISCV][NFC] Instructions with a mask destination register is always tail agnostic
Next message: [PATCH] D141754: [5/15][Clang][RISCV][NFC] Remove extra attribute Policy::IntrinsicWithoutMU by reusing HasTailPolicy and HasMaskPolicy
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