[PATCH] D141796: [15/15][Clang][RISCV][NFC] Set data member under Policy as constants
Yueh-Ting (eop) Chen via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Sun Jan 15 09:57:50 PST 2023
eopXD created this revision.
eopXD added reviewers: craig.topper, kito-cheng, rogfer01, frasercrmck.
Herald added subscribers: VincentWu, vkmr, evandro, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, edward-jones, zzheng, jrtc27, shiva0217, niosHD, sabuasal, simoncook, johnrusso, rbar, asb, arichardson.
Herald added a project: All.
eopXD requested review of this revision.
Herald added subscribers: cfe-commits, pcwang-thead, MaskRay.
Herald added a project: clang.
The object is now correct by construction.
This is the 15th commit of a patch-set that aims to change the default policy
for RVV intrinsics from TAMU to TAMA.
Please refer to the cover letter in the 1st commit (D141573 <https://reviews.llvm.org/D141573>) for an
overview.
Depends on D141793 <https://reviews.llvm.org/D141793>.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D141796
Files:
clang/include/clang/Support/RISCVVIntrinsicUtils.h
clang/lib/Support/RISCVVIntrinsicUtils.cpp
Index: clang/lib/Support/RISCVVIntrinsicUtils.cpp
===================================================================
--- clang/lib/Support/RISCVVIntrinsicUtils.cpp
+++ clang/lib/Support/RISCVVIntrinsicUtils.cpp
@@ -1011,7 +1011,6 @@
};
if (PolicyAttrs.isUnspecified()) {
- PolicyAttrs.IsUnspecified = false;
if (IsMasked) {
Name += "_m";
if (HasPolicy)
Index: clang/include/clang/Support/RISCVVIntrinsicUtils.h
===================================================================
--- clang/include/clang/Support/RISCVVIntrinsicUtils.h
+++ clang/include/clang/Support/RISCVVIntrinsicUtils.h
@@ -93,13 +93,15 @@
};
struct Policy {
- bool IsUnspecified = false;
+ const bool IsUnspecified = false;
enum PolicyType {
Undisturbed,
Agnostic,
};
- PolicyType TailPolicy = Agnostic;
- PolicyType MaskPolicy = Agnostic;
+ // The default assumption for an RVV instruction is TAMA, as an undisturbed
+ // policy generally will affect the performance of an out-of-order core.
+ const PolicyType TailPolicy = Agnostic;
+ const PolicyType MaskPolicy = Agnostic;
Policy() : IsUnspecified(true) {}
Policy(PolicyType TailPolicy) : TailPolicy(TailPolicy) {}
Policy(PolicyType TailPolicy, PolicyType MaskPolicy)
@@ -419,7 +421,6 @@
return IntrinsicTypes;
}
Policy getPolicyAttrs() const {
- assert(PolicyAttrs.IsUnspecified == false);
return PolicyAttrs;
}
unsigned getPolicyAttrsBits() const {
@@ -430,8 +431,6 @@
// constexpr unsigned RVV_VMA = 0x2;
// int PolicyAttrs = 0;
- assert(PolicyAttrs.IsUnspecified == false);
-
if (PolicyAttrs.isTUMAPolicy())
return 2;
if (PolicyAttrs.isTAMAPolicy())
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