[PATCH] D141762: [WIP][8/N][Clang][RISCV][NFC] Always emit PolicyAttr in riscv_vector_builtin_cg.inc

Yueh-Ting (eop) Chen via Phabricator via cfe-commits cfe-commits at lists.llvm.org
Sat Jan 14 11:15:49 PST 2023


eopXD updated this revision to Diff 489295.
eopXD added a comment.

Rebase upon latest main.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D141762/new/

https://reviews.llvm.org/D141762

Files:
  clang/utils/TableGen/RISCVVEmitter.cpp


Index: clang/utils/TableGen/RISCVVEmitter.cpp
===================================================================
--- clang/utils/TableGen/RISCVVEmitter.cpp
+++ clang/utils/TableGen/RISCVVEmitter.cpp
@@ -163,18 +163,11 @@
     OS << "  ID = Intrinsic::riscv_" + RVVI->getIRName() + ";\n";
   if (RVVI->getNF() >= 2)
     OS << "  NF = " + utostr(RVVI->getNF()) + ";\n";
-  // We had initialized PolicyAttrs as TU/TUMU in CodeGen function.
-  if (!RVVI->getPolicyAttrs().isTUPolicy() &&
-      !RVVI->getPolicyAttrs().isTUMUPolicy() && !RVVI->hasPassthruOperand() &&
-      !RVVI->hasManualCodegen() && RVVI->hasVL())
-    OS << "  PolicyAttrs = " << RVVI->getPolicyAttrsBits() << ";\n";
+
+  OS << "  PolicyAttrs = " << RVVI->getPolicyAttrsBits() << ";\n";
 
   if (RVVI->hasManualCodegen()) {
-    OS << "  PolicyAttrs = " << RVVI->getPolicyAttrsBits() << ";\n";
-    if (RVVI->isMasked())
-      OS << "IsMasked = true;\n";
-    else
-      OS << "IsMasked = false;\n";
+    OS << "IsMasked = " << (RVVI->isMasked() ? "true" : "false") << ";\n";
     OS << RVVI->getManualCodegen();
     OS << "break;\n";
     return;


-------------- next part --------------
A non-text attachment was scrubbed...
Name: D141762.489295.patch
Type: text/x-patch
Size: 1121 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/cfe-commits/attachments/20230114/d310699e/attachment-0001.bin>


More information about the cfe-commits mailing list