[PATCH] D141762: [WIP][8/N][Clang][RISCV][NFC] Always emit PolicyAttr in riscv_vector_builtin_cg.inc

Yueh-Ting (eop) Chen via Phabricator via cfe-commits cfe-commits at lists.llvm.org
Sat Jan 14 07:07:26 PST 2023


eopXD created this revision.
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Depends on D141759 <https://reviews.llvm.org/D141759>.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D141762

Files:
  clang/utils/TableGen/RISCVVEmitter.cpp


Index: clang/utils/TableGen/RISCVVEmitter.cpp
===================================================================
--- clang/utils/TableGen/RISCVVEmitter.cpp
+++ clang/utils/TableGen/RISCVVEmitter.cpp
@@ -164,17 +164,10 @@
   if (RVVI->getNF() >= 2)
     OS << "  NF = " + utostr(RVVI->getNF()) + ";\n";
   // We had initialized PolicyAttrs as TU/TUMU in CodeGen function.
-  if (!RVVI->getPolicyAttrs().isTUPolicy() &&
-      !RVVI->getPolicyAttrs().isTUMUPolicy() && !RVVI->hasPassthruOperand() &&
-      !RVVI->hasManualCodegen() && RVVI->hasVL())
-    OS << "  PolicyAttrs = " << RVVI->getPolicyAttrsBits() << ";\n";
+  OS << "  PolicyAttrs = " << RVVI->getPolicyAttrsBits() << ";\n";
 
   if (RVVI->hasManualCodegen()) {
-    OS << "  PolicyAttrs = " << RVVI->getPolicyAttrsBits() << ";\n";
-    if (RVVI->isMasked())
-      OS << "IsMasked = true;\n";
-    else
-      OS << "IsMasked = false;\n";
+    OS << "IsMasked = " << (RVVI->isMasked() ? "true" : "false") << ";\n";
     OS << RVVI->getManualCodegen();
     OS << "break;\n";
     return;


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