[PATCH] D141198: [Clang][RISCV][NFC] Reorganize test case for rvv intrinsics

[Craig Topper via Phabricator via cfe-commits]

craig.topper added inline comments.


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Comment at: clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vaadd.c:3
 // REQUIRES: riscv-registered-target
-// RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone -emit-llvm %s -o - | opt -S -passes=mem2reg | FileCheck --check-prefix=CHECK-RV64 %s
+// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
+// RUN:   -target-feature +experimental-zvfh -disable-O0-optnone -emit-llvm %s -o - | \
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Why do we need to zfh and zvfh on integer tests?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D141198/new/

https://reviews.llvm.org/D141198