[clang] 108766f - Fix typos
Luke Drummond via cfe-commits
cfe-commits at lists.llvm.org
Thu Jan 5 10:49:30 PST 2023
Author: Luke Drummond
Date: 2023-01-05T18:49:23Z
New Revision: 108766fc7ef83724ff4f66235bd561b217df0ff7
URL: https://github.com/llvm/llvm-project/commit/108766fc7ef83724ff4f66235bd561b217df0ff7
DIFF: https://github.com/llvm/llvm-project/commit/108766fc7ef83724ff4f66235bd561b217df0ff7.diff
LOG: Fix typos
I found one typo of "implemnt", then some more.
s/implemnt/implement/g
Added:
Modified:
clang/lib/CodeGen/CGBuiltin.cpp
llvm/lib/CodeGen/MIRParser/MIParser.cpp
llvm/lib/MC/MCWin64EH.cpp
llvm/lib/Target/AArch64/MCTargetDesc/AArch64TargetStreamer.h
llvm/test/CodeGen/PowerPC/aix-alias.ll
Removed:
################################################################################
diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index b1e8517460ce8..0afa25da7aee3 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -7999,7 +7999,7 @@ Value *CodeGenFunction::EmitARMBuiltinExpr(unsigned BuiltinID,
Value *Arg0 = EmitScalarExpr(E->getArg(0));
Value *Arg1 = EmitScalarExpr(E->getArg(1));
- // crc32{c,}d intrinsics are implemnted as two calls to crc32{c,}w
+ // crc32{c,}d intrinsics are implemented as two calls to crc32{c,}w
// intrinsics, hence we need
diff erent codegen for these cases.
if (BuiltinID == clang::ARM::BI__builtin_arm_crc32d ||
BuiltinID == clang::ARM::BI__builtin_arm_crc32cd) {
diff --git a/llvm/lib/CodeGen/MIRParser/MIParser.cpp b/llvm/lib/CodeGen/MIRParser/MIParser.cpp
index 56c5c58142388..8b27edee45fe5 100644
--- a/llvm/lib/CodeGen/MIRParser/MIParser.cpp
+++ b/llvm/lib/CodeGen/MIRParser/MIParser.cpp
@@ -1847,7 +1847,7 @@ bool MIParser::parseIRConstant(StringRef::iterator Loc, const Constant *&C) {
return false;
}
-// See LLT implemntation for bit size limits.
+// See LLT implementation for bit size limits.
static bool verifyScalarSize(uint64_t Size) {
return Size != 0 && isUInt<16>(Size);
}
diff --git a/llvm/lib/MC/MCWin64EH.cpp b/llvm/lib/MC/MCWin64EH.cpp
index 4b20959ee5d6c..1a55722133ccd 100644
--- a/llvm/lib/MC/MCWin64EH.cpp
+++ b/llvm/lib/MC/MCWin64EH.cpp
@@ -1282,9 +1282,9 @@ static void ARM64EmitUnwindInfoForSegment(MCStreamer &streamer,
// FIXME: We should be able to split unwind info into multiple sections.
if (CodeWords > 0xFF || EpilogCount > 0xFFFF)
report_fatal_error(
- "SEH unwind data splitting is only implemnted for large functions, "
- "cases of too many code words or too many epilogs will be done later"
- );
+ "SEH unwind data splitting is only implemented for large functions, "
+ "cases of too many code words or too many epilogs will be done "
+ "later");
uint32_t row2 = 0x0;
row2 |= (CodeWords & 0xFF) << 16;
row2 |= (EpilogCount & 0xFFFF);
diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64TargetStreamer.h b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64TargetStreamer.h
index acb03f349e863..b3bce9960772e 100644
--- a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64TargetStreamer.h
+++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64TargetStreamer.h
@@ -30,7 +30,7 @@ class AArch64TargetStreamer : public MCTargetStreamer {
/// MCExpr that can be used to refer to the constant pool location.
const MCExpr *addConstantPoolEntry(const MCExpr *, unsigned Size, SMLoc Loc);
- /// Callback used to implemnt the .ltorg directive.
+ /// Callback used to implement the .ltorg directive.
/// Emit contents of constant pool for the current section.
void emitCurrentConstantPool();
diff --git a/llvm/test/CodeGen/PowerPC/aix-alias.ll b/llvm/test/CodeGen/PowerPC/aix-alias.ll
index a3f6d87ca85ff..0ec2118beb7aa 100644
--- a/llvm/test/CodeGen/PowerPC/aix-alias.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-alias.ll
@@ -1,5 +1,5 @@
; TODO: Add object generation test when visibility for object generation
-; is implemnted.
+; is implemented.
; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr4 \
; RUN: -mattr=-altivec -data-sections=false -xcoff-traceback-table=false < %s | \
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