[PATCH] D141032: [Clang][RISCV] Expose vlenb to user

Wang Pengcheng via Phabricator via cfe-commits cfe-commits at lists.llvm.org
Thu Jan 5 01:01:42 PST 2023


pcwang-thead added inline comments.


================
Comment at: clang/include/clang/Basic/riscv_vector.td:1565
+  unsigned long __rv = 0;
+  __asm__ __volatile__ ("csrr\t%0, vlenb" : "=r"(__rv) : : "memory");
+  return __rv;
----------------
Inline assembly may not be elegant since it can't be optimized in many ways. We can eliminate some redundant reads of vlenb currently(done in D125564). So I think we may add a builtin function and lower it to `llvm.read_register`?


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CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D141032/new/

https://reviews.llvm.org/D141032



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