[PATCH] D137517: [TargetParser] Generate the defs for RISCV CPUs using llvm-tblgen.

Tue Dec 20 11:03:20 PST 2022

fpetrogalli added a comment.

Hi - gentle ping on reviewing this

================
Comment at: llvm/lib/Target/AArch64/AsmParser/CMakeLists.txt:19

+target_include_directories(LLVMAArch64AsmParser PRIVATE ${LLVM_LIBRARY_DIR}/TargetParser/)
----------------
lenary wrote:
> craig.topper wrote:
> > Why do we need to touch CMake file that aren't RISC-V?
> Yeah, this shouldn't be needed.
> 
> We do have some fixes for the modules build which recently landed, maybe they fix the issues you were seeing, including:
> - https://reviews.llvm.org/rG9cd6fbee7ed881f8e80b735e95567040e56f189e
> - https://reviews.llvm.org/rG6bdf378dcd349d97152846bb687c1d1de511d138
> - https://reviews.llvm.org/D140420 (this isn't landed, but it might clear up some weird things about the quicker modulemap fixes)
This is unrelated to Modules. The .inc file generated by tablegen is created in `{make_build_folder}/lib/TargetParser`. The file is then included in `TargetParser.cpp` but also in `TargetParser.h` -> this means that every time we include the latter in a cpp file we need to make the inc file visible for inclusion.

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D137517/new/

https://reviews.llvm.org/D137517