[PATCH] D139507: [Intrinsic] Rename flt.rounds intrinsic to get.rounding

[Qiu Chaofan via Phabricator via cfe-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGa40ef656d812: [Intrinsic] Rename flt.rounds intrinsic to get.rounding (authored by qiucf).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D139507/new/

https://reviews.llvm.org/D139507

Files:
  clang/lib/CodeGen/CGBuiltin.cpp
  clang/test/CodeGen/builtins-msp430.c
  clang/test/CodeGen/builtins.c
  llvm/docs/LangRef.rst
  llvm/include/llvm/CodeGen/ISDOpcodes.h
  llvm/include/llvm/IR/Intrinsics.td
  llvm/lib/CodeGen/IntrinsicLowering.cpp
  llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
  llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
  llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
  llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
  llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
  llvm/lib/IR/AutoUpgrade.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.h
  llvm/lib/Target/ARM/ARMISelLowering.cpp
  llvm/lib/Target/ARM/ARMISelLowering.h
  llvm/lib/Target/PowerPC/PPCISelLowering.cpp
  llvm/lib/Target/PowerPC/PPCISelLowering.h
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/lib/Target/X86/X86ISelLowering.cpp
  llvm/lib/Target/X86/X86ISelLowering.h
  llvm/test/Bitcode/Inputs/auto_upgrade_flt_rounds.bc
  llvm/test/Bitcode/auto_upgrade_flt_rounds.test
  llvm/test/CodeGen/AArch64/arm64-fpcr.ll
  llvm/test/CodeGen/AArch64/strict-fp-opt.ll
  llvm/test/CodeGen/ARM/2012-03-05-FPSCR-bug.ll
  llvm/test/CodeGen/ARM/fpscr-intrinsics.ll
  llvm/test/CodeGen/ARM/no-fpscr-liveness.ll
  llvm/test/CodeGen/MSP430/flt_rounds.ll
  llvm/test/CodeGen/PowerPC/frounds.ll
  llvm/test/CodeGen/RISCV/flt-rounds.ll
  llvm/test/CodeGen/RISCV/fpenv.ll
  llvm/test/CodeGen/X86/flt-rounds.ll

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