[PATCH] D140226: [NVPTX] Introduce attribute to mark kernels without a language mode

Ronan Keryell via Phabricator via cfe-commits cfe-commits at lists.llvm.org
Sun Dec 18 08:33:55 PST 2022


keryell added subscribers: bader, keryell.
keryell added a comment.

I wonder whether we could not factorize some code/attribute/logic with AMDGPU or SYCL.
Is the use case to have for example CUDA+HIP+SYCL in the same TU and thus there is a need for different attributes


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D140226/new/

https://reviews.llvm.org/D140226



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