[PATCH] D139995: [RISCV] Refactor RVV Policy by structure
Piyou Chen via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Fri Dec 16 18:55:00 PST 2022
BeMg updated this revision to Diff 483707.
BeMg added a comment.
1. Use Undisturbed, Agnostic and Omit to represent Tail and Mask
2. Replace getDefaultPolicyBits != 0 with !RVVI->isTUPolicy() && !RVVI->isTUMUPolicy()
3. Use llvm_unreachable
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D139995/new/
https://reviews.llvm.org/D139995
Files:
clang/include/clang/Support/RISCVVIntrinsicUtils.h
clang/lib/Sema/SemaRISCVVectorLookup.cpp
clang/lib/Support/RISCVVIntrinsicUtils.cpp
clang/utils/TableGen/RISCVVEmitter.cpp
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