[PATCH] D138807: [RISCV] Support vector crypto extension ISA string and assembly

[Brandon Wu via Phabricator via cfe-commits]

4vtomat added a comment.

In D138807#3972441 <https://reviews.llvm.org/D138807#3972441>, @craig.topper wrote:

> In D138807#3962417 <https://reviews.llvm.org/D138807#3962417>, @craig.topper wrote:
>
>> Anything that uses OP-P needs to have a DecoderNamespace assigned and RISCVDisassembler::getInstruction will need to lookup that table when V/Zve is enabled. Otherwise we will have a conflict if the P extension is ever commited to LLVM.
>
> I think we can ignore the OP-P conflict until P is ratified and added to LLVM.

Sure, thanks for reminding!



================
Comment at: llvm/lib/Support/RISCVISAInfo.cpp:827
     {{"zvfh"}, {ImpliedExtsZvfh}},
+    {{"zvkb"}, {ImpliedExtsV}},
+    {{"zvkg"}, {ImpliedExtsV}},
----------------
craig.topper wrote:
> Does Crypto really require V or could it work with Zve?
I think Zve is enough to get it work, thanks!


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https://reviews.llvm.org/D138807