[PATCH] D139073: [X86] AMD Zen 4 Initial enablement
Simon Pilgrim via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Thu Dec 1 10:15:09 PST 2022
RKSimon added a comment.
Thank you @gganesh I thought you'd forgotten about us :)
Please add znver4 test coverage to:
llvm/test/CodeGen/X86/cpus-amd.ll
llvm/test/CodeGen/X86/slow-unaligned-mem.ll
================
Comment at: llvm/lib/Target/X86/X86.td:1619
ProcessorFeatures.ZN3Tuning>;
+def : ProcModel<"znver4", Znver3Model, ProcessorFeatures.ZN4Features,
+ ProcessorFeatures.ZN4Tuning>;
----------------
This might sound strange - but its probably better to use either the IceLake or SkylakeServer model initially - as they have AVX512 instruction coverage, the znver3 model will assert in llvm-mca etc when it encounters an unsupported instruction (any of the Z sched classes).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D139073/new/
https://reviews.llvm.org/D139073
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