[PATCH] D138807: [RISCV] Support vector crypto extension ISA string and assembly

[Craig Topper via Phabricator via cfe-commits]

craig.topper added a comment.

Anything that uses OP-P needs to have a DecoderNamespace assigned and RISCVDisassembler::getInstruction will need to lookup that table when V/Zve is enabled. Otherwise we will have a conflict if the P extension is ever commited to LLVM.



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Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td:37
+  let Inst{19-15} = imm{4-0};
+  let Inst{14-12} = 0b011;
+  let Inst{11-7} = vd;
----------------
Use `OPIVI.Value`


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  https://reviews.llvm.org/D138807/new/

https://reviews.llvm.org/D138807