[PATCH] D138920: [AArch64] Assembly support for VMSA

[Tomas Matheson via Phabricator via cfe-commits]

tmatheson created this revision.
tmatheson added reviewers: lenary, pratlucas, dmgreen, stuij.
Herald added subscribers: hiraditya, kristof.beyls.
Herald added a project: All.
tmatheson requested review of this revision.
Herald added projects: clang, LLVM.
Herald added subscribers: llvm-commits, cfe-commits.

Virtual Memory System Architecture (VMSA)

This is part of the 2022 A-Profile Architecture extensions and adds support for
the following:

- Translation Hardening Extension (FEAT_THE)
- 128-bit Page Table Descriptors (FEAT_D128)
- 56-bit Virtual Address (FEAT_LVA3)
- Support for 128-bit System Registers (FEAT_SYSREG128)
- System Instructions that can take 128-bit inputs (FEAT_SYSINSTR128)
- 128-bit Atomic Instructions (FEAT_LSE128)
- Permission Indirection Extension (FEAT_S1PIE, FEAT_S2PIE)
- Permission Overlay Extension (FEAT_S1POE, FEAT_S2POE)
- Memory Attribute Index Enhancement (FEAT_AIE)

New instructions added:

- FEAT_SYSREG128 adds MRRS and MSRR.
- FEAT_SYSINSTR128 adds the SYSP instruction and TLBIP aliases.
- FEAT_LSE128 adds LDCLRP, LDSET, and SWPP instructions.
- FEAT_THE adds the set of RCW* instructions.

Specs for individual instructions can be found here:
https://developer.arm.com/documentation/ddi0602/2022-09/Base-Instructions/


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D138920

Files:
  clang/lib/Basic/Targets/AArch64.cpp
  clang/lib/Basic/Targets/AArch64.h
  clang/test/Driver/aarch64-d128.c
  clang/test/Driver/aarch64-lse128.c
  clang/test/Driver/aarch64-the.c
  llvm/include/llvm/Support/AArch64TargetParser.def
  llvm/include/llvm/Support/AArch64TargetParser.h
  llvm/lib/Target/AArch64/AArch64.td
  llvm/lib/Target/AArch64/AArch64InstrFormats.td
  llvm/lib/Target/AArch64/AArch64InstrInfo.td
  llvm/lib/Target/AArch64/AArch64RegisterInfo.td
  llvm/lib/Target/AArch64/AArch64SchedFalkorDetails.td
  llvm/lib/Target/AArch64/AArch64SystemOperands.td
  llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
  llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
  llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
  llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.h
  llvm/test/MC/AArch64/arm64-system-encoding.s
  llvm/test/MC/AArch64/armv8.9a-the.s
  llvm/test/MC/AArch64/armv9-mrrs.s
  llvm/test/MC/AArch64/armv9-msrr.s
  llvm/test/MC/AArch64/armv9-sysp.s
  llvm/test/MC/AArch64/armv9.4-lse128.s
  llvm/test/MC/AArch64/basic-a64-instructions.s
  llvm/test/MC/AArch64/directive-arch_extension-negative.s
  llvm/test/MC/AArch64/directive-arch_extension.s
  llvm/test/MC/Disassembler/AArch64/armv8.9a-the.txt
  llvm/test/MC/Disassembler/AArch64/armv9-sysp.txt
  llvm/test/MC/Disassembler/AArch64/armv9-sysreg128.txt
  llvm/test/MC/Disassembler/AArch64/armv9.4a-lse128.txt
  llvm/test/MC/Disassembler/AArch64/basic-a64-instructions.txt
  llvm/unittests/Support/TargetParserTest.cpp

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