[clang] aa4acea - clang/HIP: Add another math header test

Matt Arsenault via cfe-commits cfe-commits at lists.llvm.org
Mon Nov 28 15:02:25 PST 2022


Author: Matt Arsenault
Date: 2022-11-28T18:02:20-05:00
New Revision: aa4acea8cd8d30b6c8b5d539217be0d5c76db625

URL: https://github.com/llvm/llvm-project/commit/aa4acea8cd8d30b6c8b5d539217be0d5c76db625
DIFF: https://github.com/llvm/llvm-project/commit/aa4acea8cd8d30b6c8b5d539217be0d5c76db625.diff

LOG: clang/HIP: Add another math header test

This needs more exhaustive checks for the other things here;
for now just test the ones directly calling ocml functions.

Added: 
    clang/test/Headers/__clang_hip_cmath.hip

Modified: 
    

Removed: 
    


################################################################################
diff  --git a/clang/test/Headers/__clang_hip_cmath.hip b/clang/test/Headers/__clang_hip_cmath.hip
new file mode 100644
index 0000000000000..e8d9445204072
--- /dev/null
+++ b/clang/test/Headers/__clang_hip_cmath.hip
@@ -0,0 +1,46 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
+// REQUIRES: amdgpu-registered-target
+
+// RUN: %clang_cc1 -include __clang_hip_runtime_wrapper.h      \
+// RUN:   -internal-isystem %S/../../lib/Headers/cuda_wrappers \
+// RUN:   -internal-isystem %S/Inputs/include \
+// RUN:   -triple amdgcn-amd-amdhsa -aux-triple x86_64-unknown-unknown \
+// RUN:   -target-cpu gfx906 -emit-llvm %s -fcuda-is-device -O1 -o - \
+// RUN:   -D__HIPCC_RTC__ | FileCheck -check-prefix=DEFAULT %s
+
+// Check that we end up with fast math flags set on intrinsic calls
+// RUN: %clang_cc1 -include __clang_hip_runtime_wrapper.h \
+// RUN:   -internal-isystem %S/../../lib/Headers/cuda_wrappers \
+// RUN:   -internal-isystem %S/Inputs/include \
+// RUN:   -triple amdgcn-amd-amdhsa -aux-triple x86_64-unknown-unknown \
+// RUN:   -target-cpu gfx906 -emit-llvm %s -fcuda-is-device -O1 -ffinite-math-only -o - \
+// RUN:   -D__HIPCC_RTC__ | FileCheck -check-prefix=FINITEONLY %s
+
+// DEFAULT-LABEL: @test_fma_f16(
+// DEFAULT-NEXT:  entry:
+// DEFAULT-NEXT:    [[CALL_I:%.*]] = tail call contract half @__ocml_fma_f16(half noundef [[X:%.*]], half noundef [[Y:%.*]], half noundef [[Z:%.*]]) #[[ATTR6:[0-9]+]]
+// DEFAULT-NEXT:    ret half [[CALL_I]]
+//
+// FINITEONLY-LABEL: @test_fma_f16(
+// FINITEONLY-NEXT:  entry:
+// FINITEONLY-NEXT:    [[CALL_I:%.*]] = tail call nnan ninf contract half @__ocml_fma_f16(half noundef [[X:%.*]], half noundef [[Y:%.*]], half noundef [[Z:%.*]]) #[[ATTR6:[0-9]+]]
+// FINITEONLY-NEXT:    ret half [[CALL_I]]
+//
+extern "C" __device__ _Float16 test_fma_f16(_Float16 x, _Float16 y,
+                                            _Float16 z) {
+  return fma(x, y, z);
+}
+
+// DEFAULT-LABEL: @test_pow_f16(
+// DEFAULT-NEXT:  entry:
+// DEFAULT-NEXT:    [[CALL_I:%.*]] = tail call contract half @__ocml_pown_f16(half noundef [[X:%.*]], i32 noundef [[Y:%.*]]) #[[ATTR7:[0-9]+]]
+// DEFAULT-NEXT:    ret half [[CALL_I]]
+//
+// FINITEONLY-LABEL: @test_pow_f16(
+// FINITEONLY-NEXT:  entry:
+// FINITEONLY-NEXT:    [[CALL_I:%.*]] = tail call nnan ninf contract half @__ocml_pown_f16(half noundef [[X:%.*]], i32 noundef [[Y:%.*]]) #[[ATTR7:[0-9]+]]
+// FINITEONLY-NEXT:    ret half [[CALL_I]]
+//
+extern "C" __device__ _Float16 test_pow_f16(_Float16 x, int y) {
+  return pow(x, y);
+}


        


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