[PATCH] D137517: [TargetSupport] Generate the defs for RISCV CPUs using llvm-tblgen.
Francesco Petrogalli via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Mon Nov 7 10:24:59 PST 2022
fpetrogalli updated this revision to Diff 473738.
fpetrogalli added a comment.
When looping through the records in tablegen, I have added an extra (necessary) condition to make sure that the records we are processing are also derived from the class
`ProcessorModel`.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D137517/new/
https://reviews.llvm.org/D137517
Files:
clang/lib/Basic/CMakeLists.txt
clang/lib/Driver/CMakeLists.txt
llvm/include/llvm/TargetSupport/RISCVTargetParser.def
llvm/include/llvm/TargetSupport/TargetParser.h
llvm/include/llvm/module.modulemap
llvm/lib/Target/AArch64/AsmParser/CMakeLists.txt
llvm/lib/Target/AArch64/CMakeLists.txt
llvm/lib/Target/AMDGPU/AsmParser/CMakeLists.txt
llvm/lib/Target/AMDGPU/CMakeLists.txt
llvm/lib/Target/AMDGPU/MCA/CMakeLists.txt
llvm/lib/Target/AMDGPU/MCTargetDesc/CMakeLists.txt
llvm/lib/Target/AMDGPU/Utils/CMakeLists.txt
llvm/lib/Target/ARM/AsmParser/CMakeLists.txt
llvm/lib/Target/ARM/CMakeLists.txt
llvm/lib/Target/ARM/MCTargetDesc/CMakeLists.txt
llvm/lib/Target/RISCV/CMakeLists.txt
llvm/lib/Target/RISCV/RISCV.td
llvm/lib/TargetSupport/CMakeLists.txt
llvm/lib/TargetSupport/TargetParser.cpp
llvm/unittests/Support/CMakeLists.txt
llvm/unittests/TargetSupport/CMakeLists.txt
llvm/utils/TableGen/CMakeLists.txt
llvm/utils/TableGen/RISCVTargetDefEmitter.cpp
llvm/utils/TableGen/TableGen.cpp
llvm/utils/TableGen/TableGenBackends.h
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