[PATCH] D116735: [RISCV] Adjust RISCV data layout by using n32:64 in layout string
Craig Topper via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Thu Oct 27 10:08:35 PDT 2022
craig.topper updated this revision to Diff 471209.
craig.topper added a comment.
Add to release notes
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D116735/new/
https://reviews.llvm.org/D116735
Files:
clang/lib/Basic/Targets/RISCV.h
llvm/docs/ReleaseNotes.rst
llvm/lib/IR/AutoUpgrade.cpp
llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
llvm/test/CodeGen/RISCV/aext-to-sext.ll
llvm/test/CodeGen/RISCV/loop-strength-reduce-add-cheaper-than-mul.ll
llvm/test/CodeGen/RISCV/loop-strength-reduce-loop-invar.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vector-strided-load-store-asm.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec.ll
llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp
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