[PATCH] D136311: [CUDA] Propagate __bf16 type info from the host compilation.

[Artem Belevich via Phabricator via cfe-commits]

tra created this revision.
Herald added subscribers: mattd, gchakrabarti, asavonic, bixia, yaxunl.
Herald added a project: All.
tra updated this revision to Diff 469453.
tra added a comment.
Herald added a subscriber: hiraditya.
tra updated this revision to Diff 469460.
tra updated this revision to Diff 469657.
tra added reviewers: jchlanda, yaxunl.
tra published this revision for review.
Herald added subscribers: llvm-commits, cfe-commits, jholewinski.
Herald added projects: clang, LLVM.

Added bf16 load/store support.


tra added a comment.

More bf16 lowring fixes.


tra added a comment.

More lowering fixes & tests.


Recent Clang changes expose _bf16 types for SSE2-enabled host compilations and
that makes those types visible furing GPU-side compilation, where it currently
fails with Sema complaining that __bf16 is not supported.

Considering that __bf16 is a storage-only type, enabling it for NVPTX if it's
enabled on the host should pose no issues, correctness-wise.

Recent NVIDIA GPUs have introduced bf16 support, so we'll likely grow better
support for __bf16 on NVPTX going forward, anyways.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D136311

Files:
  clang/lib/Basic/Targets/NVPTX.cpp
  clang/lib/Basic/Targets/NVPTX.h
  clang/test/CodeGenCUDA/bf16.cu
  clang/test/SemaCUDA/bf16.cu
  llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
  llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
  llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
  llvm/lib/Target/NVPTX/NVPTXProxyRegErasure.cpp
  llvm/lib/Target/NVPTX/NVPTXRegisterInfo.td

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D136311.469657.patch
Type: text/x-patch
Size: 39130 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/cfe-commits/attachments/20221021/b6cfbfa3/attachment-0001.bin>