[PATCH] D133338: [clang][PowerPC] PPC64 VAArg use coerced integer type for direct aggregate fits in register

Tue Oct 11 18:31:34 PDT 2022

tingwang added a comment.

In D133338#3850091 <https://reviews.llvm.org/D133338#3850091>, @rjmccall wrote:

> This seems be to a genuine target difference, right?  PPC64 has this ABI rule:
>
>> An aggregate or union smaller than one doubleword in size is padded so that it appears in the least significant bits of the doubleword.
>
> which overrides the standard rule for passing aggregates:
>
>> Fixed size aggregates and unions passed by value are mapped to as many doublewords of the parameter save area as the value uses in memory. Aggregrates and unions are aligned according to their alignment requirements. This may result in doublewords being skipped for alignment.
>
> Other big-endian targets don't do this to non-fundamental types as far as I can tell.  So I don't really get the TODO in the comment; this does seem to be something that ABIs need to pass in.

Thank you. I realized the TODO applies to the specific PPC64 case, not the API. I will move that.

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https://reviews.llvm.org/D133338