[clang] 9a01cca - Add support for CUDA-11.8 and sm_{87,89,90} GPUs.
Artem Belevich via cfe-commits
cfe-commits at lists.llvm.org
Fri Oct 7 14:00:14 PDT 2022
Author: Artem Belevich
Date: 2022-10-07T13:59:28-07:00
New Revision: 9a01cca66036087e4da37c221a4b911818910524
URL: https://github.com/llvm/llvm-project/commit/9a01cca66036087e4da37c221a4b911818910524
DIFF: https://github.com/llvm/llvm-project/commit/9a01cca66036087e4da37c221a4b911818910524.diff
LOG: Add support for CUDA-11.8 and sm_{87,89,90} GPUs.
Differential Revision: https://reviews.llvm.org/D135306
Added:
Modified:
clang/docs/ReleaseNotes.rst
clang/include/clang/Basic/BuiltinsNVPTX.def
clang/include/clang/Basic/Cuda.h
clang/lib/Basic/Cuda.cpp
clang/lib/Basic/Targets/NVPTX.cpp
clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
clang/lib/Driver/ToolChains/Cuda.cpp
clang/test/Misc/target-invalid-cpu-note.c
llvm/lib/Target/NVPTX/NVPTX.td
Removed:
################################################################################
diff --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst
index 65febfaa24c38..7907e34753b66 100644
--- a/clang/docs/ReleaseNotes.rst
+++ b/clang/docs/ReleaseNotes.rst
@@ -479,7 +479,8 @@ OpenMP Support in Clang
CUDA Support in Clang
---------------------
-- ...
+- Clang now supports CUDA SDK up to 11.8
+- Added support for targeting sm_{87,89,90} GPUs.
RISC-V Support in Clang
-----------------------
diff --git a/clang/include/clang/Basic/BuiltinsNVPTX.def b/clang/include/clang/Basic/BuiltinsNVPTX.def
index ea0efcef2ca5b..ea0cd8c3e8431 100644
--- a/clang/include/clang/Basic/BuiltinsNVPTX.def
+++ b/clang/include/clang/Basic/BuiltinsNVPTX.def
@@ -23,7 +23,13 @@
#pragma push_macro("SM_75")
#pragma push_macro("SM_80")
#pragma push_macro("SM_86")
-#define SM_86 "sm_86"
+#pragma push_macro("SM_87")
+#pragma push_macro("SM_89")
+#pragma push_macro("SM_90")
+#define SM_90 "sm_90"
+#define SM_89 "sm_89|" SM_90
+#define SM_87 "sm_87|" SM_89
+#define SM_86 "sm_86|" SM_87
#define SM_80 "sm_80|" SM_86
#define SM_75 "sm_75|" SM_80
#define SM_72 "sm_72|" SM_75
@@ -45,7 +51,13 @@
#pragma push_macro("PTX73")
#pragma push_macro("PTX74")
#pragma push_macro("PTX75")
-#define PTX75 "ptx75"
+#pragma push_macro("PTX76")
+#pragma push_macro("PTX77")
+#pragma push_macro("PTX78")
+#define PTX78 "ptx78"
+#define PTX77 "ptx77|" PTX78
+#define PTX76 "ptx76|" PTX77
+#define PTX75 "ptx75|" PTX76
#define PTX74 "ptx74|" PTX75
#define PTX73 "ptx73|" PTX74
#define PTX72 "ptx72|" PTX73
@@ -944,6 +956,9 @@ TARGET_BUILTIN(__nvvm_neg_bf16x2, "ZUiZUi", "", AND(SM_80,PTX70))
#pragma pop_macro("SM_75")
#pragma pop_macro("SM_80")
#pragma pop_macro("SM_86")
+#pragma pop_macro("SM_87")
+#pragma pop_macro("SM_89")
+#pragma pop_macro("SM_90")
#pragma pop_macro("PTX42")
#pragma pop_macro("PTX60")
#pragma pop_macro("PTX61")
@@ -956,3 +971,6 @@ TARGET_BUILTIN(__nvvm_neg_bf16x2, "ZUiZUi", "", AND(SM_80,PTX70))
#pragma pop_macro("PTX73")
#pragma pop_macro("PTX74")
#pragma pop_macro("PTX75")
+#pragma pop_macro("PTX76")
+#pragma pop_macro("PTX77")
+#pragma pop_macro("PTX78")
diff --git a/clang/include/clang/Basic/Cuda.h b/clang/include/clang/Basic/Cuda.h
index 18ef373784e5b..8ff28944f23d5 100644
--- a/clang/include/clang/Basic/Cuda.h
+++ b/clang/include/clang/Basic/Cuda.h
@@ -34,9 +34,12 @@ enum class CudaVersion {
CUDA_113,
CUDA_114,
CUDA_115,
+ CUDA_116,
+ CUDA_117,
+ CUDA_118,
FULLY_SUPPORTED = CUDA_115,
PARTIALLY_SUPPORTED =
- CUDA_115, // Partially supported. Proceed with a warning.
+ CUDA_118, // Partially supported. Proceed with a warning.
NEW = 10000, // Too new. Issue a warning, but allow using it.
};
const char *CudaVersionToString(CudaVersion V);
@@ -63,6 +66,9 @@ enum class CudaArch {
SM_75,
SM_80,
SM_86,
+ SM_87,
+ SM_89,
+ SM_90,
GFX600,
GFX601,
GFX602,
diff --git a/clang/lib/Basic/Cuda.cpp b/clang/lib/Basic/Cuda.cpp
index 142e7941eb4db..cb9c679d76ef8 100644
--- a/clang/lib/Basic/Cuda.cpp
+++ b/clang/lib/Basic/Cuda.cpp
@@ -35,6 +35,9 @@ static const CudaVersionMapEntry CudaNameVersionMap[] = {
CUDA_ENTRY(11, 3),
CUDA_ENTRY(11, 4),
CUDA_ENTRY(11, 5),
+ CUDA_ENTRY(11, 6),
+ CUDA_ENTRY(11, 7),
+ CUDA_ENTRY(11, 8),
{"", CudaVersion::NEW, llvm::VersionTuple(std::numeric_limits<int>::max())},
{"unknown", CudaVersion::UNKNOWN, {}} // End of list tombstone.
};
@@ -86,6 +89,9 @@ static const CudaArchToStringMap arch_names[] = {
SM(70), SM(72), // Volta
SM(75), // Turing
SM(80), SM(86), // Ampere
+ SM(87), // Jetson/Drive AGX Orin
+ SM(89), // Ada Lovelace
+ SM(90), // Hopper
GFX(600), // gfx600
GFX(601), // gfx601
GFX(602), // gfx602
@@ -191,6 +197,11 @@ CudaVersion MinVersionForCudaArch(CudaArch A) {
return CudaVersion::CUDA_110;
case CudaArch::SM_86:
return CudaVersion::CUDA_111;
+ case CudaArch::SM_87:
+ return CudaVersion::CUDA_114;
+ case CudaArch::SM_89:
+ case CudaArch::SM_90:
+ return CudaVersion::CUDA_118;
default:
llvm_unreachable("invalid enum");
}
diff --git a/clang/lib/Basic/Targets/NVPTX.cpp b/clang/lib/Basic/Targets/NVPTX.cpp
index de06675d4cc1e..f2261f15f20a9 100644
--- a/clang/lib/Basic/Targets/NVPTX.cpp
+++ b/clang/lib/Basic/Targets/NVPTX.cpp
@@ -246,6 +246,12 @@ void NVPTXTargetInfo::getTargetDefines(const LangOptions &Opts,
return "800";
case CudaArch::SM_86:
return "860";
+ case CudaArch::SM_87:
+ return "870";
+ case CudaArch::SM_89:
+ return "890";
+ case CudaArch::SM_90:
+ return "900";
}
llvm_unreachable("unhandled CudaArch");
}();
diff --git a/clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp b/clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
index e3ef331e67ee1..320ee122a066c 100644
--- a/clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
+++ b/clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
@@ -3635,6 +3635,9 @@ void CGOpenMPRuntimeGPU::processRequiresDirective(
case CudaArch::SM_75:
case CudaArch::SM_80:
case CudaArch::SM_86:
+ case CudaArch::SM_87:
+ case CudaArch::SM_89:
+ case CudaArch::SM_90:
case CudaArch::GFX600:
case CudaArch::GFX601:
case CudaArch::GFX602:
diff --git a/clang/lib/Driver/ToolChains/Cuda.cpp b/clang/lib/Driver/ToolChains/Cuda.cpp
index 84a12bd4a144a..0f693698c48cf 100644
--- a/clang/lib/Driver/ToolChains/Cuda.cpp
+++ b/clang/lib/Driver/ToolChains/Cuda.cpp
@@ -67,6 +67,12 @@ CudaVersion getCudaVersion(uint32_t raw_version) {
return CudaVersion::CUDA_114;
if (raw_version < 11060)
return CudaVersion::CUDA_115;
+ if (raw_version < 11070)
+ return CudaVersion::CUDA_116;
+ if (raw_version < 11080)
+ return CudaVersion::CUDA_117;
+ if (raw_version < 11090)
+ return CudaVersion::CUDA_118;
return CudaVersion::NEW;
}
@@ -572,6 +578,9 @@ void NVPTX::getNVPTXTargetFeatures(const Driver &D, const llvm::Triple &Triple,
case CudaVersion::CUDA_##CUDA_VER: \
PtxFeature = "+ptx" #PTX_VER; \
break;
+ CASE_CUDA_VERSION(118, 78);
+ CASE_CUDA_VERSION(117, 77);
+ CASE_CUDA_VERSION(116, 76);
CASE_CUDA_VERSION(115, 75);
CASE_CUDA_VERSION(114, 74);
CASE_CUDA_VERSION(113, 73);
diff --git a/clang/test/Misc/target-invalid-cpu-note.c b/clang/test/Misc/target-invalid-cpu-note.c
index 0fa4d3164111d..7857e72eca065 100644
--- a/clang/test/Misc/target-invalid-cpu-note.c
+++ b/clang/test/Misc/target-invalid-cpu-note.c
@@ -29,7 +29,7 @@
// RUN: not %clang_cc1 -triple nvptx--- -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix NVPTX
// NVPTX: error: unknown target CPU 'not-a-cpu'
-// NVPTX-NEXT: note: valid target CPU values are: sm_20, sm_21, sm_30, sm_32, sm_35, sm_37, sm_50, sm_52, sm_53, sm_60, sm_61, sm_62, sm_70, sm_72, sm_75, sm_80, sm_86, gfx600, gfx601, gfx602, gfx700, gfx701, gfx702, gfx703, gfx704, gfx705, gfx801, gfx802, gfx803, gfx805, gfx810, gfx900, gfx902, gfx904, gfx906, gfx908, gfx909, gfx90a, gfx90c, gfx940, gfx1010, gfx1011, gfx1012, gfx1013, gfx1030, gfx1031, gfx1032, gfx1033, gfx1034, gfx1035, gfx1036, gfx1100, gfx1101, gfx1102, gfx1103{{$}}
+// NVPTX-NEXT: note: valid target CPU values are: sm_20, sm_21, sm_30, sm_32, sm_35, sm_37, sm_50, sm_52, sm_53, sm_60, sm_61, sm_62, sm_70, sm_72, sm_75, sm_80, sm_86, sm_87, sm_89, sm_90, gfx600, gfx601, gfx602, gfx700, gfx701, gfx702, gfx703, gfx704, gfx705, gfx801, gfx802, gfx803, gfx805, gfx810, gfx900, gfx902, gfx904, gfx906, gfx908, gfx909, gfx90a, gfx90c, gfx940, gfx1010, gfx1011, gfx1012, gfx1013, gfx1030, gfx1031, gfx1032, gfx1033, gfx1034, gfx1035, gfx1036, gfx1100, gfx1101, gfx1102, gfx1103{{$}}
// RUN: not %clang_cc1 -triple r600--- -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix R600
// R600: error: unknown target CPU 'not-a-cpu'
diff --git a/llvm/lib/Target/NVPTX/NVPTX.td b/llvm/lib/Target/NVPTX/NVPTX.td
index 7af927aba64e9..dcdd1286df382 100644
--- a/llvm/lib/Target/NVPTX/NVPTX.td
+++ b/llvm/lib/Target/NVPTX/NVPTX.td
@@ -59,6 +59,12 @@ def SM80 : SubtargetFeature<"sm_80", "SmVersion", "80",
"Target SM 8.0">;
def SM86 : SubtargetFeature<"sm_86", "SmVersion", "86",
"Target SM 8.6">;
+def SM87 : SubtargetFeature<"sm_87", "SmVersion", "87",
+ "Target SM 8.7">;
+def SM89 : SubtargetFeature<"sm_89", "SmVersion", "89",
+ "Target SM 8.9">;
+def SM90 : SubtargetFeature<"sm_90", "SmVersion", "90",
+ "Target SM 9.0">;
// PTX Versions
def PTX32 : SubtargetFeature<"ptx32", "PTXVersion", "32",
@@ -95,6 +101,12 @@ def PTX74 : SubtargetFeature<"ptx74", "PTXVersion", "74",
"Use PTX version 7.4">;
def PTX75 : SubtargetFeature<"ptx75", "PTXVersion", "75",
"Use PTX version 7.5">;
+def PTX76 : SubtargetFeature<"ptx76", "PTXVersion", "76",
+ "Use PTX version 7.6">;
+def PTX77 : SubtargetFeature<"ptx77", "PTXVersion", "77",
+ "Use PTX version 7.7">;
+def PTX78 : SubtargetFeature<"ptx78", "PTXVersion", "78",
+ "Use PTX version 7.8">;
//===----------------------------------------------------------------------===//
// NVPTX supported processors.
@@ -120,6 +132,9 @@ def : Proc<"sm_72", [SM72, PTX61]>;
def : Proc<"sm_75", [SM75, PTX63]>;
def : Proc<"sm_80", [SM80, PTX70]>;
def : Proc<"sm_86", [SM86, PTX71]>;
+def : Proc<"sm_87", [SM87, PTX74]>;
+def : Proc<"sm_89", [SM89, PTX78]>;
+def : Proc<"sm_90", [SM90, PTX78]>;
def NVPTXInstrInfo : InstrInfo {
}
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