[PATCH] D134797: [X86][vectorcall] Make floating-type passed by value to match with MSVC
Reid Kleckner via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Wed Sep 28 11:29:31 PDT 2022
rnk added inline comments.
================
Comment at: clang/lib/CodeGen/TargetInfo.cpp:1858-1859
}
- return getIndirectResult(Ty, /*ByVal=*/false, State);
+ bool ByVal = IsVectorCall && Ty->isFloatingType();
+ return getIndirectResult(Ty, ByVal, State);
}
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I would try to refactor this so that the vectorcall HFA that can't be passed in SSE regs falls through to the following logic. I suspect that it correctly handles each case that we care about:
- double: direct
- vector: indirect for alignment
- aggregate: indirect for alignment, any HFA will presumably be aligned to more than 32bits
================
Comment at: clang/test/CodeGen/vectorcall.c:157
+// X86-SAME: <4 x float> inreg noundef %xmm5,
+// X86-SAME: double* noundef byval(double) align 4 %0)
#endif
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Why not pass the double directly? That should be ABI compatible:
https://gcc.godbolt.org/z/W4rjn63b5
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D134797/new/
https://reviews.llvm.org/D134797
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