[PATCH] D132531: [AArch64] Reserve more physical registers

[Kristof Beyls via Phabricator via cfe-commits]

kristof.beyls added a comment.

My understanding is that X8, X16, X17 and X19 cannot be reserved because the code generator in places will make use of them.
For example, using X19 as a base register in some cases. X16 and X17 are defined by the ABI to potentially be clobbered on function calls & when a veneer needs to be inserted by a linker, it does get clobbered. IIRC, some of the security mitigations implemented in LLVM also clobber these 2 registers on function calls.
I'm not fully sure why X8 cannot be reserved.

In short, I don't think it's a good idea to enable users to reserve these registers as the compiler/toolchain/ABI will not respect their request to reserve these registers.

It seems your motivation for being able to reserve more registers is to be able to more easily write regression test for register allocation.
Are there other ways to achieve that?


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https://reviews.llvm.org/D132531