[PATCH] D121670: [RISCV] Add zihintntl instructions
Shao-Ce SUN via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Sun Aug 21 21:06:41 PDT 2022
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG7167a4207ee2: [RISCV] Add zihintntl instructions (authored by sunshaoce).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D121670/new/
https://reviews.llvm.org/D121670
Files:
clang/test/Preprocessor/riscv-target-features.c
llvm/lib/Support/RISCVISAInfo.cpp
llvm/lib/Target/RISCV/RISCV.td
llvm/lib/Target/RISCV/RISCVInstrInfo.td
llvm/lib/Target/RISCV/RISCVSubtarget.h
llvm/test/CodeGen/RISCV/attributes.ll
llvm/test/MC/RISCV/rv32zihintntl-valid.s
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