[PATCH] D131718: [HLSL] Add abs library function

Chris Bieneman via Phabricator via cfe-commits cfe-commits at lists.llvm.org
Thu Aug 11 13:53:48 PDT 2022


beanz updated this revision to Diff 451974.
beanz added a comment.

Adding missing test coverage for 64-bit types


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D131718/new/

https://reviews.llvm.org/D131718

Files:
  clang/lib/Headers/hlsl/hlsl_intrinsics.h
  clang/test/CodeGenHLSL/builtins/abs.hlsl


Index: clang/test/CodeGenHLSL/builtins/abs.hlsl
===================================================================
--- /dev/null
+++ clang/test/CodeGenHLSL/builtins/abs.hlsl
@@ -0,0 +1,42 @@
+// RUN: %clang_cc1 -std=hlsl2021 -finclude-default-header -x hlsl -triple dxil-pc-shadermodel6.3-library %s -emit-llvm -disable-llvm-passes -o - | FileCheck %s
+
+
+float abs_float(float X) {
+  return abs(X);
+}
+
+// CHECK: define noundef float @"?abs_float@@YAMM at Z"(
+// CHECK: call float @llvm.fabs.f32(float %0)
+
+double abs_double(double X) {
+  return abs(X);
+}
+
+// CHECK: define noundef double @"?abs_double@@YANN at Z"(
+// CHECK: call double @llvm.fabs.f64(double %0)
+
+int abs_int(int X) {
+  return abs(X);
+}
+
+// CHECK: define noundef i32 @"?abs_int@@YAHH at Z"(i32
+// CHECK:         [[A_ADDR:%.*]] = alloca i32, align 4
+// CHECK-NEXT:    store i32 [[A:%.*]], ptr [[A_ADDR]], align 4
+// CHECK-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
+// CHECK-NEXT:    [[NEG:%.*]] = sub nsw i32 0, [[TMP0]]
+// CHECK-NEXT:    [[ABSCOND:%.*]] = icmp slt i32 [[TMP0]], 0
+// CHECK-NEXT:    [[ABS:%.*]] = select i1 [[ABSCOND]], i32 [[NEG]], i32 [[TMP0]]
+// CHECK-NEXT:    ret i32 [[ABS]]
+
+int64_t abs_int64(int64_t X) {
+  return abs(X);
+}
+
+// CHECK: define noundef i64 @"?abs_int64@@YAJJ at Z"(i64
+// CHECK:         [[A_ADDR:%.*]] = alloca i64, align 8
+// CHECK-NEXT:    store i64 [[A:%.*]], ptr [[A_ADDR]], align 8
+// CHECK-NEXT:    [[TMP0:%.*]] = load i64, ptr [[A_ADDR]], align 8
+// CHECK-NEXT:    [[NEG:%.*]] = sub nsw i64 0, [[TMP0]]
+// CHECK-NEXT:    [[ABSCOND:%.*]] = icmp slt i64 [[TMP0]], 0
+// CHECK-NEXT:    [[ABS:%.*]] = select i1 [[ABSCOND]], i64 [[NEG]], i64 [[TMP0]]
+// CHECK-NEXT:    ret i64 [[ABS]]
Index: clang/lib/Headers/hlsl/hlsl_intrinsics.h
===================================================================
--- clang/lib/Headers/hlsl/hlsl_intrinsics.h
+++ clang/lib/Headers/hlsl/hlsl_intrinsics.h
@@ -12,4 +12,9 @@
 __attribute__((clang_builtin_alias(__builtin_hlsl_wave_active_count_bits))) uint
 WaveActiveCountBits(bool bBit);
 
+__attribute__((clang_builtin_alias(__builtin_abs))) int abs(int In);
+__attribute__((clang_builtin_alias(__builtin_labs))) int64_t abs(int64_t In);
+__attribute__((clang_builtin_alias(__builtin_fabsf))) float abs(float In);
+__attribute__((clang_builtin_alias(__builtin_fabs))) double abs(double In);
+
 #endif //_HLSL_HLSL_INTRINSICS_H_


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