[PATCH] D131635: [RISCV] Remove sifive-7-rv32/rv64 CPU names.
Craig Topper via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Wed Aug 10 17:06:48 PDT 2022
craig.topper created this revision.
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These only exist to give -mtune=sifive-7-series something to
alias to. This aliasing made them valid -mcpu options, but they
aren't real product names and gcc doesn't support them with -mcpu.
Instead alias sifive-7-series to sifive-e76 and sifive-76.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D131635
Files:
clang/test/Driver/riscv-cpus.c
clang/test/Misc/target-invalid-cpu-note.c
llvm/include/llvm/Support/RISCVTargetParser.def
llvm/lib/Target/RISCV/RISCV.td
llvm/test/Transforms/LoopUnroll/RISCV/unroll.ll
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