[clang] 67480b3 - [clang-format] Handle Verilog blocks

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Thu Jul 28 17:39:04 PDT 2022


Author: sstwcw
Date: 2022-07-29T00:38:30Z
New Revision: 67480b360ca0dcc33fe3126d0602b3d358dfbc6f

URL: https://github.com/llvm/llvm-project/commit/67480b360ca0dcc33fe3126d0602b3d358dfbc6f
DIFF: https://github.com/llvm/llvm-project/commit/67480b360ca0dcc33fe3126d0602b3d358dfbc6f.diff

LOG: [clang-format] Handle Verilog blocks

Now stuff inside begin-end blocks get indented.

Some tests are moved into FormatTestVerilog.Block from
FormatTestVerilog.If because they have nothing to do with if statements.

Reviewed By: HazardyKnusperkeks, owenpan

Differential Revision: https://reviews.llvm.org/D128711

Added: 
    

Modified: 
    clang/lib/Format/FormatToken.h
    clang/lib/Format/TokenAnnotator.cpp
    clang/lib/Format/UnwrappedLineParser.cpp
    clang/unittests/Format/FormatTestVerilog.cpp
    clang/unittests/Format/TokenAnnotatorTest.cpp

Removed: 
    


################################################################################
diff  --git a/clang/lib/Format/FormatToken.h b/clang/lib/Format/FormatToken.h
index 3e7e07fbc97c..abd386d98b83 100644
--- a/clang/lib/Format/FormatToken.h
+++ b/clang/lib/Format/FormatToken.h
@@ -135,6 +135,8 @@ namespace format {
   TYPE(UnaryOperator)                                                          \
   TYPE(UnionLBrace)                                                            \
   TYPE(UntouchableMacroFunc)                                                   \
+  /* like in begin : block */                                                  \
+  TYPE(VerilogBlockLabelColon)                                                 \
   /* for the base in a number literal, not including the quote */              \
   TYPE(VerilogNumberBase)                                                      \
   TYPE(Unknown)
@@ -995,6 +997,7 @@ struct AdditionalKeywords {
     kw_when = &IdentTable.get("when");
     kw_where = &IdentTable.get("where");
 
+    // Verilog keywords
     kw_always = &IdentTable.get("always");
     kw_always_comb = &IdentTable.get("always_comb");
     kw_always_ff = &IdentTable.get("always_ff");

diff  --git a/clang/lib/Format/TokenAnnotator.cpp b/clang/lib/Format/TokenAnnotator.cpp
index 2c4ea9fbbb33..560a1a30ca8c 100644
--- a/clang/lib/Format/TokenAnnotator.cpp
+++ b/clang/lib/Format/TokenAnnotator.cpp
@@ -947,6 +947,12 @@ class AnnotatingParser {
           Tok->setType(TT_CSharpNamedArgumentColon);
           break;
         }
+      } else if (Style.isVerilog() && Tok->isNot(TT_BinaryOperator)) {
+        if (Keywords.isVerilogEnd(*Tok->Previous) ||
+            Keywords.isVerilogBegin(*Tok->Previous)) {
+          Tok->setType(TT_VerilogBlockLabelColon);
+        }
+        break;
       }
       if (Line.First->isOneOf(Keywords.kw_module, Keywords.kw_import) ||
           Line.First->startsSequence(tok::kw_export, Keywords.kw_module) ||

diff  --git a/clang/lib/Format/UnwrappedLineParser.cpp b/clang/lib/Format/UnwrappedLineParser.cpp
index b936f73d70fa..d0bfc68fdd6d 100644
--- a/clang/lib/Format/UnwrappedLineParser.cpp
+++ b/clang/lib/Format/UnwrappedLineParser.cpp
@@ -1888,6 +1888,14 @@ void UnwrappedLineParser::parseStructuralElement(
         return;
       }
 
+      if (Style.isVerilog()) {
+        if (Keywords.isVerilogBegin(*FormatTok)) {
+          parseBlock();
+          addUnwrappedLine();
+          return;
+        }
+      }
+
       if (FormatTok->is(Keywords.kw_interface)) {
         if (parseStructLike())
           return;

diff  --git a/clang/unittests/Format/FormatTestVerilog.cpp b/clang/unittests/Format/FormatTestVerilog.cpp
index 5c887e533115..30fe334a83f5 100644
--- a/clang/unittests/Format/FormatTestVerilog.cpp
+++ b/clang/unittests/Format/FormatTestVerilog.cpp
@@ -66,6 +66,56 @@ TEST_F(FormatTestVerilog, BasedLiteral) {
   verifyFormat("x = 16'sd?;");
 }
 
+TEST_F(FormatTestVerilog, Block) {
+  verifyFormat("begin\n"
+               "  x = x;\n"
+               "end");
+  verifyFormat("begin : x\n"
+               "  x = x;\n"
+               "end : x");
+  verifyFormat("begin\n"
+               "  x = x;\n"
+               "  x = x;\n"
+               "end");
+  verifyFormat("fork\n"
+               "  x = x;\n"
+               "join");
+  verifyFormat("fork\n"
+               "  x = x;\n"
+               "join_any");
+  verifyFormat("fork\n"
+               "  x = x;\n"
+               "join_none");
+  verifyFormat("generate\n"
+               "  x = x;\n"
+               "endgenerate");
+  verifyFormat("generate : x\n"
+               "  x = x;\n"
+               "endgenerate : x");
+  // Nested blocks.
+  verifyFormat("begin\n"
+               "  begin\n"
+               "  end\n"
+               "end");
+  verifyFormat("begin : x\n"
+               "  begin\n"
+               "  end\n"
+               "end : x");
+  verifyFormat("begin : x\n"
+               "  begin : x\n"
+               "  end : x\n"
+               "end : x");
+  verifyFormat("begin\n"
+               "  begin : x\n"
+               "  end : x\n"
+               "end");
+  // Test that 'disable fork' and 'rand join' don't get mistaken as blocks.
+  verifyFormat("disable fork;\n"
+               "x = x;");
+  verifyFormat("rand join x x;\n"
+               "x = x;");
+}
+
 TEST_F(FormatTestVerilog, Delay) {
   // Delay by the default unit.
   verifyFormat("#0;");
@@ -129,10 +179,6 @@ TEST_F(FormatTestVerilog, If) {
                "  x = x;\n"
                "  x = x;\n"
                "end");
-  verifyFormat("disable fork;\n"
-               "x = x;");
-  verifyFormat("rand join x x;\n"
-               "x = x;");
   verifyFormat("if (x) fork\n"
                "  x = x;\n"
                "join");

diff  --git a/clang/unittests/Format/TokenAnnotatorTest.cpp b/clang/unittests/Format/TokenAnnotatorTest.cpp
index 13c03414966d..afc673961caf 100644
--- a/clang/unittests/Format/TokenAnnotatorTest.cpp
+++ b/clang/unittests/Format/TokenAnnotatorTest.cpp
@@ -825,6 +825,12 @@ TEST_F(TokenAnnotatorTest, UnderstandsVerilogOperators) {
   ASSERT_EQ(Tokens.size(), 7u) << Tokens;
   EXPECT_TOKEN(Tokens[2], tok::tilde, TT_UnaryOperator);
   EXPECT_TOKEN(Tokens[3], tok::pipe, TT_UnaryOperator);
+  // Test for block label colons.
+  Tokens = Annotate("begin : x\n"
+                    "end : x");
+  ASSERT_EQ(Tokens.size(), 7u);
+  EXPECT_TOKEN(Tokens[1], tok::colon, TT_VerilogBlockLabelColon);
+  EXPECT_TOKEN(Tokens[4], tok::colon, TT_VerilogBlockLabelColon);
 }
 
 } // namespace


        


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