[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.
Kito Cheng via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Tue Jul 26 00:39:13 PDT 2022
kito-cheng marked 9 inline comments as done.
kito-cheng added a comment.
@aaron.ballman thanks for your review!
================
Comment at: clang/include/clang/Support/RISCVVIntrinsicUtils.h:400
+ // Number of fields, greater than 1 if it's segment load/store.
+ uint8_t NF;
+};
----------------
aaron.ballman wrote:
>
That the term used in RVV spec, so I keep this as `NF` :)
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D111617/new/
https://reviews.llvm.org/D111617
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