[PATCH] D129802: [DRAFT] Implementing new atomic orderings in LLVM and generate barriers for legacy __sync builtins . Support corresponding memory model in outline atomics as well.

[Pavel Iliin via Phabricator via cfe-commits]

ilinpv created this revision.
ilinpv added reviewers: sebpop, efriedma, t.p.northover, jyknight.
Herald added a reviewer: deadalnix.
Herald added subscribers: jsji, Enna1, luke957, ormris, frasercrmck, luismarques, apazos, sameer.abuasal, pengfei, s.egerton, Jim, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, rogfer01, steven_wu, edward-jones, zzheng, jrtc27, niosHD, sabuasal, simoncook, johnrusso, rbar, asb, hiraditya, kristof.beyls, arichardson, mgorny.
Herald added a project: All.
ilinpv requested review of this revision.
Herald added subscribers: llvm-commits, Sanitizers, cfe-commits, pcwang-thead, MaskRay.
Herald added projects: clang, Sanitizers, LLVM.

The patch represents current effort to introduce new "sync_acq", "sync_rel",  "sync_seq_cst" atomic orderings in LLVM. They used in __sync builtins to generate additional barriers.
It also includes new outline atomics used for these orderings.
The work is in progress. I decided to share it with community early on to get feedback and opinions if it is the right way to implement it.
At this moment it is implemented for AArch64 ( aarch64-sync-builtins.ll tests) and I give it a try for RISCV ( but it is not working yet, sync-builtins.ll tests show wrong codegen ). It can affect all targets.
It would be good to know if there are need on other targets to make __sync builtins stonger ( https://gcc.gnu.org/onlinedocs/gcc/_005f_005fsync-Builtins.html ) like gcc does. I would appriciate any comments and knowledge sharing on this topic. Thank you in advance!
Motivation and requests for this work:
https://reviews.llvm.org/D91157
https://github.com/llvm/llvm-project/issues/29472


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D129802

Files:
  clang/lib/CodeGen/CGBuiltin.cpp
  clang/lib/CodeGen/CGStmtOpenMP.cpp
  clang/test/CodeGen/2010-01-13-MemBarrier.c
  clang/test/CodeGen/Atomics.c
  clang/test/CodeGen/X86/x86_64-atomic-128.c
  clang/test/CodeGen/atomic.c
  clang/test/CodeGenCXX/atomic.cpp
  compiler-rt/lib/builtins/CMakeLists.txt
  compiler-rt/lib/builtins/aarch64/lse.S
  llvm/include/llvm-c/Core.h
  llvm/include/llvm/AsmParser/LLToken.h
  llvm/include/llvm/Bitcode/LLVMBitCodes.h
  llvm/include/llvm/IR/Instruction.h
  llvm/include/llvm/IR/Instructions.h
  llvm/include/llvm/IR/RuntimeLibcalls.def
  llvm/include/llvm/Support/AtomicOrdering.h
  llvm/include/llvm/Target/TargetSelectionDAG.td
  llvm/lib/AsmParser/LLLexer.cpp
  llvm/lib/AsmParser/LLParser.cpp
  llvm/lib/Bitcode/Reader/BitcodeReader.cpp
  llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
  llvm/lib/CodeGen/AtomicExpandPass.cpp
  llvm/lib/CodeGen/MIRParser/MIParser.cpp
  llvm/lib/CodeGen/TargetLoweringBase.cpp
  llvm/lib/IR/Core.cpp
  llvm/lib/IR/Verifier.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/RISCV/RISCVExpandAtomicPseudoInsts.cpp
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/lib/Target/RISCV/RISCVInstrInfo.td
  llvm/lib/Target/RISCV/RISCVInstrInfoA.td
  llvm/lib/Transforms/Instrumentation/DataFlowSanitizer.cpp
  llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
  llvm/lib/Transforms/Instrumentation/ThreadSanitizer.cpp
  llvm/test/CodeGen/AArch64/aarch64-sync-builtins.ll
  llvm/test/CodeGen/RISCV/sync-builtins.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D129802.444768.patch
Type: text/x-patch
Size: 127809 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/cfe-commits/attachments/20220714/3a629c9e/attachment-0001.bin>