[PATCH] D129461: [PowerPC] Support x86 compatible intrinsics on AIX

[Qiu Chaofan via Phabricator via cfe-commits]

qiucf added inline comments.


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Comment at: clang/test/CodeGen/PowerPC/ppc-emmintrin.c:631
 // CHECK: %[[ADDR:[0-9a-zA-Z_.]+]] = load double*, double** %{{[0-9a-zA-Z_.]+}}, align 8
-// CHECK: %[[VAL:[0-9a-zA-Z_.]+]] = load double, double* %[[ADDR]], align 8
+// CHECK: %[[VAL:[0-9a-zA-Z_.]+]] = load double, double* %[[ADDR]]
 // CHECK: call <2 x double> @vec_splats(double)(double noundef %[[VAL]])
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shchenz wrote:
> Maybe worth investigating here why loading a double on AIX64 is not aligned to 8. This should be separated from this patch
It's from D79719


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D129461/new/

https://reviews.llvm.org/D129461