[PATCH] D128612: RISC-V big-endian support implementation

[Guy Benyei via Phabricator via cfe-commits]

gbenyei marked 3 inline comments as done.
gbenyei added inline comments.


================
Comment at: llvm/lib/ExecutionEngine/JITLink/ELF_riscv.cpp:554
         .buildGraph();
-  } else {
-    assert((*ELFObj)->getArch() == Triple::riscv32 &&
-           "Invalid triple for RISCV ELF object file");
+  } else if ((*ELFObj)->getArch() == Triple::riscv64be) {
+    auto &ELFObjFile = cast<object::ELFObjectFile<object::ELF64BE>>(**ELFObj);
----------------
gbenyei wrote:
> jrtc27 wrote:
> > Why switch to this order when before you've used 32, 64, 32be, 64be as the order
> The order in the code before my changes is 64, 32. I guess for no good reason, but I prefer not to re-order code while implementing a feature - it trashes git history.
Removed this part anyway - JIT is out of scope for this commit. Thanks.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D128612/new/

https://reviews.llvm.org/D128612