[PATCH] D103874: [IR] Rename the shufflevector's undef mask to poison

Juneyoung Lee via Phabricator via cfe-commits cfe-commits at lists.llvm.org
Mon Jun 27 01:58:27 PDT 2022


aqjune added a comment.

In D103874#3594617 <https://reviews.llvm.org/D103874#3594617>, @aqjune wrote:

> It seems llvm/lib/Target/X86/X86ISelLowering.cpp's LowerAVXCONCAT_VECTORS is relevant to efficient lowering of `shufflevector %x, freeze(poison), mask`.

After patching `LowerAVXCONCAT_VECTORS`, lowering https://github.com/llvm/llvm-project/blob/main/llvm/test/CodeGen/X86/avx-intrinsics-fast-isel.ll#L257 generates:

  vblendps  $15, %ymm0, %ymm0, %ymm0

To make it fully no-op, tablegen files must be edited. I gave it a try, `.td` compiled successfully, but weirdly - perhaps due to either incorrect use of tablegen's pattern matcher or some hidden rule that I didn't address - `vblendps` is still there. The written patch is as follows:
https://github.com/aqjune/llvm-project/commit/b4393e36b33ca08ce77ae662479ceaf9a76eab8b

One of relevant, edited parts:

  // llvm/lib/Target/X86/X86InstrVecCompiler.td
    def : Pat<(VT (insert_subvector undef, subRC:$src, (iPTR 0))),
              (VT (INSERT_SUBREG (IMPLICIT_DEF), subRC:$src, subIdx))>;
  +
  +  def : Pat<(VT (insert_subvector (freeze undef), subRC:$src, (iPTR 0))),
  +            (VT (INSERT_SUBREG (IMPLICIT_DEF), subRC:$src, subIdx))>;

I spent some time but couldn't figure out why it does not work.
Can someone tell me whether the pattern matching is being correctly used? Any help is appreciated.


Repository:
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CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D103874/new/

https://reviews.llvm.org/D103874



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