[PATCH] D124749: [clang-format] Handle Verilog preprocessor directives

[Björn Schäpers via Phabricator via cfe-commits]

HazardyKnusperkeks accepted this revision.
HazardyKnusperkeks added inline comments.
This revision is now accepted and ready to land.
Herald added a subscriber: nlopes.


================
Comment at: clang/lib/Format/FormatToken.h:982
 
     kw_always = &IdentTable.get("always");
     kw_always_comb = &IdentTable.get("always_comb");
----------------
It seems a comment before is missing. Should be fixed in a separate patch.


================
Comment at: clang/lib/Format/FormatToken.h:1142
+    VerilogExtraKeywords =
+        std::unordered_set<IdentifierInfo *>({kw_always,
+                                              kw_always_comb,
----------------
sstwcw wrote:
> Now that I added `kw_` to `verilogHashHash`, four columns can't fit.
Happens. :)


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D124749/new/

https://reviews.llvm.org/D124749