[PATCH] D124749: [clang-format] Handle Verilog preprocessor directives

[sstwcw via Phabricator via cfe-commits]

sstwcw added a comment.

The two parents of this revision change the same file, so the build bot says patch does not apply.  Does that mean I have to submit the parent patches with less context?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D124749/new/

https://reviews.llvm.org/D124749