[PATCH] D124749: [clang-format] Handle Verilog preprocessor directives
sstwcw via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Sun May 15 06:28:52 PDT 2022
sstwcw added a comment.
The two parents of this revision change the same file, so the build bot says patch does not apply. Does that mean I have to submit the parent patches with less context?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D124749/new/
https://reviews.llvm.org/D124749
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