[PATCH] D125350: [RFC][Clang] Add a check if the target supports atomicrmw instruction with specific operator and type
Shilei Tian via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Tue May 10 20:31:17 PDT 2022
tianshilei1992 added a comment.
As for the test, here is a simple code snippet:
#pragma omp begin declare target device_type(nohost)
void foo() {
double x, y;
#pragma omp atomic update
x += y;
}
#pragma omp end declare target
`sm_35` doesn't support `FAdd` with `double` type, then it emits:
define protected void @foo() #0 {
entry:
%x = alloca double, align 8
%y = alloca double, align 8
%atomic-temp = alloca double, align 8
%0 = load double, ptr %y, align 8
%atomic-load = load atomic i64, ptr %x monotonic, align 8
br label %atomic_cont
atomic_cont: ; preds = %atomic_cont, %entry
%1 = phi i64 [ %atomic-load, %entry ], [ %5, %atomic_cont ]
%2 = bitcast i64 %1 to double
%add = fadd double %2, %0
store double %add, ptr %atomic-temp, align 8
%3 = load i64, ptr %atomic-temp, align 8
%4 = cmpxchg ptr %x, i64 %1, i64 %3 monotonic monotonic, align 8
%5 = extractvalue { i64, i1 } %4, 0
%6 = extractvalue { i64, i1 } %4, 1
br i1 %6, label %atomic_exit, label %atomic_cont
atomic_exit: ; preds = %atomic_cont
ret void
}
Starting from `sm_60`, it is supported, now we emits:
define protected void @foo() #0 {
entry:
%x = alloca double, align 8
%y = alloca double, align 8
%0 = load double, ptr %y, align 8
%1 = atomicrmw fadd ptr %x, double %0 monotonic, align 8
ret void
}
Repository:
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https://reviews.llvm.org/D125350/new/
https://reviews.llvm.org/D125350
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