[PATCH] D117112: [AArch64] Support for Ampere1 core
Dave Green via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Thu Apr 28 00:42:59 PDT 2022
dmgreen accepted this revision.
dmgreen added a comment.
This revision is now accepted and ready to land.
I don't know the details of the scheduling latencies for the core, but this looks perfectly sensible. There are a few comments inline, but other than those this patch LGTM.
Comment at: llvm/include/llvm/Support/AArch64TargetParser.def:296
+ (AArch64::AEK_FP16 | AArch64::AEK_MTE | AArch64::AEK_SB |
// Invalid CPU
The formatting is a bit off here.
Comment at: llvm/lib/Target/AArch64/AArch64.td:1082
FeatureFullFP16, FeatureFP16FML, FeatureDotProd];
+ list<SubtargetFeature> Ampere1 = [HasV8_6aOps, FeatureNEON, FeaturePerfMon];
Should this include SSBS and MTE too, if they are included in the target parsing?
Comment at: llvm/lib/Target/AArch64/AArch64Subtarget.h:83
> This list can be alphabetical.
This still needs to be alphabetical
rG LLVM Github Monorepo
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