[PATCH] D123450: [clang-format] Parse Verilog if statements

[MyDeveloperDay via Phabricator via cfe-commits]

MyDeveloperDay added a comment.

As first passes for adding a new language I think this looks pretty good.

``if (Keywords.isBlockBegin(*FormatTok, Style)) {``

I'm not a massive fan of handling l_brace and begin and end as the same thing, I might be tempted to handle them separately, as then its clear what is happening, but I don't think I'd block it for that.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D123450/new/

https://reviews.llvm.org/D123450