[clang] 1b1466c - [AArch64] Adjust aarch64 constrained intrinsics tests and un-XFAIL
John Brawn via cfe-commits
cfe-commits at lists.llvm.org
Thu Apr 14 08:51:45 PDT 2022
Author: John Brawn
Date: 2022-04-14T16:51:22+01:00
New Revision: 1b1466c346694c02ff0e30c96a50701b58bc4830
URL: https://github.com/llvm/llvm-project/commit/1b1466c346694c02ff0e30c96a50701b58bc4830
DIFF: https://github.com/llvm/llvm-project/commit/1b1466c346694c02ff0e30c96a50701b58bc4830.diff
LOG: [AArch64] Adjust aarch64 constrained intrinsics tests and un-XFAIL
Remove the checking of the generated asm, as that's already tested
elsewhere, and adjust some tests that were expecting the wrong
intrinsic to be generated.
Differential Revision: https://reviews.llvm.org/D118259
Added:
Modified:
clang/test/CodeGen/aarch64-neon-intrinsics-constrained.c
clang/test/CodeGen/aarch64-v8.2a-fp16-intrinsics-constrained.c
Removed:
################################################################################
diff --git a/clang/test/CodeGen/aarch64-neon-intrinsics-constrained.c b/clang/test/CodeGen/aarch64-neon-intrinsics-constrained.c
index fccafefd9d30c..e8c6b32128ffa 100644
--- a/clang/test/CodeGen/aarch64-neon-intrinsics-constrained.c
+++ b/clang/test/CodeGen/aarch64-neon-intrinsics-constrained.c
@@ -1,27 +1,15 @@
// RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon \
// RUN: -fallow-half-arguments-and-returns -S -disable-O0-optnone \
// RUN: -flax-vector-conversions=none -emit-llvm -o - %s | opt -S -mem2reg \
-// RUN: | FileCheck --check-prefix=COMMON --check-prefix=COMMONIR --check-prefix=UNCONSTRAINED %s
+// RUN: | FileCheck --check-prefixes=COMMON,COMMONIR,UNCONSTRAINED %s
// RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon \
// RUN: -fallow-half-arguments-and-returns -S -disable-O0-optnone \
-// RUN: -ffp-exception-behavior=strict \
+// RUN: -ffp-exception-behavior=strict -fexperimental-strict-floating-point \
// RUN: -flax-vector-conversions=none -emit-llvm -o - %s | opt -S -mem2reg \
-// RUN: | FileCheck --check-prefix=COMMON --check-prefix=COMMONIR --check-prefix=CONSTRAINED %s
-// RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon \
-// RUN: -fallow-half-arguments-and-returns -S -disable-O0-optnone \
-// RUN: -flax-vector-conversions=none -o - %s \
-// RUN: | FileCheck --check-prefix=COMMON --check-prefix=CHECK-ASM %s
-// RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon \
-// RUN: -fallow-half-arguments-and-returns -S -disable-O0-optnone \
-// RUN: -ffp-exception-behavior=strict \
-// RUN: -flax-vector-conversions=none -o - %s \
-// RUN: | FileCheck --check-prefix=COMMON --check-prefix=CHECK-ASM %s
+// RUN: | FileCheck --check-prefixes=COMMON,COMMONIR,CONSTRAINED %s
// REQUIRES: aarch64-registered-target
-// Fails during instruction selection:
-// XFAIL: *
-
// Test new aarch64 intrinsics and types but constrained
#include <arm_neon.h>
@@ -29,7 +17,6 @@
// COMMON-LABEL: test_vadd_f32
// UNCONSTRAINED: [[ADD_I:%.*]] = fadd <2 x float> %v1, %v2
// CONSTRAINED: [[ADD_I:%.*]] = call <2 x float> @llvm.experimental.constrained.fadd.v2f32(<2 x float> %v1, <2 x float> %v2, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM: fadd v{{[0-9]+}}.2s, v{{[0-9]+}}.2s, v{{[0-9]+}}.2s
// COMMONIR: ret <2 x float> [[ADD_I]]
float32x2_t test_vadd_f32(float32x2_t v1, float32x2_t v2) {
return vadd_f32(v1, v2);
@@ -38,7 +25,6 @@ float32x2_t test_vadd_f32(float32x2_t v1, float32x2_t v2) {
// COMMON-LABEL: test_vaddq_f32
// UNCONSTRAINED: [[ADD_I:%.*]] = fadd <4 x float> %v1, %v2
// CONSTRAINED: [[ADD_I:%.*]] = call <4 x float> @llvm.experimental.constrained.fadd.v4f32(<4 x float> %v1, <4 x float> %v2, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM: fadd v{{[0-9]+}}.4s, v{{[0-9]+}}.4s, v{{[0-9]+}}.4s
// COMMONIR: ret <4 x float> [[ADD_I]]
float32x4_t test_vaddq_f32(float32x4_t v1, float32x4_t v2) {
return vaddq_f32(v1, v2);
@@ -47,7 +33,6 @@ float32x4_t test_vaddq_f32(float32x4_t v1, float32x4_t v2) {
// COMMON-LABEL: test_vsub_f32
// UNCONSTRAINED: [[SUB_I:%.*]] = fsub <2 x float> %v1, %v2
// CONSTRAINED: [[SUB_I:%.*]] = call <2 x float> @llvm.experimental.constrained.fsub.v2f32(<2 x float> %v1, <2 x float> %v2, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM: fsub v{{[0-9]+}}.2s, v{{[0-9]+}}.2s, v{{[0-9]+}}.2s
// COMMONIR: ret <2 x float> [[SUB_I]]
float32x2_t test_vsub_f32(float32x2_t v1, float32x2_t v2) {
return vsub_f32(v1, v2);
@@ -56,7 +41,6 @@ float32x2_t test_vsub_f32(float32x2_t v1, float32x2_t v2) {
// COMMON-LABEL: test_vsubq_f32
// UNCONSTRAINED: [[SUB_I:%.*]] = fsub <4 x float> %v1, %v2
// CONSTRAINED: [[SUB_I:%.*]] = call <4 x float> @llvm.experimental.constrained.fsub.v4f32(<4 x float> %v1, <4 x float> %v2, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM: fsub v{{[0-9]+}}.4s, v{{[0-9]+}}.4s, v{{[0-9]+}}.4s
// COMMONIR: ret <4 x float> [[SUB_I]]
float32x4_t test_vsubq_f32(float32x4_t v1, float32x4_t v2) {
return vsubq_f32(v1, v2);
@@ -65,7 +49,6 @@ float32x4_t test_vsubq_f32(float32x4_t v1, float32x4_t v2) {
// COMMON-LABEL: test_vsubq_f64
// UNCONSTRAINED: [[SUB_I:%.*]] = fsub <2 x double> %v1, %v2
// CONSTRAINED: [[SUB_I:%.*]] = call <2 x double> @llvm.experimental.constrained.fsub.v2f64(<2 x double> %v1, <2 x double> %v2, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM: fsub v{{[0-9]+}}.2d, v{{[0-9]+}}.2d, v{{[0-9]+}}.2d
// COMMONIR: ret <2 x double> [[SUB_I]]
float64x2_t test_vsubq_f64(float64x2_t v1, float64x2_t v2) {
return vsubq_f64(v1, v2);
@@ -74,7 +57,6 @@ float64x2_t test_vsubq_f64(float64x2_t v1, float64x2_t v2) {
// COMMON-LABEL: test_vmul_f32
// UNCONSTRAINED: [[MUL_I:%.*]] = fmul <2 x float> %v1, %v2
// CONSTRAINED: [[MUL_I:%.*]] = call <2 x float> @llvm.experimental.constrained.fmul.v2f32(<2 x float> %v1, <2 x float> %v2, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM: fmul v{{[0-9]+}}.2s, v{{[0-9]+}}.2s, v{{[0-9]+}}.2s
// COMMONIR: ret <2 x float> [[MUL_I]]
float32x2_t test_vmul_f32(float32x2_t v1, float32x2_t v2) {
return vmul_f32(v1, v2);
@@ -83,7 +65,6 @@ float32x2_t test_vmul_f32(float32x2_t v1, float32x2_t v2) {
// COMMON-LABEL: test_vmulq_f32
// UNCONSTRAINED: [[MUL_I:%.*]] = fmul <4 x float> %v1, %v2
// CONSTRAINED: [[MUL_I:%.*]] = call <4 x float> @llvm.experimental.constrained.fmul.v4f32(<4 x float> %v1, <4 x float> %v2, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM: fmul v{{[0-9]+}}.4s, v{{[0-9]+}}.4s, v{{[0-9]+}}.4s
// COMMONIR: ret <4 x float> [[MUL_I]]
float32x4_t test_vmulq_f32(float32x4_t v1, float32x4_t v2) {
return vmulq_f32(v1, v2);
@@ -92,7 +73,6 @@ float32x4_t test_vmulq_f32(float32x4_t v1, float32x4_t v2) {
// COMMON-LABEL: test_vmulq_f64
// UNCONSTRAINED: [[MUL_I:%.*]] = fmul <2 x double> %v1, %v2
// CONSTRAINED: [[MUL_I:%.*]] = call <2 x double> @llvm.experimental.constrained.fmul.v2f64(<2 x double> %v1, <2 x double> %v2, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM: fmul v{{[0-9]+}}.2d, v{{[0-9]+}}.2d, v{{[0-9]+}}.2d
// COMMONIR: ret <2 x double> [[MUL_I]]
float64x2_t test_vmulq_f64(float64x2_t v1, float64x2_t v2) {
return vmulq_f64(v1, v2);
@@ -101,10 +81,8 @@ float64x2_t test_vmulq_f64(float64x2_t v1, float64x2_t v2) {
// COMMON-LABEL: test_vmla_f32
// UNCONSTRAINED: [[MUL_I:%.*]] = fmul <2 x float> %v2, %v3
// CONSTRAINED: [[MUL_I:%.*]] = call <2 x float> @llvm.experimental.constrained.fmul.v2f32(<2 x float> %v2, <2 x float> %v3, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM: fmul [[MUL_R:v[0-9]+.2s]], v{{[0-9]+}}.2s, v{{[0-9]+}}.2s
// UNCONSTRAINED: [[ADD_I:%.*]] = fadd <2 x float> %v1, [[MUL_I]]
// CONSTRAINED: [[ADD_I:%.*]] = call <2 x float> @llvm.experimental.constrained.fadd.v2f32(<2 x float> %v1, <2 x float> [[MUL_I]], metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM-NEXT:fadd v{{[0-9]+}}.2s, v{{[0-9]+}}.2s, [[MUL_R]]
// COMMONIR: ret <2 x float> [[ADD_I]]
float32x2_t test_vmla_f32(float32x2_t v1, float32x2_t v2, float32x2_t v3) {
return vmla_f32(v1, v2, v3);
@@ -113,10 +91,8 @@ float32x2_t test_vmla_f32(float32x2_t v1, float32x2_t v2, float32x2_t v3) {
// COMMON-LABEL: test_vmlaq_f32
// UNCONSTRAINED: [[MUL_I:%.*]] = fmul <4 x float> %v2, %v3
// CONSTRAINED: [[MUL_I:%.*]] = call <4 x float> @llvm.experimental.constrained.fmul.v4f32(<4 x float> %v2, <4 x float> %v3, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM: fmul [[MUL_R:v[0-9]+.4s]], v{{[0-9]+}}.4s, v{{[0-9]+}}.4s
// UNCONSTRAINED: [[ADD_I:%.*]] = fadd <4 x float> %v1, [[MUL_I]]
// CONSTRAINED: [[ADD_I:%.*]] = call <4 x float> @llvm.experimental.constrained.fadd.v4f32(<4 x float> %v1, <4 x float> [[MUL_I]], metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM-NEXT:fadd v{{[0-9]+}}.4s, v{{[0-9]+}}.4s, [[MUL_R]]
// COMMONIR: ret <4 x float> [[ADD_I]]
float32x4_t test_vmlaq_f32(float32x4_t v1, float32x4_t v2, float32x4_t v3) {
return vmlaq_f32(v1, v2, v3);
@@ -125,10 +101,8 @@ float32x4_t test_vmlaq_f32(float32x4_t v1, float32x4_t v2, float32x4_t v3) {
// COMMON-LABEL: test_vmlaq_f64
// UNCONSTRAINED: [[MUL_I:%.*]] = fmul <2 x double> %v2, %v3
// CONSTRAINED: [[MUL_I:%.*]] = call <2 x double> @llvm.experimental.constrained.fmul.v2f64(<2 x double> %v2, <2 x double> %v3, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM: fmul [[MUL_R:v[0-9]+.2d]], v{{[0-9]+}}.2d, v{{[0-9]+}}.2d
// UNCONSTRAINED: [[ADD_I:%.*]] = fadd <2 x double> %v1, [[MUL_I]]
// CONSTRAINED: [[ADD_I:%.*]] = call <2 x double> @llvm.experimental.constrained.fadd.v2f64(<2 x double> %v1, <2 x double> [[MUL_I]], metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM-NEXT:fadd v{{[0-9]+}}.2d, v{{[0-9]+}}.2d, [[MUL_R]]
// COMMONIR: ret <2 x double> [[ADD_I]]
float64x2_t test_vmlaq_f64(float64x2_t v1, float64x2_t v2, float64x2_t v3) {
return vmlaq_f64(v1, v2, v3);
@@ -137,10 +111,8 @@ float64x2_t test_vmlaq_f64(float64x2_t v1, float64x2_t v2, float64x2_t v3) {
// COMMON-LABEL: test_vmls_f32
// UNCONSTRAINED: [[MUL_I:%.*]] = fmul <2 x float> %v2, %v3
// CONSTRAINED: [[MUL_I:%.*]] = call <2 x float> @llvm.experimental.constrained.fmul.v2f32(<2 x float> %v2, <2 x float> %v3, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM: fmul [[MUL_R:v[0-9]+.2s]], v{{[0-9]+}}.2s, v{{[0-9]+}}.2s
// UNCONSTRAINED: [[SUB_I:%.*]] = fsub <2 x float> %v1, [[MUL_I]]
// CONSTRAINED: [[SUB_I:%.*]] = call <2 x float> @llvm.experimental.constrained.fsub.v2f32(<2 x float> %v1, <2 x float> [[MUL_I]], metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM-NEXT:fsub v{{[0-9]+}}.2s, v{{[0-9]+}}.2s, [[MUL_R]]
// COMMONIR: ret <2 x float> [[SUB_I]]
float32x2_t test_vmls_f32(float32x2_t v1, float32x2_t v2, float32x2_t v3) {
return vmls_f32(v1, v2, v3);
@@ -149,10 +121,8 @@ float32x2_t test_vmls_f32(float32x2_t v1, float32x2_t v2, float32x2_t v3) {
// COMMON-LABEL: test_vmlsq_f32
// UNCONSTRAINED: [[MUL_I:%.*]] = fmul <4 x float> %v2, %v3
// CONSTRAINED: [[MUL_I:%.*]] = call <4 x float> @llvm.experimental.constrained.fmul.v4f32(<4 x float> %v2, <4 x float> %v3, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM: fmul [[MUL_R:v[0-9]+.4s]], v{{[0-9]+}}.4s, v{{[0-9]+}}.4s
// UNCONSTRAINED: [[SUB_I:%.*]] = fsub <4 x float> %v1, [[MUL_I]]
// CONSTRAINED: [[SUB_I:%.*]] = call <4 x float> @llvm.experimental.constrained.fsub.v4f32(<4 x float> %v1, <4 x float> [[MUL_I]], metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM-NEXT:fsub v{{[0-9]+}}.4s, v{{[0-9]+}}.4s, [[MUL_R]]
// COMMONIR: ret <4 x float> [[SUB_I]]
float32x4_t test_vmlsq_f32(float32x4_t v1, float32x4_t v2, float32x4_t v3) {
return vmlsq_f32(v1, v2, v3);
@@ -161,10 +131,8 @@ float32x4_t test_vmlsq_f32(float32x4_t v1, float32x4_t v2, float32x4_t v3) {
// COMMON-LABEL: test_vmlsq_f64
// UNCONSTRAINED: [[MUL_I:%.*]] = fmul <2 x double> %v2, %v3
// CONSTRAINED: [[MUL_I:%.*]] = call <2 x double> @llvm.experimental.constrained.fmul.v2f64(<2 x double> %v2, <2 x double> %v3, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM: fmul [[MUL_R:v[0-9]+.2d]], v{{[0-9]+}}.2d, v{{[0-9]+}}.2d
// UNCONSTRAINED: [[SUB_I:%.*]] = fsub <2 x double> %v1, [[MUL_I]]
// CONSTRAINED: [[SUB_I:%.*]] = call <2 x double> @llvm.experimental.constrained.fsub.v2f64(<2 x double> %v1, <2 x double> [[MUL_I]], metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM-NEXT:fsub v{{[0-9]+}}.2d, v{{[0-9]+}}.2d, [[MUL_R]]
// COMMONIR: ret <2 x double> [[SUB_I]]
float64x2_t test_vmlsq_f64(float64x2_t v1, float64x2_t v2, float64x2_t v3) {
return vmlsq_f64(v1, v2, v3);
@@ -176,7 +144,6 @@ float64x2_t test_vmlsq_f64(float64x2_t v1, float64x2_t v2, float64x2_t v3) {
// COMMONIR: [[TMP2:%.*]] = bitcast <2 x float> %v3 to <8 x i8>
// UNCONSTRAINED: [[TMP3:%.*]] = call <2 x float> @llvm.fma.v2f32(<2 x float> %v2, <2 x float> %v3, <2 x float> %v1)
// CONSTRAINED: [[TMP3:%.*]] = call <2 x float> @llvm.experimental.constrained.fma.v2f32(<2 x float> %v2, <2 x float> %v3, <2 x float> %v1, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM: fmla v{{[0-9]+}}.2s, v{{[0-9]+}}.2s, v{{[0-9]+}}.2s
// COMMONIR: ret <2 x float> [[TMP3]]
float32x2_t test_vfma_f32(float32x2_t v1, float32x2_t v2, float32x2_t v3) {
return vfma_f32(v1, v2, v3);
@@ -188,7 +155,6 @@ float32x2_t test_vfma_f32(float32x2_t v1, float32x2_t v2, float32x2_t v3) {
// COMMONIR: [[TMP2:%.*]] = bitcast <4 x float> %v3 to <16 x i8>
// UNCONSTRAINED: [[TMP3:%.*]] = call <4 x float> @llvm.fma.v4f32(<4 x float> %v2, <4 x float> %v3, <4 x float> %v1)
// CONSTRAINED: [[TMP3:%.*]] = call <4 x float> @llvm.experimental.constrained.fma.v4f32(<4 x float> %v2, <4 x float> %v3, <4 x float> %v1, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM: fmla v{{[0-9]+}}.4s, v{{[0-9]+}}.4s, v{{[0-9]+}}.4s
// COMMONIR: ret <4 x float> [[TMP3]]
float32x4_t test_vfmaq_f32(float32x4_t v1, float32x4_t v2, float32x4_t v3) {
return vfmaq_f32(v1, v2, v3);
@@ -200,7 +166,6 @@ float32x4_t test_vfmaq_f32(float32x4_t v1, float32x4_t v2, float32x4_t v3) {
// COMMONIR: [[TMP2:%.*]] = bitcast <2 x double> %v3 to <16 x i8>
// UNCONSTRAINED: [[TMP3:%.*]] = call <2 x double> @llvm.fma.v2f64(<2 x double> %v2, <2 x double> %v3, <2 x double> %v1)
// CONSTRAINED: [[TMP3:%.*]] = call <2 x double> @llvm.experimental.constrained.fma.v2f64(<2 x double> %v2, <2 x double> %v3, <2 x double> %v1, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM: fmla v{{[0-9]+}}.2d, v{{[0-9]+}}.2d, v{{[0-9]+}}.2d
// COMMONIR: ret <2 x double> [[TMP3]]
float64x2_t test_vfmaq_f64(float64x2_t v1, float64x2_t v2, float64x2_t v3) {
return vfmaq_f64(v1, v2, v3);
@@ -208,13 +173,11 @@ float64x2_t test_vfmaq_f64(float64x2_t v1, float64x2_t v2, float64x2_t v3) {
// COMMON-LABEL: test_vfms_f32
// COMMONIR: [[SUB_I:%.*]] = fneg <2 x float> %v2
-// CHECK-ASM: fneg v{{[0-9]+}}.2s, v{{[0-9]+}}.2s
// COMMONIR: [[TMP0:%.*]] = bitcast <2 x float> %v1 to <8 x i8>
// COMMONIR: [[TMP1:%.*]] = bitcast <2 x float> [[SUB_I]] to <8 x i8>
// COMMONIR: [[TMP2:%.*]] = bitcast <2 x float> %v3 to <8 x i8>
// UNCONSTRAINED: [[TMP3:%.*]] = call <2 x float> @llvm.fma.v2f32(<2 x float> [[SUB_I]], <2 x float> %v3, <2 x float> %v1)
// CONSTRAINED: [[TMP3:%.*]] = call <2 x float> @llvm.experimental.constrained.fma.v2f32(<2 x float> [[SUB_I]], <2 x float> %v3, <2 x float> %v1, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM: fmla v{{[0-9]+}}.2s, v{{[0-9]+}}.2s, v{{[0-9]+}}.2s
// COMMONIR: ret <2 x float> [[TMP3]]
float32x2_t test_vfms_f32(float32x2_t v1, float32x2_t v2, float32x2_t v3) {
return vfms_f32(v1, v2, v3);
@@ -222,13 +185,11 @@ float32x2_t test_vfms_f32(float32x2_t v1, float32x2_t v2, float32x2_t v3) {
// COMMON-LABEL: test_vfmsq_f32
// COMMONIR: [[SUB_I:%.*]] = fneg <4 x float> %v2
-// CHECK-ASM: fneg v{{[0-9]+}}.4s, v{{[0-9]+}}.4s
// COMMONIR: [[TMP0:%.*]] = bitcast <4 x float> %v1 to <16 x i8>
// COMMONIR: [[TMP1:%.*]] = bitcast <4 x float> [[SUB_I]] to <16 x i8>
// COMMONIR: [[TMP2:%.*]] = bitcast <4 x float> %v3 to <16 x i8>
// UNCONSTRAINED: [[TMP3:%.*]] = call <4 x float> @llvm.fma.v4f32(<4 x float> [[SUB_I]], <4 x float> %v3, <4 x float> %v1)
// CONSTRAINED: [[TMP3:%.*]] = call <4 x float> @llvm.experimental.constrained.fma.v4f32(<4 x float> [[SUB_I]], <4 x float> %v3, <4 x float> %v1, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM: fmla v{{[0-9]+}}.4s, v{{[0-9]+}}.4s, v{{[0-9]+}}.4s
// COMMONIR: ret <4 x float> [[TMP3]]
float32x4_t test_vfmsq_f32(float32x4_t v1, float32x4_t v2, float32x4_t v3) {
return vfmsq_f32(v1, v2, v3);
@@ -236,13 +197,11 @@ float32x4_t test_vfmsq_f32(float32x4_t v1, float32x4_t v2, float32x4_t v3) {
// COMMON-LABEL: test_vfmsq_f64
// COMMONIR: [[SUB_I:%.*]] = fneg <2 x double> %v2
-// CHECK-ASM: fneg v{{[0-9]+}}.2d, v{{[0-9]+}}.2d
// COMMONIR: [[TMP0:%.*]] = bitcast <2 x double> %v1 to <16 x i8>
// COMMONIR: [[TMP1:%.*]] = bitcast <2 x double> [[SUB_I]] to <16 x i8>
// COMMONIR: [[TMP2:%.*]] = bitcast <2 x double> %v3 to <16 x i8>
// UNCONSTRAINED: [[TMP3:%.*]] = call <2 x double> @llvm.fma.v2f64(<2 x double> [[SUB_I]], <2 x double> %v3, <2 x double> %v1)
// CONSTRAINED: [[TMP3:%.*]] = call <2 x double> @llvm.experimental.constrained.fma.v2f64(<2 x double> [[SUB_I]], <2 x double> %v3, <2 x double> %v1, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM: fmla v{{[0-9]+}}.2d, v{{[0-9]+}}.2d, v{{[0-9]+}}.2d
// COMMONIR: ret <2 x double> [[TMP3]]
float64x2_t test_vfmsq_f64(float64x2_t v1, float64x2_t v2, float64x2_t v3) {
return vfmsq_f64(v1, v2, v3);
@@ -251,7 +210,6 @@ float64x2_t test_vfmsq_f64(float64x2_t v1, float64x2_t v2, float64x2_t v3) {
// COMMON-LABEL: test_vdivq_f64
// UNCONSTRAINED: [[DIV_I:%.*]] = fdiv <2 x double> %v1, %v2
// CONSTRAINED: [[DIV_I:%.*]] = call <2 x double> @llvm.experimental.constrained.fdiv.v2f64(<2 x double> %v1, <2 x double> %v2, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM: fdiv v{{[0-9]+}}.2d, v{{[0-9]+}}.2d, v{{[0-9]+}}.2d
// COMMONIR: ret <2 x double> [[DIV_I]]
float64x2_t test_vdivq_f64(float64x2_t v1, float64x2_t v2) {
return vdivq_f64(v1, v2);
@@ -260,7 +218,6 @@ float64x2_t test_vdivq_f64(float64x2_t v1, float64x2_t v2) {
// COMMON-LABEL: test_vdivq_f32
// UNCONSTRAINED: [[DIV_I:%.*]] = fdiv <4 x float> %v1, %v2
// CONSTRAINED: [[DIV_I:%.*]] = call <4 x float> @llvm.experimental.constrained.fdiv.v4f32(<4 x float> %v1, <4 x float> %v2, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM: fdiv v{{[0-9]+}}.4s, v{{[0-9]+}}.4s, v{{[0-9]+}}.4s
// COMMONIR: ret <4 x float> [[DIV_I]]
float32x4_t test_vdivq_f32(float32x4_t v1, float32x4_t v2) {
return vdivq_f32(v1, v2);
@@ -269,7 +226,6 @@ float32x4_t test_vdivq_f32(float32x4_t v1, float32x4_t v2) {
// COMMON-LABEL: test_vdiv_f32
// UNCONSTRAINED: [[DIV_I:%.*]] = fdiv <2 x float> %v1, %v2
// CONSTRAINED: [[DIV_I:%.*]] = call <2 x float> @llvm.experimental.constrained.fdiv.v2f32(<2 x float> %v1, <2 x float> %v2, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM: fdiv v{{[0-9]+}}.2s, v{{[0-9]+}}.2s, v{{[0-9]+}}.2s
// COMMONIR: ret <2 x float> [[DIV_I]]
float32x2_t test_vdiv_f32(float32x2_t v1, float32x2_t v2) {
return vdiv_f32(v1, v2);
@@ -278,7 +234,6 @@ float32x2_t test_vdiv_f32(float32x2_t v1, float32x2_t v2) {
// COMMON-LABEL: test_vceq_f32
// UNCONSTRAINED: [[CMP_I:%.*]] = fcmp oeq <2 x float> %v1, %v2
// CONSTRAINED: [[CMP_I:%.*]] = call <2 x i1> @llvm.experimental.constrained.fcmp.v2f32(<2 x float> %v1, <2 x float> %v2, metadata !"oeq", metadata !"fpexcept.strict")
-// CHECK-ASM: fcmeq v{{[0-9]+}}.2s, v{{[0-9]+}}.2s, v{{[0-9]+}}.2s
// COMMONIR: [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i32>
// COMMONIR: ret <2 x i32> [[SEXT_I]]
uint32x2_t test_vceq_f32(float32x2_t v1, float32x2_t v2) {
@@ -288,8 +243,6 @@ uint32x2_t test_vceq_f32(float32x2_t v1, float32x2_t v2) {
// COMMON-LABEL: test_vceq_f64
// UNCONSTRAINED: [[CMP_I:%.*]] = fcmp oeq <1 x double> %a, %b
// CONSTRAINED: [[CMP_I:%.*]] = call <1 x i1> @llvm.experimental.constrained.fcmp.v1f64(<1 x double> %a, <1 x double> %b, metadata !"oeq", metadata !"fpexcept.strict")
-// CHECK-ASM: fcmp d{{[0-9]+}}, d{{[0-9]+}}
-// CHECK-ASM-NEXT:cset {{w[0-9]+}}, eq
// COMMONIR: [[SEXT_I:%.*]] = sext <1 x i1> [[CMP_I]] to <1 x i64>
// COMMONIR: ret <1 x i64> [[SEXT_I]]
uint64x1_t test_vceq_f64(float64x1_t a, float64x1_t b) {
@@ -299,7 +252,6 @@ uint64x1_t test_vceq_f64(float64x1_t a, float64x1_t b) {
// COMMON-LABEL: test_vceqq_f32
// UNCONSTRAINED: [[CMP_I:%.*]] = fcmp oeq <4 x float> %v1, %v2
// CONSTRAINED: [[CMP_I:%.*]] = call <4 x i1> @llvm.experimental.constrained.fcmp.v4f32(<4 x float> %v1, <4 x float> %v2, metadata !"oeq", metadata !"fpexcept.strict")
-// CHECK-ASM: fcmeq v{{[0-9]+}}.4s, v{{[0-9]+}}.4s, v{{[0-9]+}}.4s
// COMMONIR: [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i32>
// COMMONIR: ret <4 x i32> [[SEXT_I]]
uint32x4_t test_vceqq_f32(float32x4_t v1, float32x4_t v2) {
@@ -309,7 +261,6 @@ uint32x4_t test_vceqq_f32(float32x4_t v1, float32x4_t v2) {
// COMMON-LABEL: test_vceqq_f64
// UNCONSTRAINED: [[CMP_I:%.*]] = fcmp oeq <2 x double> %v1, %v2
// CONSTRAINED: [[CMP_I:%.*]] = call <2 x i1> @llvm.experimental.constrained.fcmp.v2f64(<2 x double> %v1, <2 x double> %v2, metadata !"oeq", metadata !"fpexcept.strict")
-// CHECK-ASM: fcmeq v{{[0-9]+}}.2d, v{{[0-9]+}}.2d, v{{[0-9]+}}.2d
// COMMONIR: [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i64>
// COMMONIR: ret <2 x i64> [[SEXT_I]]
uint64x2_t test_vceqq_f64(float64x2_t v1, float64x2_t v2) {
@@ -319,7 +270,6 @@ uint64x2_t test_vceqq_f64(float64x2_t v1, float64x2_t v2) {
// COMMON-LABEL: test_vcge_f32
// UNCONSTRAINED: [[CMP_I:%.*]] = fcmp oge <2 x float> %v1, %v2
// CONSTRAINED: [[CMP_I:%.*]] = call <2 x i1> @llvm.experimental.constrained.fcmps.v2f32(<2 x float> %v1, <2 x float> %v2, metadata !"oge", metadata !"fpexcept.strict")
-// CHECK-ASM: fcmge v{{[0-9]+}}.2s, v{{[0-9]+}}.2s, v{{[0-9]+}}.2s
// COMMONIR: [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i32>
// COMMONIR: ret <2 x i32> [[SEXT_I]]
uint32x2_t test_vcge_f32(float32x2_t v1, float32x2_t v2) {
@@ -329,8 +279,6 @@ uint32x2_t test_vcge_f32(float32x2_t v1, float32x2_t v2) {
// COMMON-LABEL: test_vcge_f64
// UNCONSTRAINED: [[CMP_I:%.*]] = fcmp oge <1 x double> %a, %b
// CONSTRAINED: [[CMP_I:%.*]] = call <1 x i1> @llvm.experimental.constrained.fcmps.v1f64(<1 x double> %a, <1 x double> %b, metadata !"oge", metadata !"fpexcept.strict")
-// CHECK-ASM: fcmp d{{[0-9]+}}, d{{[0-9]+}}
-// CHECK-ASM-NEXT:cset {{w[0-9]+}}, ge
// COMMONIR: [[SEXT_I:%.*]] = sext <1 x i1> [[CMP_I]] to <1 x i64>
// COMMONIR: ret <1 x i64> [[SEXT_I]]
uint64x1_t test_vcge_f64(float64x1_t a, float64x1_t b) {
@@ -340,7 +288,6 @@ uint64x1_t test_vcge_f64(float64x1_t a, float64x1_t b) {
// COMMON-LABEL: test_vcgeq_f32
// UNCONSTRAINED: [[CMP_I:%.*]] = fcmp oge <4 x float> %v1, %v2
// CONSTRAINED: [[CMP_I:%.*]] = call <4 x i1> @llvm.experimental.constrained.fcmps.v4f32(<4 x float> %v1, <4 x float> %v2, metadata !"oge", metadata !"fpexcept.strict")
-// CHECK-ASM: fcmge v{{[0-9]+}}.4s, v{{[0-9]+}}.4s, v{{[0-9]+}}.4s
// COMMONIR: [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i32>
// COMMONIR: ret <4 x i32> [[SEXT_I]]
uint32x4_t test_vcgeq_f32(float32x4_t v1, float32x4_t v2) {
@@ -350,7 +297,6 @@ uint32x4_t test_vcgeq_f32(float32x4_t v1, float32x4_t v2) {
// COMMON-LABEL: test_vcgeq_f64
// UNCONSTRAINED: [[CMP_I:%.*]] = fcmp oge <2 x double> %v1, %v2
// CONSTRAINED: [[CMP_I:%.*]] = call <2 x i1> @llvm.experimental.constrained.fcmps.v2f64(<2 x double> %v1, <2 x double> %v2, metadata !"oge", metadata !"fpexcept.strict")
-// CHECK-ASM: fcmge v{{[0-9]+}}.2d, v{{[0-9]+}}.2d, v{{[0-9]+}}.2d
// COMMONIR: [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i64>
// COMMONIR: ret <2 x i64> [[SEXT_I]]
uint64x2_t test_vcgeq_f64(float64x2_t v1, float64x2_t v2) {
@@ -360,7 +306,6 @@ uint64x2_t test_vcgeq_f64(float64x2_t v1, float64x2_t v2) {
// COMMON-LABEL: test_vcle_f32
// UNCONSTRAINED: [[CMP_I:%.*]] = fcmp ole <2 x float> %v1, %v2
// CONSTRAINED: [[CMP_I:%.*]] = call <2 x i1> @llvm.experimental.constrained.fcmps.v2f32(<2 x float> %v1, <2 x float> %v2, metadata !"ole", metadata !"fpexcept.strict")
-// CHECK-ASM: fcmge v{{[0-9]+}}.2s, v{{[0-9]+}}.2s, v{{[0-9]+}}.2s
// COMMONIR: [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i32>
// COMMONIR: ret <2 x i32> [[SEXT_I]]
uint32x2_t test_vcle_f32(float32x2_t v1, float32x2_t v2) {
@@ -370,8 +315,6 @@ uint32x2_t test_vcle_f32(float32x2_t v1, float32x2_t v2) {
// COMMON-LABEL: test_vcle_f64
// UNCONSTRAINED: [[CMP_I:%.*]] = fcmp ole <1 x double> %a, %b
// CONSTRAINED: [[CMP_I:%.*]] = call <1 x i1> @llvm.experimental.constrained.fcmps.v1f64(<1 x double> %a, <1 x double> %b, metadata !"ole", metadata !"fpexcept.strict")
-// CHECK-ASM: fcmp d{{[0-9]+}}, d{{[0-9]+}}
-// CHECK-ASM-NEXT:cset {{w[0-9]+}}, ls
// COMMONIR: [[SEXT_I:%.*]] = sext <1 x i1> [[CMP_I]] to <1 x i64>
// COMMONIR: ret <1 x i64> [[SEXT_I]]
uint64x1_t test_vcle_f64(float64x1_t a, float64x1_t b) {
@@ -381,7 +324,6 @@ uint64x1_t test_vcle_f64(float64x1_t a, float64x1_t b) {
// COMMON-LABEL: test_vcleq_f32
// UNCONSTRAINED: [[CMP_I:%.*]] = fcmp ole <4 x float> %v1, %v2
// CONSTRAINED: [[CMP_I:%.*]] = call <4 x i1> @llvm.experimental.constrained.fcmps.v4f32(<4 x float> %v1, <4 x float> %v2, metadata !"ole", metadata !"fpexcept.strict")
-// CHECK-ASM: fcmge v{{[0-9]+}}.4s, v{{[0-9]+}}.4s, v{{[0-9]+}}.4s
// COMMONIR: [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i32>
// COMMONIR: ret <4 x i32> [[SEXT_I]]
uint32x4_t test_vcleq_f32(float32x4_t v1, float32x4_t v2) {
@@ -391,7 +333,6 @@ uint32x4_t test_vcleq_f32(float32x4_t v1, float32x4_t v2) {
// COMMON-LABEL: test_vcleq_f64
// UNCONSTRAINED: [[CMP_I:%.*]] = fcmp ole <2 x double> %v1, %v2
// CONSTRAINED: [[CMP_I:%.*]] = call <2 x i1> @llvm.experimental.constrained.fcmps.v2f64(<2 x double> %v1, <2 x double> %v2, metadata !"ole", metadata !"fpexcept.strict")
-// CHECK-ASM: fcmge v{{[0-9]+}}.2d, v{{[0-9]+}}.2d, v{{[0-9]+}}.2d
// COMMONIR: [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i64>
// COMMONIR: ret <2 x i64> [[SEXT_I]]
uint64x2_t test_vcleq_f64(float64x2_t v1, float64x2_t v2) {
@@ -401,7 +342,6 @@ uint64x2_t test_vcleq_f64(float64x2_t v1, float64x2_t v2) {
// COMMON-LABEL: test_vcgt_f32
// UNCONSTRAINED: [[CMP_I:%.*]] = fcmp ogt <2 x float> %v1, %v2
// CONSTRAINED: [[CMP_I:%.*]] = call <2 x i1> @llvm.experimental.constrained.fcmps.v2f32(<2 x float> %v1, <2 x float> %v2, metadata !"ogt", metadata !"fpexcept.strict")
-// CHECK-ASM: fcmgt v{{[0-9]+}}.2s, v{{[0-9]+}}.2s, v{{[0-9]+}}.2s
// COMMONIR: [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i32>
// COMMONIR: ret <2 x i32> [[SEXT_I]]
uint32x2_t test_vcgt_f32(float32x2_t v1, float32x2_t v2) {
@@ -411,8 +351,6 @@ uint32x2_t test_vcgt_f32(float32x2_t v1, float32x2_t v2) {
// COMMON-LABEL: test_vcgt_f64
// UNCONSTRAINED: [[CMP_I:%.*]] = fcmp ogt <1 x double> %a, %b
// CONSTRAINED: [[CMP_I:%.*]] = call <1 x i1> @llvm.experimental.constrained.fcmps.v1f64(<1 x double> %a, <1 x double> %b, metadata !"ogt", metadata !"fpexcept.strict")
-// CHECK-ASM: fcmp d{{[0-9]+}}, d{{[0-9]+}}
-// CHECK-ASM-NEXT:cset {{w[0-9]+}}, gt
// COMMONIR: [[SEXT_I:%.*]] = sext <1 x i1> [[CMP_I]] to <1 x i64>
// COMMONIR: ret <1 x i64> [[SEXT_I]]
uint64x1_t test_vcgt_f64(float64x1_t a, float64x1_t b) {
@@ -422,7 +360,6 @@ uint64x1_t test_vcgt_f64(float64x1_t a, float64x1_t b) {
// COMMON-LABEL: test_vcgtq_f32
// UNCONSTRAINED: [[CMP_I:%.*]] = fcmp ogt <4 x float> %v1, %v2
// CONSTRAINED: [[CMP_I:%.*]] = call <4 x i1> @llvm.experimental.constrained.fcmps.v4f32(<4 x float> %v1, <4 x float> %v2, metadata !"ogt", metadata !"fpexcept.strict")
-// CHECK-ASM: fcmgt v{{[0-9]+}}.4s, v{{[0-9]+}}.4s, v{{[0-9]+}}.4s
// COMMONIR: [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i32>
// COMMONIR: ret <4 x i32> [[SEXT_I]]
uint32x4_t test_vcgtq_f32(float32x4_t v1, float32x4_t v2) {
@@ -432,7 +369,6 @@ uint32x4_t test_vcgtq_f32(float32x4_t v1, float32x4_t v2) {
// COMMON-LABEL: test_vcgtq_f64
// UNCONSTRAINED: [[CMP_I:%.*]] = fcmp ogt <2 x double> %v1, %v2
// CONSTRAINED: [[CMP_I:%.*]] = call <2 x i1> @llvm.experimental.constrained.fcmps.v2f64(<2 x double> %v1, <2 x double> %v2, metadata !"ogt", metadata !"fpexcept.strict")
-// CHECK-ASM: fcmgt v{{[0-9]+}}.2d, v{{[0-9]+}}.2d, v{{[0-9]+}}.2d
// COMMONIR: [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i64>
// COMMONIR: ret <2 x i64> [[SEXT_I]]
uint64x2_t test_vcgtq_f64(float64x2_t v1, float64x2_t v2) {
@@ -442,7 +378,6 @@ uint64x2_t test_vcgtq_f64(float64x2_t v1, float64x2_t v2) {
// COMMON-LABEL: test_vclt_f32
// UNCONSTRAINED: [[CMP_I:%.*]] = fcmp olt <2 x float> %v1, %v2
// CONSTRAINED: [[CMP_I:%.*]] = call <2 x i1> @llvm.experimental.constrained.fcmps.v2f32(<2 x float> %v1, <2 x float> %v2, metadata !"olt", metadata !"fpexcept.strict")
-// CHECK-ASM: fcmgt v{{[0-9]+}}.2s, v{{[0-9]+}}.2s, v{{[0-9]+}}.2s
// COMMONIR: [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i32>
// COMMONIR: ret <2 x i32> [[SEXT_I]]
uint32x2_t test_vclt_f32(float32x2_t v1, float32x2_t v2) {
@@ -452,8 +387,6 @@ uint32x2_t test_vclt_f32(float32x2_t v1, float32x2_t v2) {
// COMMON-LABEL: test_vclt_f64
// UNCONSTRAINED: [[CMP_I:%.*]] = fcmp olt <1 x double> %a, %b
// CONSTRAINED: [[CMP_I:%.*]] = call <1 x i1> @llvm.experimental.constrained.fcmps.v1f64(<1 x double> %a, <1 x double> %b, metadata !"olt", metadata !"fpexcept.strict")
-// CHECK-ASM: fcmp d{{[0-9]+}}, d{{[0-9]+}}
-// CHECK-ASM-NEXT:cset {{w[0-9]+}}, mi
// COMMONIR: [[SEXT_I:%.*]] = sext <1 x i1> [[CMP_I]] to <1 x i64>
// COMMONIR: ret <1 x i64> [[SEXT_I]]
uint64x1_t test_vclt_f64(float64x1_t a, float64x1_t b) {
@@ -463,7 +396,6 @@ uint64x1_t test_vclt_f64(float64x1_t a, float64x1_t b) {
// COMMON-LABEL: test_vcltq_f32
// UNCONSTRAINED: [[CMP_I:%.*]] = fcmp olt <4 x float> %v1, %v2
// CONSTRAINED: [[CMP_I:%.*]] = call <4 x i1> @llvm.experimental.constrained.fcmps.v4f32(<4 x float> %v1, <4 x float> %v2, metadata !"olt", metadata !"fpexcept.strict")
-// CHECK-ASM: fcmgt v{{[0-9]+}}.4s, v{{[0-9]+}}.4s, v{{[0-9]+}}.4s
// COMMONIR: [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i32>
// COMMONIR: ret <4 x i32> [[SEXT_I]]
uint32x4_t test_vcltq_f32(float32x4_t v1, float32x4_t v2) {
@@ -473,7 +405,6 @@ uint32x4_t test_vcltq_f32(float32x4_t v1, float32x4_t v2) {
// COMMON-LABEL: test_vcltq_f64
// UNCONSTRAINED: [[CMP_I:%.*]] = fcmp olt <2 x double> %v1, %v2
// CONSTRAINED: [[CMP_I:%.*]] = call <2 x i1> @llvm.experimental.constrained.fcmps.v2f64(<2 x double> %v1, <2 x double> %v2, metadata !"olt", metadata !"fpexcept.strict")
-// CHECK-ASM: fcmgt v{{[0-9]+}}.2d, v{{[0-9]+}}.2d, v{{[0-9]+}}.2d
// COMMONIR: [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i64>
// COMMONIR: ret <2 x i64> [[SEXT_I]]
uint64x2_t test_vcltq_f64(float64x2_t v1, float64x2_t v2) {
@@ -485,7 +416,6 @@ uint64x2_t test_vcltq_f64(float64x2_t v1, float64x2_t v2) {
// COMMONIR: [[LANE1_I:%.*]] = extractelement <2 x float> %a, i64 1
// UNCONSTRAINED: [[VPADDD_I:%.*]] = fadd float [[LANE0_I]], [[LANE1_I]]
// CONSTRAINED: [[VPADDD_I:%.*]] = call float @llvm.experimental.constrained.fadd.f32(float [[LANE0_I]], float [[LANE1_I]], metadata !"round.tonearest", metadata !"fpexcept.strict"
-// CHECK-ASM: fadd s{{[0-9]+}}, s{{[0-9]+}}, s{{[0-9]+}}
// COMMONIR: ret float [[VPADDD_I]]
float32_t test_vpadds_f32(float32x2_t a) {
return vpadds_f32(a);
@@ -496,7 +426,6 @@ float32_t test_vpadds_f32(float32x2_t a) {
// COMMONIR: [[LANE1_I:%.*]] = extractelement <2 x double> %a, i64 1
// UNCONSTRAINED: [[VPADDD_I:%.*]] = fadd double [[LANE0_I]], [[LANE1_I]]
// CONSTRAINED: [[VPADDD_I:%.*]] = call double @llvm.experimental.constrained.fadd.f64(double [[LANE0_I]], double [[LANE1_I]], metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM: faddp d{{[0-9]+}}, v{{[0-9]+}}.2d
// COMMONIR: ret double [[VPADDD_I]]
float64_t test_vpaddd_f64(float64x2_t a) {
return vpaddd_f64(a);
@@ -505,7 +434,6 @@ float64_t test_vpaddd_f64(float64x2_t a) {
// COMMON-LABEL: test_vcvts_f32_s32
// UNCONSTRAINED: [[TMP0:%.*]] = sitofp i32 %a to float
// CONSTRAINED: [[TMP0:%.*]] = call float @llvm.experimental.constrained.sitofp.f32.i32(i32 %a, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM: scvtf s{{[0-9]+}}, w{{[0-9]+}}
// COMMONIR: ret float [[TMP0]]
float32_t test_vcvts_f32_s32(int32_t a) {
return vcvts_f32_s32(a);
@@ -514,7 +442,6 @@ float32_t test_vcvts_f32_s32(int32_t a) {
// COMMON-LABEL: test_vcvtd_f64_s64
// UNCONSTRAINED: [[TMP0:%.*]] = sitofp i64 %a to double
// CONSTRAINED: [[TMP0:%.*]] = call double @llvm.experimental.constrained.sitofp.f64.i64(i64 %a, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM: scvtf d{{[0-9]}}, x{{[0-9]+}}
// COMMONIR: ret double [[TMP0]]
float64_t test_vcvtd_f64_s64(int64_t a) {
return vcvtd_f64_s64(a);
@@ -523,7 +450,6 @@ float64_t test_vcvtd_f64_s64(int64_t a) {
// COMMON-LABEL: test_vcvts_f32_u32
// UNCONSTRAINED: [[TMP0:%.*]] = uitofp i32 %a to float
// CONSTRAINED: [[TMP0:%.*]] = call float @llvm.experimental.constrained.uitofp.f32.i32(i32 %a, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM: ucvtf s{{[0-9]+}}, w{{[0-9]+}}
// COMMONIR: ret float [[TMP0]]
float32_t test_vcvts_f32_u32(uint32_t a) {
return vcvts_f32_u32(a);
@@ -533,7 +459,6 @@ float32_t test_vcvts_f32_u32(uint32_t a) {
// COMMON-LABEL: test_vcvtd_f64_u64
// UNCONSTRAINED: [[TMP0:%.*]] = uitofp i64 %a to double
// CONSTRAINED: [[TMP0:%.*]] = call double @llvm.experimental.constrained.uitofp.f64.i64(i64 %a, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM: ucvtf d{{[0-9]}}, x{{[0-9]+}}
// COMMONIR: ret double [[TMP0]]
float64_t test_vcvtd_f64_u64(uint64_t a) {
return vcvtd_f64_u64(a);
@@ -542,8 +467,6 @@ float64_t test_vcvtd_f64_u64(uint64_t a) {
// COMMON-LABEL: test_vceqs_f32
// UNCONSTRAINED: [[TMP0:%.*]] = fcmp oeq float %a, %b
// CONSTRAINED: [[TMP0:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f32(float %a, float %b, metadata !"oeq", metadata !"fpexcept.strict")
-// CHECK-ASM: fcmp s{{[0-9]+}}, s{{[0-9]+}}
-// CHECK-ASM-NEXT:cset {{w[0-9]+}}, eq
// COMMONIR: [[VCMPD_I:%.*]] = sext i1 [[TMP0]] to i32
// COMMONIR: ret i32 [[VCMPD_I]]
uint32_t test_vceqs_f32(float32_t a, float32_t b) {
@@ -553,8 +476,6 @@ uint32_t test_vceqs_f32(float32_t a, float32_t b) {
// COMMON-LABEL: test_vceqd_f64
// UNCONSTRAINED: [[TMP0:%.*]] = fcmp oeq double %a, %b
// CONSTRAINED: [[TMP0:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f64(double %a, double %b, metadata !"oeq", metadata !"fpexcept.strict")
-// CHECK-ASM: fcmp d{{[0-9]+}}, d{{[0-9]+}}
-// CHECK-ASM-NEXT:cset {{w[0-9]+}}, eq
// COMMONIR: [[VCMPD_I:%.*]] = sext i1 [[TMP0]] to i64
// COMMONIR: ret i64 [[VCMPD_I]]
uint64_t test_vceqd_f64(float64_t a, float64_t b) {
@@ -564,8 +485,6 @@ uint64_t test_vceqd_f64(float64_t a, float64_t b) {
// COMMON-LABEL: test_vceqzs_f32
// UNCONSTRAINED: [[TMP0:%.*]] = fcmp oeq float %a, 0.000000e+00
// CONSTRAINED: [[TMP0:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f32(float %a, float 0.000000e+00, metadata !"oeq", metadata !"fpexcept.strict")
-// CHECK-ASM: fcmp s{{[0-9]+}}, #0.0
-// CHECK-ASM-NEXT:cset {{w[0-9]+}}, eq
// COMMONIR: [[VCEQZ_I:%.*]] = sext i1 [[TMP0]] to i32
// COMMONIR: ret i32 [[VCEQZ_I]]
uint32_t test_vceqzs_f32(float32_t a) {
@@ -575,8 +494,6 @@ uint32_t test_vceqzs_f32(float32_t a) {
// COMMON-LABEL: test_vceqzd_f64
// UNCONSTRAINED: [[TMP0:%.*]] = fcmp oeq double %a, 0.000000e+00
// CONSTRAINED: [[TMP0:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f64(double %a, double 0.000000e+00, metadata !"oeq", metadata !"fpexcept.strict")
-// CHECK-ASM: fcmp d{{[0-9]+}}, #0.0
-// CHECK-ASM-NEXT:cset {{w[0-9]+}}, eq
// COMMONIR: [[VCEQZ_I:%.*]] = sext i1 [[TMP0]] to i64
// COMMONIR: ret i64 [[VCEQZ_I]]
uint64_t test_vceqzd_f64(float64_t a) {
@@ -586,8 +503,6 @@ uint64_t test_vceqzd_f64(float64_t a) {
// COMMON-LABEL: test_vcges_f32
// UNCONSTRAINED: [[TMP0:%.*]] = fcmp oge float %a, %b
// CONSTRAINED: [[TMP0:%.*]] = call i1 @llvm.experimental.constrained.fcmps.f32(float %a, float %b, metadata !"oge", metadata !"fpexcept.strict")
-// CHECK-ASM: fcmp s{{[0-9]+}}, s{{[0-9]+}}
-// CHECK-ASM-NEXT:cset {{w[0-9]+}}, ge
// COMMONIR: [[VCMPD_I:%.*]] = sext i1 [[TMP0]] to i32
// COMMONIR: ret i32 [[VCMPD_I]]
uint32_t test_vcges_f32(float32_t a, float32_t b) {
@@ -597,8 +512,6 @@ uint32_t test_vcges_f32(float32_t a, float32_t b) {
// COMMON-LABEL: test_vcged_f64
// UNCONSTRAINED: [[TMP0:%.*]] = fcmp oge double %a, %b
// CONSTRAINED: [[TMP0:%.*]] = call i1 @llvm.experimental.constrained.fcmps.f64(double %a, double %b, metadata !"oge", metadata !"fpexcept.strict")
-// CHECK-ASM: fcmp d{{[0-9]+}}, d{{[0-9]+}}
-// CHECK-ASM-NEXT:cset {{w[0-9]+}}, ge
// COMMONIR: [[VCMPD_I:%.*]] = sext i1 [[TMP0]] to i64
// COMMONIR: ret i64 [[VCMPD_I]]
uint64_t test_vcged_f64(float64_t a, float64_t b) {
@@ -608,8 +521,6 @@ uint64_t test_vcged_f64(float64_t a, float64_t b) {
// COMMON-LABEL: test_vcgezs_f32
// UNCONSTRAINED: [[TMP0:%.*]] = fcmp oge float %a, 0.000000e+00
// CONSTRAINED: [[TMP0:%.*]] = call i1 @llvm.experimental.constrained.fcmps.f32(float %a, float 0.000000e+00, metadata !"oge", metadata !"fpexcept.strict")
-// CHECK-ASM: fcmp s{{[0-9]+}}, #0.0
-// CHECK-ASM-NEXT:cset {{w[0-9]+}}, ge
// COMMONIR: [[VCGEZ_I:%.*]] = sext i1 [[TMP0]] to i32
// COMMONIR: ret i32 [[VCGEZ_I]]
uint32_t test_vcgezs_f32(float32_t a) {
@@ -619,8 +530,6 @@ uint32_t test_vcgezs_f32(float32_t a) {
// COMMON-LABEL: test_vcgezd_f64
// UNCONSTRAINED: [[TMP0:%.*]] = fcmp oge double %a, 0.000000e+00
// CONSTRAINED: [[TMP0:%.*]] = call i1 @llvm.experimental.constrained.fcmps.f64(double %a, double 0.000000e+00, metadata !"oge", metadata !"fpexcept.strict")
-// CHECK-ASM: fcmp d{{[0-9]+}}, #0.0
-// CHECK-ASM-NEXT:cset {{w[0-9]+}}, ge
// COMMONIR: [[VCGEZ_I:%.*]] = sext i1 [[TMP0]] to i64
// COMMONIR: ret i64 [[VCGEZ_I]]
uint64_t test_vcgezd_f64(float64_t a) {
@@ -630,8 +539,6 @@ uint64_t test_vcgezd_f64(float64_t a) {
// COMMON-LABEL: test_vcgts_f32
// UNCONSTRAINED: [[TMP0:%.*]] = fcmp ogt float %a, %b
// CONSTRAINED: [[TMP0:%.*]] = call i1 @llvm.experimental.constrained.fcmps.f32(float %a, float %b, metadata !"ogt", metadata !"fpexcept.strict")
-// CHECK-ASM: fcmp s{{[0-9]+}}, s{{[0-9]+}}
-// CHECK-ASM-NEXT:cset {{w[0-9]+}}, gt
// COMMONIR: [[VCMPD_I:%.*]] = sext i1 [[TMP0]] to i32
// COMMONIR: ret i32 [[VCMPD_I]]
uint32_t test_vcgts_f32(float32_t a, float32_t b) {
@@ -641,8 +548,6 @@ uint32_t test_vcgts_f32(float32_t a, float32_t b) {
// COMMON-LABEL: test_vcgtd_f64
// UNCONSTRAINED: [[TMP0:%.*]] = fcmp ogt double %a, %b
// CONSTRAINED: [[TMP0:%.*]] = call i1 @llvm.experimental.constrained.fcmps.f64(double %a, double %b, metadata !"ogt", metadata !"fpexcept.strict")
-// CHECK-ASM: fcmp d{{[0-9]+}}, d{{[0-9]+}}
-// CHECK-ASM-NEXT:cset {{w[0-9]+}}, gt
// COMMONIR: [[VCMPD_I:%.*]] = sext i1 [[TMP0]] to i64
// COMMONIR: ret i64 [[VCMPD_I]]
uint64_t test_vcgtd_f64(float64_t a, float64_t b) {
@@ -652,8 +557,6 @@ uint64_t test_vcgtd_f64(float64_t a, float64_t b) {
// COMMON-LABEL: test_vcgtzs_f32
// UNCONSTRAINED: [[TMP0:%.*]] = fcmp ogt float %a, 0.000000e+00
// CONSTRAINED: [[TMP0:%.*]] = call i1 @llvm.experimental.constrained.fcmps.f32(float %a, float 0.000000e+00, metadata !"ogt", metadata !"fpexcept.strict")
-// CHECK-ASM: fcmp s{{[0-9]+}}, #0.0
-// CHECK-ASM-NEXT:cset {{w[0-9]+}}, gt
// COMMONIR: [[VCGTZ_I:%.*]] = sext i1 [[TMP0]] to i32
// COMMONIR: ret i32 [[VCGTZ_I]]
uint32_t test_vcgtzs_f32(float32_t a) {
@@ -663,8 +566,6 @@ uint32_t test_vcgtzs_f32(float32_t a) {
// COMMON-LABEL: test_vcgtzd_f64
// UNCONSTRAINED: [[TMP0:%.*]] = fcmp ogt double %a, 0.000000e+00
// CONSTRAINED: [[TMP0:%.*]] = call i1 @llvm.experimental.constrained.fcmps.f64(double %a, double 0.000000e+00, metadata !"ogt", metadata !"fpexcept.strict")
-// CHECK-ASM: fcmp d{{[0-9]+}}, #0.0
-// CHECK-ASM-NEXT:cset {{w[0-9]+}}, gt
// COMMONIR: [[VCGTZ_I:%.*]] = sext i1 [[TMP0]] to i64
// COMMONIR: ret i64 [[VCGTZ_I]]
uint64_t test_vcgtzd_f64(float64_t a) {
@@ -674,8 +575,6 @@ uint64_t test_vcgtzd_f64(float64_t a) {
// COMMON-LABEL: test_vcles_f32
// UNCONSTRAINED: [[TMP0:%.*]] = fcmp ole float %a, %b
// CONSTRAINED: [[TMP0:%.*]] = call i1 @llvm.experimental.constrained.fcmps.f32(float %a, float %b, metadata !"ole", metadata !"fpexcept.strict")
-// CHECK-ASM: fcmp s{{[0-9]+}}, s{{[0-9]+}}
-// CHECK-ASM-NEXT:cset {{w[0-9]+}}, ls
// COMMONIR: [[VCMPD_I:%.*]] = sext i1 [[TMP0]] to i32
// COMMONIR: ret i32 [[VCMPD_I]]
uint32_t test_vcles_f32(float32_t a, float32_t b) {
@@ -685,8 +584,6 @@ uint32_t test_vcles_f32(float32_t a, float32_t b) {
// COMMON-LABEL: test_vcled_f64
// UNCONSTRAINED: [[TMP0:%.*]] = fcmp ole double %a, %b
// CONSTRAINED: [[TMP0:%.*]] = call i1 @llvm.experimental.constrained.fcmps.f64(double %a, double %b, metadata !"ole", metadata !"fpexcept.strict")
-// CHECK-ASM: fcmp d{{[0-9]+}}, d{{[0-9]+}}
-// CHECK-ASM-NEXT:cset {{w[0-9]+}}, ls
// COMMONIR: [[VCMPD_I:%.*]] = sext i1 [[TMP0]] to i64
// COMMONIR: ret i64 [[VCMPD_I]]
uint64_t test_vcled_f64(float64_t a, float64_t b) {
@@ -696,8 +593,6 @@ uint64_t test_vcled_f64(float64_t a, float64_t b) {
// COMMON-LABEL: test_vclezs_f32
// UNCONSTRAINED: [[TMP0:%.*]] = fcmp ole float %a, 0.000000e+00
// CONSTRAINED: [[TMP0:%.*]] = call i1 @llvm.experimental.constrained.fcmps.f32(float %a, float 0.000000e+00, metadata !"ole", metadata !"fpexcept.strict")
-// CHECK-ASM: fcmp s{{[0-9]+}}, #0.0
-// CHECK-ASM-NEXT:cset {{w[0-9]+}}, ls
// COMMONIR: [[VCLEZ_I:%.*]] = sext i1 [[TMP0]] to i32
// COMMONIR: ret i32 [[VCLEZ_I]]
uint32_t test_vclezs_f32(float32_t a) {
@@ -707,8 +602,6 @@ uint32_t test_vclezs_f32(float32_t a) {
// COMMON-LABEL: test_vclezd_f64
// UNCONSTRAINED: [[TMP0:%.*]] = fcmp ole double %a, 0.000000e+00
// CONSTRAINED: [[TMP0:%.*]] = call i1 @llvm.experimental.constrained.fcmps.f64(double %a, double 0.000000e+00, metadata !"ole", metadata !"fpexcept.strict")
-// CHECK-ASM: fcmp d{{[0-9]+}}, #0.0
-// CHECK-ASM-NEXT:cset {{w[0-9]+}}, ls
// COMMONIR: [[VCLEZ_I:%.*]] = sext i1 [[TMP0]] to i64
// COMMONIR: ret i64 [[VCLEZ_I]]
uint64_t test_vclezd_f64(float64_t a) {
@@ -718,8 +611,6 @@ uint64_t test_vclezd_f64(float64_t a) {
// COMMON-LABEL: test_vclts_f32
// UNCONSTRAINED: [[TMP0:%.*]] = fcmp olt float %a, %b
// CONSTRAINED: [[TMP0:%.*]] = call i1 @llvm.experimental.constrained.fcmps.f32(float %a, float %b, metadata !"olt", metadata !"fpexcept.strict")
-// CHECK-ASM: fcmp s{{[0-9]+}}, s{{[0-9]+}}
-// CHECK-ASM-NEXT:cset {{w[0-9]+}}, mi
// COMMONIR: [[VCMPD_I:%.*]] = sext i1 [[TMP0]] to i32
// COMMONIR: ret i32 [[VCMPD_I]]
uint32_t test_vclts_f32(float32_t a, float32_t b) {
@@ -729,8 +620,6 @@ uint32_t test_vclts_f32(float32_t a, float32_t b) {
// COMMON-LABEL: test_vcltd_f64
// UNCONSTRAINED: [[TMP0:%.*]] = fcmp olt double %a, %b
// CONSTRAINED: [[TMP0:%.*]] = call i1 @llvm.experimental.constrained.fcmps.f64(double %a, double %b, metadata !"olt", metadata !"fpexcept.strict")
-// CHECK-ASM: fcmp d{{[0-9]+}}, d{{[0-9]+}}
-// CHECK-ASM-NEXT:cset {{w[0-9]+}}, mi
// COMMONIR: [[VCMPD_I:%.*]] = sext i1 [[TMP0]] to i64
// COMMONIR: ret i64 [[VCMPD_I]]
uint64_t test_vcltd_f64(float64_t a, float64_t b) {
@@ -740,8 +629,6 @@ uint64_t test_vcltd_f64(float64_t a, float64_t b) {
// COMMON-LABEL: test_vcltzs_f32
// UNCONSTRAINED: [[TMP0:%.*]] = fcmp olt float %a, 0.000000e+00
// CONSTRAINED: [[TMP0:%.*]] = call i1 @llvm.experimental.constrained.fcmps.f32(float %a, float 0.000000e+00, metadata !"olt", metadata !"fpexcept.strict")
-// CHECK-ASM: fcmp s{{[0-9]+}}, #0.0
-// CHECK-ASM-NEXT:cset {{w[0-9]+}}, mi
// COMMONIR: [[VCLTZ_I:%.*]] = sext i1 [[TMP0]] to i32
// COMMONIR: ret i32 [[VCLTZ_I]]
uint32_t test_vcltzs_f32(float32_t a) {
@@ -751,8 +638,6 @@ uint32_t test_vcltzs_f32(float32_t a) {
// COMMON-LABEL: test_vcltzd_f64
// UNCONSTRAINED: [[TMP0:%.*]] = fcmp olt double %a, 0.000000e+00
// CONSTRAINED: [[TMP0:%.*]] = call i1 @llvm.experimental.constrained.fcmps.f64(double %a, double 0.000000e+00, metadata !"olt", metadata !"fpexcept.strict")
-// CHECK-ASM: fcmp d{{[0-9]+}}, #0.0
-// CHECK-ASM-NEXT:cset {{w[0-9]+}}, mi
// COMMONIR: [[VCLTZ_I:%.*]] = sext i1 [[TMP0]] to i64
// COMMONIR: ret i64 [[VCLTZ_I]]
uint64_t test_vcltzd_f64(float64_t a) {
@@ -762,7 +647,6 @@ uint64_t test_vcltzd_f64(float64_t a) {
// COMMON-LABEL: test_vadd_f64
// UNCONSTRAINED: [[ADD_I:%.*]] = fadd <1 x double> %a, %b
// CONSTRAINED: [[ADD_I:%.*]] = call <1 x double> @llvm.experimental.constrained.fadd.v1f64(<1 x double> %a, <1 x double> %b, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM: fadd d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
// COMMONIR: ret <1 x double> [[ADD_I]]
float64x1_t test_vadd_f64(float64x1_t a, float64x1_t b) {
return vadd_f64(a, b);
@@ -771,7 +655,6 @@ float64x1_t test_vadd_f64(float64x1_t a, float64x1_t b) {
// COMMON-LABEL: test_vmul_f64
// UNCONSTRAINED: [[MUL_I:%.*]] = fmul <1 x double> %a, %b
// CONSTRAINED: [[MUL_I:%.*]] = call <1 x double> @llvm.experimental.constrained.fmul.v1f64(<1 x double> %a, <1 x double> %b, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM: fmul d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
// COMMONIR: ret <1 x double> [[MUL_I]]
float64x1_t test_vmul_f64(float64x1_t a, float64x1_t b) {
return vmul_f64(a, b);
@@ -780,7 +663,6 @@ float64x1_t test_vmul_f64(float64x1_t a, float64x1_t b) {
// COMMON-LABEL: test_vdiv_f64
// UNCONSTRAINED: [[DIV_I:%.*]] = fdiv <1 x double> %a, %b
// CONSTRAINED: [[DIV_I:%.*]] = call <1 x double> @llvm.experimental.constrained.fdiv.v1f64(<1 x double> %a, <1 x double> %b, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM: fdiv d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
// COMMONIR: ret <1 x double> [[DIV_I]]
float64x1_t test_vdiv_f64(float64x1_t a, float64x1_t b) {
return vdiv_f64(a, b);
@@ -789,10 +671,8 @@ float64x1_t test_vdiv_f64(float64x1_t a, float64x1_t b) {
// COMMON-LABEL: test_vmla_f64
// UNCONSTRAINED: [[MUL_I:%.*]] = fmul <1 x double> %b, %c
// CONSTRAINED: [[MUL_I:%.*]] = call <1 x double> @llvm.experimental.constrained.fmul.v1f64(<1 x double> %b, <1 x double> %c, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM: fmul d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
// UNCONSTRAINED: [[ADD_I:%.*]] = fadd <1 x double> %a, [[MUL_I]]
// CONSTRAINED: [[ADD_I:%.*]] = call <1 x double> @llvm.experimental.constrained.fadd.v1f64(<1 x double> %a, <1 x double> [[MUL_I]], metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM: fadd d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
// COMMONIR: ret <1 x double> [[ADD_I]]
float64x1_t test_vmla_f64(float64x1_t a, float64x1_t b, float64x1_t c) {
return vmla_f64(a, b, c);
@@ -801,10 +681,8 @@ float64x1_t test_vmla_f64(float64x1_t a, float64x1_t b, float64x1_t c) {
// COMMON-LABEL: test_vmls_f64
// UNCONSTRAINED: [[MUL_I:%.*]] = fmul <1 x double> %b, %c
// CONSTRAINED: [[MUL_I:%.*]] = call <1 x double> @llvm.experimental.constrained.fmul.v1f64(<1 x double> %b, <1 x double> %c, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM: fmul d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
// UNCONSTRAINED: [[SUB_I:%.*]] = fsub <1 x double> %a, [[MUL_I]]
// CONSTRAINED: [[SUB_I:%.*]] = call <1 x double> @llvm.experimental.constrained.fsub.v1f64(<1 x double> %a, <1 x double> [[MUL_I]], metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM: fsub d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
// COMMONIR: ret <1 x double> [[SUB_I]]
float64x1_t test_vmls_f64(float64x1_t a, float64x1_t b, float64x1_t c) {
return vmls_f64(a, b, c);
@@ -816,7 +694,6 @@ float64x1_t test_vmls_f64(float64x1_t a, float64x1_t b, float64x1_t c) {
// COMMONIR: [[TMP2:%.*]] = bitcast <1 x double> %c to <8 x i8>
// UNCONSTRAINED: [[TMP3:%.*]] = call <1 x double> @llvm.fma.v1f64(<1 x double> %b, <1 x double> %c, <1 x double> %a)
// CONSTRAINED: [[TMP3:%.*]] = call <1 x double> @llvm.experimental.constrained.fma.v1f64(<1 x double> %b, <1 x double> %c, <1 x double> %a, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM: fmadd d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
// COMMONIR: ret <1 x double> [[TMP3]]
float64x1_t test_vfma_f64(float64x1_t a, float64x1_t b, float64x1_t c) {
return vfma_f64(a, b, c);
@@ -824,13 +701,11 @@ float64x1_t test_vfma_f64(float64x1_t a, float64x1_t b, float64x1_t c) {
// COMMON-LABEL: test_vfms_f64
// COMMONIR: [[SUB_I:%.*]] = fneg <1 x double> %b
-// CHECK-ASM: fneg d{{[0-9]+}}, d{{[0-9]+}}
// COMMONIR: [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8>
// COMMONIR: [[TMP1:%.*]] = bitcast <1 x double> [[SUB_I]] to <8 x i8>
// COMMONIR: [[TMP2:%.*]] = bitcast <1 x double> %c to <8 x i8>
// UNCONSTRAINED: [[TMP3:%.*]] = call <1 x double> @llvm.fma.v1f64(<1 x double> [[SUB_I]], <1 x double> %c, <1 x double> %a)
// CONSTRAINED: [[TMP3:%.*]] = call <1 x double> @llvm.experimental.constrained.fma.v1f64(<1 x double> [[SUB_I]], <1 x double> %c, <1 x double> %a, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM: fmadd d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
// COMMONIR: ret <1 x double> [[TMP3]]
float64x1_t test_vfms_f64(float64x1_t a, float64x1_t b, float64x1_t c) {
return vfms_f64(a, b, c);
@@ -839,7 +714,6 @@ float64x1_t test_vfms_f64(float64x1_t a, float64x1_t b, float64x1_t c) {
// COMMON-LABEL: test_vsub_f64
// UNCONSTRAINED: [[SUB_I:%.*]] = fsub <1 x double> %a, %b
// CONSTRAINED: [[SUB_I:%.*]] = call <1 x double> @llvm.experimental.constrained.fsub.v1f64(<1 x double> %a, <1 x double> %b, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM: fsub d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
// COMMONIR: ret <1 x double> [[SUB_I]]
float64x1_t test_vsub_f64(float64x1_t a, float64x1_t b) {
return vsub_f64(a, b);
@@ -847,9 +721,7 @@ float64x1_t test_vsub_f64(float64x1_t a, float64x1_t b) {
// COMMON-LABEL: test_vcvt_s64_f64
// COMMONIR: [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8>
-// UNCONSTRAINED: [[TMP1:%.*]] = fptosi <1 x double> %a to <1 x i64>
-// CONSTRAINED: [[TMP1:%.*]] = call <1 x i64> @llvm.experimental.constrained.fptosi.v1i64.v1f64(<1 x double> %a, metadata !"fpexcept.strict")
-// CHECK-ASM: fcvtzs x{{[0-9]+}}, d{{[0-9]+}}
+// COMMONIR: [[TMP1:%.*]] = call <1 x i64> @llvm.aarch64.neon.fcvtzs.v1i64.v1f64(<1 x double> %a)
// COMMONIR: ret <1 x i64> [[TMP1]]
int64x1_t test_vcvt_s64_f64(float64x1_t a) {
return vcvt_s64_f64(a);
@@ -857,9 +729,7 @@ int64x1_t test_vcvt_s64_f64(float64x1_t a) {
// COMMON-LABEL: test_vcvt_u64_f64
// COMMONIR: [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8>
-// UNCONSTRAINED: [[TMP1:%.*]] = fptoui <1 x double> %a to <1 x i64>
-// CONSTRAINED: [[TMP1:%.*]] = call <1 x i64> @llvm.experimental.constrained.fptoui.v1i64.v1f64(<1 x double> %a, metadata !"fpexcept.strict")
-// CHECK-ASM: fcvtzu x{{[0-9]+}}, d{{[0-9]+}}
+// COMMONIR: [[TMP1:%.*]] = call <1 x i64> @llvm.aarch64.neon.fcvtzu.v1i64.v1f64(<1 x double> %a)
// COMMONIR: ret <1 x i64> [[TMP1]]
uint64x1_t test_vcvt_u64_f64(float64x1_t a) {
return vcvt_u64_f64(a);
@@ -869,7 +739,6 @@ uint64x1_t test_vcvt_u64_f64(float64x1_t a) {
// COMMONIR: [[TMP0:%.*]] = bitcast <1 x i64> %a to <8 x i8>
// UNCONSTRAINED: [[VCVT_I:%.*]] = sitofp <1 x i64> %a to <1 x double>
// CONSTRAINED: [[VCVT_I:%.*]] = call <1 x double> @llvm.experimental.constrained.sitofp.v1f64.v1i64(<1 x i64> %a, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM: scvtf d{{[0-9]+}}, x{{[0-9]+}}
// COMMONIR: ret <1 x double> [[VCVT_I]]
float64x1_t test_vcvt_f64_s64(int64x1_t a) {
return vcvt_f64_s64(a);
@@ -879,7 +748,6 @@ float64x1_t test_vcvt_f64_s64(int64x1_t a) {
// COMMONIR: [[TMP0:%.*]] = bitcast <1 x i64> %a to <8 x i8>
// UNCONSTRAINED: [[VCVT_I:%.*]] = uitofp <1 x i64> %a to <1 x double>
// CONSTRAINED: [[VCVT_I:%.*]] = call <1 x double> @llvm.experimental.constrained.uitofp.v1f64.v1i64(<1 x i64> %a, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM: ucvtf d{{[0-9]+}}, x{{[0-9]+}}
// COMMONIR: ret <1 x double> [[VCVT_I]]
float64x1_t test_vcvt_f64_u64(uint64x1_t a) {
return vcvt_f64_u64(a);
@@ -889,7 +757,6 @@ float64x1_t test_vcvt_f64_u64(uint64x1_t a) {
// COMMONIR: [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8>
// UNCONSTRAINED: [[VRNDA1_I:%.*]] = call <1 x double> @llvm.round.v1f64(<1 x double> %a)
// CONSTRAINED: [[VRNDA1_I:%.*]] = call <1 x double> @llvm.experimental.constrained.round.v1f64(<1 x double> %a, metadata !"fpexcept.strict")
-// CHECK-ASM: frinta d{{[0-9]+}}, d{{[0-9]+}}
// COMMONIR: ret <1 x double> [[VRNDA1_I]]
float64x1_t test_vrnda_f64(float64x1_t a) {
return vrnda_f64(a);
@@ -899,7 +766,6 @@ float64x1_t test_vrnda_f64(float64x1_t a) {
// COMMONIR: [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8>
// UNCONSTRAINED: [[VRNDP1_I:%.*]] = call <1 x double> @llvm.ceil.v1f64(<1 x double> %a)
// CONSTRAINED: [[VRNDP1_I:%.*]] = call <1 x double> @llvm.experimental.constrained.ceil.v1f64(<1 x double> %a, metadata !"fpexcept.strict")
-// CHECK-ASM: frintp d{{[0-9]+}}, d{{[0-9]+}}
// COMMONIR: ret <1 x double> [[VRNDP1_I]]
float64x1_t test_vrndp_f64(float64x1_t a) {
return vrndp_f64(a);
@@ -909,7 +775,6 @@ float64x1_t test_vrndp_f64(float64x1_t a) {
// COMMONIR: [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8>
// UNCONSTRAINED: [[VRNDM1_I:%.*]] = call <1 x double> @llvm.floor.v1f64(<1 x double> %a)
// CONSTRAINED: [[VRNDM1_I:%.*]] = call <1 x double> @llvm.experimental.constrained.floor.v1f64(<1 x double> %a, metadata !"fpexcept.strict")
-// CHECK-ASM: frintm d{{[0-9]+}}, d{{[0-9]+}}
// COMMONIR: ret <1 x double> [[VRNDM1_I]]
float64x1_t test_vrndm_f64(float64x1_t a) {
return vrndm_f64(a);
@@ -919,7 +784,6 @@ float64x1_t test_vrndm_f64(float64x1_t a) {
// COMMONIR: [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8>
// UNCONSTRAINED: [[VRNDX1_I:%.*]] = call <1 x double> @llvm.rint.v1f64(<1 x double> %a)
// CONSTRAINED: [[VRNDX1_I:%.*]] = call <1 x double> @llvm.experimental.constrained.rint.v1f64(<1 x double> %a, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM: frintx d{{[0-9]+}}, d{{[0-9]+}}
// COMMONIR: ret <1 x double> [[VRNDX1_I]]
float64x1_t test_vrndx_f64(float64x1_t a) {
return vrndx_f64(a);
@@ -929,7 +793,6 @@ float64x1_t test_vrndx_f64(float64x1_t a) {
// COMMONIR: [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8>
// UNCONSTRAINED: [[VRNDZ1_I:%.*]] = call <1 x double> @llvm.trunc.v1f64(<1 x double> %a)
// CONSTRAINED: [[VRNDZ1_I:%.*]] = call <1 x double> @llvm.experimental.constrained.trunc.v1f64(<1 x double> %a, metadata !"fpexcept.strict")
-// CHECK-ASM: frintz d{{[0-9]+}}, d{{[0-9]+}}
// COMMONIR: ret <1 x double> [[VRNDZ1_I]]
float64x1_t test_vrnd_f64(float64x1_t a) {
return vrnd_f64(a);
@@ -939,7 +802,6 @@ float64x1_t test_vrnd_f64(float64x1_t a) {
// COMMONIR: [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8>
// UNCONSTRAINED: [[VRNDI1_I:%.*]] = call <1 x double> @llvm.nearbyint.v1f64(<1 x double> %a)
// CONSTRAINED: [[VRNDI1_I:%.*]] = call <1 x double> @llvm.experimental.constrained.nearbyint.v1f64(<1 x double> %a, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM: frinti d{{[0-9]+}}, d{{[0-9]+}}
// COMMONIR: ret <1 x double> [[VRNDI1_I]]
float64x1_t test_vrndi_f64(float64x1_t a) {
return vrndi_f64(a);
@@ -949,7 +811,6 @@ float64x1_t test_vrndi_f64(float64x1_t a) {
// COMMONIR: [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8>
// UNCONSTRAINED: [[VSQRT_I:%.*]] = call <1 x double> @llvm.sqrt.v1f64(<1 x double> %a)
// CONSTRAINED: [[VSQRT_I:%.*]] = call <1 x double> @llvm.experimental.constrained.sqrt.v1f64(<1 x double> %a, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM: fsqrt d{{[0-9]+}}, d{{[0-9]+}}
// COMMONIR: ret <1 x double> [[VSQRT_I]]
float64x1_t test_vsqrt_f64(float64x1_t a) {
return vsqrt_f64(a);
diff --git a/clang/test/CodeGen/aarch64-v8.2a-fp16-intrinsics-constrained.c b/clang/test/CodeGen/aarch64-v8.2a-fp16-intrinsics-constrained.c
index d42fb1e02cade..7d012618c26f7 100644
--- a/clang/test/CodeGen/aarch64-v8.2a-fp16-intrinsics-constrained.c
+++ b/clang/test/CodeGen/aarch64-v8.2a-fp16-intrinsics-constrained.c
@@ -1,31 +1,19 @@
// RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +fullfp16 \
// RUN: -fallow-half-arguments-and-returns -S -disable-O0-optnone \
// RUN: -emit-llvm -o - %s | opt -S -mem2reg \
-// RUN: | FileCheck --check-prefix=COMMON --check-prefix=COMMONIR --check-prefix=UNCONSTRAINED %s
+// RUN: | FileCheck --check-prefixes=COMMON,COMMONIR,UNCONSTRAINED %s
// RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +fullfp16 \
// RUN: -fallow-half-arguments-and-returns -S -disable-O0-optnone \
-// RUN: -ffp-exception-behavior=strict -emit-llvm -o - %s | opt -S -mem2reg \
-// RUN: | FileCheck --check-prefix=COMMON --check-prefix=COMMONIR --check-prefix=CONSTRAINED %s
-// RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +fullfp16 \
-// RUN: -fallow-half-arguments-and-returns -S -disable-O0-optnone -o - %s \
-// RUN: | FileCheck --check-prefix=COMMON --check-prefix=CHECK-ASM %s
-// RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +fullfp16 \
-// RUN: -ffp-exception-behavior=strict \
-// RUN: -fallow-half-arguments-and-returns -S -disable-O0-optnone -o - %s \
-// RUN: | FileCheck --check-prefix=COMMON --check-prefix=CHECK-ASM %s
+// RUN: -ffp-exception-behavior=strict -fexperimental-strict-floating-point -emit-llvm -o - %s | opt -S -mem2reg \
+// RUN: | FileCheck --check-prefixes=COMMON,COMMONIR,CONSTRAINED %s
// REQUIRES: aarch64-registered-target
-// "Lowering of strict fp16 not yet implemented"
-// XFAIL: *
-
#include <arm_fp16.h>
// COMMON-LABEL: test_vceqzh_f16
// UNCONSTRAINED: [[TMP1:%.*]] = fcmp oeq half %a, 0xH0000
// CONSTRAINED: [[TMP1:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f16(half %a, half 0xH0000, metadata !"oeq", metadata !"fpexcept.strict")
-// CHECK-ASM: fcmp
-// CHECK-ASM: cset {{w[0-9]+}}, eq
// COMMONIR: [[TMP2:%.*]] = sext i1 [[TMP1]] to i16
// COMMONIR: ret i16 [[TMP2]]
uint16_t test_vceqzh_f16(float16_t a) {
@@ -34,9 +22,7 @@ uint16_t test_vceqzh_f16(float16_t a) {
// COMMON-LABEL: test_vcgezh_f16
// UNCONSTRAINED: [[TMP1:%.*]] = fcmp oge half %a, 0xH0000
-// CONSTRAINED: [[TMP1:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f16(half %a, half 0xH0000, metadata !"oge", metadata !"fpexcept.strict")
-// CHECK-ASM: fcmp
-// CHECK-ASM: cset {{w[0-9]+}}, ge
+// CONSTRAINED: [[TMP1:%.*]] = call i1 @llvm.experimental.constrained.fcmps.f16(half %a, half 0xH0000, metadata !"oge", metadata !"fpexcept.strict")
// COMMONIR: [[TMP2:%.*]] = sext i1 [[TMP1]] to i16
// COMMONIR: ret i16 [[TMP2]]
uint16_t test_vcgezh_f16(float16_t a) {
@@ -45,9 +31,7 @@ uint16_t test_vcgezh_f16(float16_t a) {
// COMMON-LABEL: test_vcgtzh_f16
// UNCONSTRAINED: [[TMP1:%.*]] = fcmp ogt half %a, 0xH0000
-// CONSTRAINED: [[TMP1:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f16(half %a, half 0xH0000, metadata !"ogt", metadata !"fpexcept.strict")
-// CHECK-ASM: fcmp
-// CHECK-ASM: cset {{w[0-9]+}}, gt
+// CONSTRAINED: [[TMP1:%.*]] = call i1 @llvm.experimental.constrained.fcmps.f16(half %a, half 0xH0000, metadata !"ogt", metadata !"fpexcept.strict")
// COMMONIR: [[TMP2:%.*]] = sext i1 [[TMP1]] to i16
// COMMONIR: ret i16 [[TMP2]]
uint16_t test_vcgtzh_f16(float16_t a) {
@@ -56,9 +40,7 @@ uint16_t test_vcgtzh_f16(float16_t a) {
// COMMON-LABEL: test_vclezh_f16
// UNCONSTRAINED: [[TMP1:%.*]] = fcmp ole half %a, 0xH0000
-// CONSTRAINED: [[TMP1:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f16(half %a, half 0xH0000, metadata !"ole", metadata !"fpexcept.strict")
-// CHECK-ASM: fcmp
-// CHECK-ASM: cset {{w[0-9]+}}, ls
+// CONSTRAINED: [[TMP1:%.*]] = call i1 @llvm.experimental.constrained.fcmps.f16(half %a, half 0xH0000, metadata !"ole", metadata !"fpexcept.strict")
// COMMONIR: [[TMP2:%.*]] = sext i1 [[TMP1]] to i16
// COMMONIR: ret i16 [[TMP2]]
uint16_t test_vclezh_f16(float16_t a) {
@@ -67,9 +49,7 @@ uint16_t test_vclezh_f16(float16_t a) {
// COMMON-LABEL: test_vcltzh_f16
// UNCONSTRAINED: [[TMP1:%.*]] = fcmp olt half %a, 0xH0000
-// CONSTRAINED: [[TMP1:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f16(half %a, half 0xH0000, metadata !"olt", metadata !"fpexcept.strict")
-// CHECK-ASM: fcmp
-// CHECK-ASM: cset {{w[0-9]+}}, mi
+// CONSTRAINED: [[TMP1:%.*]] = call i1 @llvm.experimental.constrained.fcmps.f16(half %a, half 0xH0000, metadata !"olt", metadata !"fpexcept.strict")
// COMMONIR: [[TMP2:%.*]] = sext i1 [[TMP1]] to i16
// COMMONIR: ret i16 [[TMP2]]
uint16_t test_vcltzh_f16(float16_t a) {
@@ -79,7 +59,6 @@ uint16_t test_vcltzh_f16(float16_t a) {
// COMMON-LABEL: test_vcvth_f16_s16
// UNCONSTRAINED: [[VCVT:%.*]] = sitofp i16 %a to half
// CONSTRAINED: [[VCVT:%.*]] = call half @llvm.experimental.constrained.sitofp.f16.i16(i16 %a, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM: scvtf
// COMMONIR: ret half [[VCVT]]
float16_t test_vcvth_f16_s16 (int16_t a) {
return vcvth_f16_s16(a);
@@ -88,7 +67,6 @@ float16_t test_vcvth_f16_s16 (int16_t a) {
// COMMON-LABEL: test_vcvth_f16_s32
// UNCONSTRAINED: [[VCVT:%.*]] = sitofp i32 %a to half
// CONSTRAINED: [[VCVT:%.*]] = call half @llvm.experimental.constrained.sitofp.f16.i32(i32 %a, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM: scvtf
// COMMONIR: ret half [[VCVT]]
float16_t test_vcvth_f16_s32 (int32_t a) {
return vcvth_f16_s32(a);
@@ -97,7 +75,6 @@ float16_t test_vcvth_f16_s32 (int32_t a) {
// COMMON-LABEL: test_vcvth_f16_s64
// UNCONSTRAINED: [[VCVT:%.*]] = sitofp i64 %a to half
// CONSTRAINED: [[VCVT:%.*]] = call half @llvm.experimental.constrained.sitofp.f16.i64(i64 %a, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM: scvtf
// COMMONIR: ret half [[VCVT]]
float16_t test_vcvth_f16_s64 (int64_t a) {
return vcvth_f16_s64(a);
@@ -106,7 +83,6 @@ float16_t test_vcvth_f16_s64 (int64_t a) {
// COMMON-LABEL: test_vcvth_f16_u16
// UNCONSTRAINED: [[VCVT:%.*]] = uitofp i16 %a to half
// CONSTRAINED: [[VCVT:%.*]] = call half @llvm.experimental.constrained.uitofp.f16.i16(i16 %a, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM: ucvtf
// COMMONIR: ret half [[VCVT]]
float16_t test_vcvth_f16_u16 (uint16_t a) {
return vcvth_f16_u16(a);
@@ -115,7 +91,6 @@ float16_t test_vcvth_f16_u16 (uint16_t a) {
// COMMON-LABEL: test_vcvth_f16_u32
// UNCONSTRAINED: [[VCVT:%.*]] = uitofp i32 %a to half
// CONSTRAINED: [[VCVT:%.*]] = call half @llvm.experimental.constrained.uitofp.f16.i32(i32 %a, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM: ucvtf
// COMMONIR: ret half [[VCVT]]
float16_t test_vcvth_f16_u32 (uint32_t a) {
return vcvth_f16_u32(a);
@@ -124,67 +99,50 @@ float16_t test_vcvth_f16_u32 (uint32_t a) {
// COMMON-LABEL: test_vcvth_f16_u64
// UNCONSTRAINED: [[VCVT:%.*]] = uitofp i64 %a to half
// CONSTRAINED: [[VCVT:%.*]] = call half @llvm.experimental.constrained.uitofp.f16.i64(i64 %a, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM: ucvtf
// COMMONIR: ret half [[VCVT]]
float16_t test_vcvth_f16_u64 (uint64_t a) {
return vcvth_f16_u64(a);
}
// COMMON-LABEL: test_vcvth_s16_f16
-// UNCONSTRAINED: [[VCVT:%.*]] = fptosi half %a to i16
-// CONSTRAINED: [[VCVT:%.*]] = call i16 @llvm.experimental.constrained.fptosi.i16.f16(half %a, metadata !"fpexcept.strict")
-// CHECK-ASM: fcvt [[CVTREG:s[0-9]+]], {{h[0-9]+}}
-// CHECK-ASM: fcvtzs {{w[0-9]+}}, [[CVTREG]]
-// COMMONIR: ret i16 [[VCVT]]
+// COMMONIR: [[VCVT:%.*]] = call i32 @llvm.aarch64.neon.fcvtzs.i32.f16(half %a)
+// COMMONIR: [[TRUNC:%.*]] = trunc i32 [[VCVT]] to i16
+// COMMONIR: ret i16 [[TRUNC]]
int16_t test_vcvth_s16_f16 (float16_t a) {
return vcvth_s16_f16(a);
}
// COMMON-LABEL: test_vcvth_s32_f16
-// UNCONSTRAINED: [[VCVT:%.*]] = fptosi half %a to i32
-// CONSTRAINED: [[VCVT:%.*]] = call i32 @llvm.experimental.constrained.fptosi.i32.f16(half %a, metadata !"fpexcept.strict")
-// CHECK-ASM: fcvt [[CVTREG:s[0-9]+]], {{h[0-9]+}}
-// CHECK-ASM: fcvtzs {{w[0-9]+}}, [[CVTREG]]
+// COMMONIR: [[VCVT:%.*]] = call i32 @llvm.aarch64.neon.fcvtzs.i32.f16(half %a)
// COMMONIR: ret i32 [[VCVT]]
int32_t test_vcvth_s32_f16 (float16_t a) {
return vcvth_s32_f16(a);
}
// COMMON-LABEL: test_vcvth_s64_f16
-// UNCONSTRAINED: [[VCVT:%.*]] = fptosi half %a to i64
-// CONSTRAINED: [[VCVT:%.*]] = call i64 @llvm.experimental.constrained.fptosi.i64.f16(half %a, metadata !"fpexcept.strict")
-// CHECK-ASM: fcvt [[CVTREG:s[0-9]+]], {{h[0-9]+}}
-// CHECK-ASM: fcvtzs {{x[0-9]+}}, [[CVTREG]]
+// COMMONIR: [[VCVT:%.*]] = call i64 @llvm.aarch64.neon.fcvtzs.i64.f16(half %a)
// COMMONIR: ret i64 [[VCVT]]
int64_t test_vcvth_s64_f16 (float16_t a) {
return vcvth_s64_f16(a);
}
// COMMON-LABEL: test_vcvth_u16_f16
-// UNCONSTRAINED: [[VCVT:%.*]] = fptoui half %a to i16
-// CONSTRAINED: [[VCVT:%.*]] = call i16 @llvm.experimental.constrained.fptoui.i16.f16(half %a, metadata !"fpexcept.strict")
-// CHECK-ASM: fcvt [[CVTREG:s[0-9]+]], {{h[0-9]+}}
-// CHECK-ASM: fcvtzu {{w[0-9]+}}, [[CVTREG]]
-// COMMONIR: ret i16 [[VCVT]]
+// COMMONIR: [[VCVT:%.*]] = call i32 @llvm.aarch64.neon.fcvtzu.i32.f16(half %a)
+// COMMONIR: [[TRUNC:%.*]] = trunc i32 [[VCVT]] to i16
+// COMMONIR: ret i16 [[TRUNC]]
uint16_t test_vcvth_u16_f16 (float16_t a) {
return vcvth_u16_f16(a);
}
// COMMON-LABEL: test_vcvth_u32_f16
-// UNCONSTRAINED: [[VCVT:%.*]] = fptoui half %a to i32
-// CONSTRAINED: [[VCVT:%.*]] = call i32 @llvm.experimental.constrained.fptoui.i32.f16(half %a, metadata !"fpexcept.strict")
-// CHECK-ASM: fcvt [[CVTREG:s[0-9]+]], {{h[0-9]+}}
-// CHECK-ASM: fcvtzu {{w[0-9]+}}, [[CVTREG]]
+// COMMONIR: [[VCVT:%.*]] = call i32 @llvm.aarch64.neon.fcvtzu.i32.f16(half %a)
// COMMONIR: ret i32 [[VCVT]]
uint32_t test_vcvth_u32_f16 (float16_t a) {
return vcvth_u32_f16(a);
}
// COMMON-LABEL: test_vcvth_u64_f16
-// UNCONSTRAINED: [[VCVT:%.*]] = fptoui half %a to i64
-// CONSTRAINED: [[VCVT:%.*]] = call i64 @llvm.experimental.constrained.fptoui.i64.f16(half %a, metadata !"fpexcept.strict")
-// CHECK-ASM: fcvt [[CVTREG:s[0-9]+]], {{h[0-9]+}}
-// CHECK-ASM: fcvtzu {{x[0-9]+}}, [[CVTREG]]
+// COMMONIR: [[VCVT:%.*]] = call i64 @llvm.aarch64.neon.fcvtzu.i64.f16(half %a)
// COMMONIR: ret i64 [[VCVT]]
uint64_t test_vcvth_u64_f16 (float16_t a) {
return vcvth_u64_f16(a);
@@ -193,7 +151,6 @@ uint64_t test_vcvth_u64_f16 (float16_t a) {
// COMMON-LABEL: test_vrndh_f16
// UNCONSTRAINED: [[RND:%.*]] = call half @llvm.trunc.f16(half %a)
// CONSTRAINED: [[RND:%.*]] = call half @llvm.experimental.constrained.trunc.f16(half %a, metadata !"fpexcept.strict")
-// CHECK-ASM: frintz
// COMMONIR: ret half [[RND]]
float16_t test_vrndh_f16(float16_t a) {
return vrndh_f16(a);
@@ -202,7 +159,6 @@ float16_t test_vrndh_f16(float16_t a) {
// COMMON-LABEL: test_vrndah_f16
// UNCONSTRAINED: [[RND:%.*]] = call half @llvm.round.f16(half %a)
// CONSTRAINED: [[RND:%.*]] = call half @llvm.experimental.constrained.round.f16(half %a, metadata !"fpexcept.strict")
-// CHECK-ASM: frinta
// COMMONIR: ret half [[RND]]
float16_t test_vrndah_f16(float16_t a) {
return vrndah_f16(a);
@@ -211,7 +167,6 @@ float16_t test_vrndah_f16(float16_t a) {
// COMMON-LABEL: test_vrndih_f16
// UNCONSTRAINED: [[RND:%.*]] = call half @llvm.nearbyint.f16(half %a)
// CONSTRAINED: [[RND:%.*]] = call half @llvm.experimental.constrained.nearbyint.f16(half %a, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM: frinti
// COMMONIR: ret half [[RND]]
float16_t test_vrndih_f16(float16_t a) {
return vrndih_f16(a);
@@ -220,7 +175,6 @@ float16_t test_vrndih_f16(float16_t a) {
// COMMON-LABEL: test_vrndmh_f16
// UNCONSTRAINED: [[RND:%.*]] = call half @llvm.floor.f16(half %a)
// CONSTRAINED: [[RND:%.*]] = call half @llvm.experimental.constrained.floor.f16(half %a, metadata !"fpexcept.strict")
-// CHECK-ASM: frintm
// COMMONIR: ret half [[RND]]
float16_t test_vrndmh_f16(float16_t a) {
return vrndmh_f16(a);
@@ -229,7 +183,6 @@ float16_t test_vrndmh_f16(float16_t a) {
// COMMON-LABEL: test_vrndph_f16
// UNCONSTRAINED: [[RND:%.*]] = call half @llvm.ceil.f16(half %a)
// CONSTRAINED: [[RND:%.*]] = call half @llvm.experimental.constrained.ceil.f16(half %a, metadata !"fpexcept.strict")
-// CHECK-ASM: frintp
// COMMONIR: ret half [[RND]]
float16_t test_vrndph_f16(float16_t a) {
return vrndph_f16(a);
@@ -238,7 +191,6 @@ float16_t test_vrndph_f16(float16_t a) {
// COMMON-LABEL: test_vrndxh_f16
// UNCONSTRAINED: [[RND:%.*]] = call half @llvm.rint.f16(half %a)
// CONSTRAINED: [[RND:%.*]] = call half @llvm.experimental.constrained.rint.f16(half %a, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM: frintx
// COMMONIR: ret half [[RND]]
float16_t test_vrndxh_f16(float16_t a) {
return vrndxh_f16(a);
@@ -247,7 +199,6 @@ float16_t test_vrndxh_f16(float16_t a) {
// COMMON-LABEL: test_vsqrth_f16
// UNCONSTRAINED: [[SQR:%.*]] = call half @llvm.sqrt.f16(half %a)
// CONSTRAINED: [[SQR:%.*]] = call half @llvm.experimental.constrained.sqrt.f16(half %a, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM: fsqrt
// COMMONIR: ret half [[SQR]]
float16_t test_vsqrth_f16(float16_t a) {
return vsqrth_f16(a);
@@ -256,7 +207,6 @@ float16_t test_vsqrth_f16(float16_t a) {
// COMMON-LABEL: test_vaddh_f16
// UNCONSTRAINED: [[ADD:%.*]] = fadd half %a, %b
// CONSTRAINED: [[ADD:%.*]] = call half @llvm.experimental.constrained.fadd.f16(half %a, half %b, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM: fadd
// COMMONIR: ret half [[ADD]]
float16_t test_vaddh_f16(float16_t a, float16_t b) {
return vaddh_f16(a, b);
@@ -265,8 +215,6 @@ float16_t test_vaddh_f16(float16_t a, float16_t b) {
// COMMON-LABEL: test_vceqh_f16
// UNCONSTRAINED: [[TMP1:%.*]] = fcmp oeq half %a, %b
// CONSTRAINED: [[TMP1:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f16(half %a, half %b, metadata !"oeq", metadata !"fpexcept.strict")
-// CHECK-ASM: fcmp
-// CHECK-ASM: cset {{w[0-9]+}}, eq
// COMMONIR: [[TMP2:%.*]] = sext i1 [[TMP1]] to i16
// COMMONIR: ret i16 [[TMP2]]
uint16_t test_vceqh_f16(float16_t a, float16_t b) {
@@ -275,9 +223,7 @@ uint16_t test_vceqh_f16(float16_t a, float16_t b) {
// COMMON-LABEL: test_vcgeh_f16
// UNCONSTRAINED: [[TMP1:%.*]] = fcmp oge half %a, %b
-// CONSTRAINED: [[TMP1:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f16(half %a, half %b, metadata !"oge", metadata !"fpexcept.strict")
-// CHECK-ASM: fcmp
-// CHECK-ASM: cset {{w[0-9]+}}, ge
+// CONSTRAINED: [[TMP1:%.*]] = call i1 @llvm.experimental.constrained.fcmps.f16(half %a, half %b, metadata !"oge", metadata !"fpexcept.strict")
// COMMONIR: [[TMP2:%.*]] = sext i1 [[TMP1]] to i16
// COMMONIR: ret i16 [[TMP2]]
uint16_t test_vcgeh_f16(float16_t a, float16_t b) {
@@ -286,9 +232,7 @@ uint16_t test_vcgeh_f16(float16_t a, float16_t b) {
// COMMON-LABEL: test_vcgth_f16
// UNCONSTRAINED: [[TMP1:%.*]] = fcmp ogt half %a, %b
-// CONSTRAINED: [[TMP1:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f16(half %a, half %b, metadata !"ogt", metadata !"fpexcept.strict")
-// CHECK-ASM: fcmp
-// CHECK-ASM: cset {{w[0-9]+}}, gt
+// CONSTRAINED: [[TMP1:%.*]] = call i1 @llvm.experimental.constrained.fcmps.f16(half %a, half %b, metadata !"ogt", metadata !"fpexcept.strict")
// COMMONIR: [[TMP2:%.*]] = sext i1 [[TMP1]] to i16
// COMMONIR: ret i16 [[TMP2]]
uint16_t test_vcgth_f16(float16_t a, float16_t b) {
@@ -297,9 +241,7 @@ uint16_t test_vcgth_f16(float16_t a, float16_t b) {
// COMMON-LABEL: test_vcleh_f16
// UNCONSTRAINED: [[TMP1:%.*]] = fcmp ole half %a, %b
-// CONSTRAINED: [[TMP1:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f16(half %a, half %b, metadata !"ole", metadata !"fpexcept.strict")
-// CHECK-ASM: fcmp
-// CHECK-ASM: cset {{w[0-9]+}}, ls
+// CONSTRAINED: [[TMP1:%.*]] = call i1 @llvm.experimental.constrained.fcmps.f16(half %a, half %b, metadata !"ole", metadata !"fpexcept.strict")
// COMMONIR: [[TMP2:%.*]] = sext i1 [[TMP1]] to i16
// COMMONIR: ret i16 [[TMP2]]
uint16_t test_vcleh_f16(float16_t a, float16_t b) {
@@ -308,9 +250,7 @@ uint16_t test_vcleh_f16(float16_t a, float16_t b) {
// COMMON-LABEL: test_vclth_f16
// UNCONSTRAINED: [[TMP1:%.*]] = fcmp olt half %a, %b
-// CONSTRAINED: [[TMP1:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f16(half %a, half %b, metadata !"olt", metadata !"fpexcept.strict")
-// CHECK-ASM: fcmp
-// CHECK-ASM: cset {{w[0-9]+}}, mi
+// CONSTRAINED: [[TMP1:%.*]] = call i1 @llvm.experimental.constrained.fcmps.f16(half %a, half %b, metadata !"olt", metadata !"fpexcept.strict")
// COMMONIR: [[TMP2:%.*]] = sext i1 [[TMP1]] to i16
// COMMONIR: ret i16 [[TMP2]]
uint16_t test_vclth_f16(float16_t a, float16_t b) {
@@ -320,7 +260,6 @@ uint16_t test_vclth_f16(float16_t a, float16_t b) {
// COMMON-LABEL: test_vdivh_f16
// UNCONSTRAINED: [[DIV:%.*]] = fdiv half %a, %b
// CONSTRAINED: [[DIV:%.*]] = call half @llvm.experimental.constrained.fdiv.f16(half %a, half %b, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM: fdiv
// COMMONIR: ret half [[DIV]]
float16_t test_vdivh_f16(float16_t a, float16_t b) {
return vdivh_f16(a, b);
@@ -329,7 +268,6 @@ float16_t test_vdivh_f16(float16_t a, float16_t b) {
// COMMON-LABEL: test_vmulh_f16
// UNCONSTRAINED: [[MUL:%.*]] = fmul half %a, %b
// CONSTRAINED: [[MUL:%.*]] = call half @llvm.experimental.constrained.fmul.f16(half %a, half %b, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM: fmul
// COMMONIR: ret half [[MUL]]
float16_t test_vmulh_f16(float16_t a, float16_t b) {
return vmulh_f16(a, b);
@@ -338,7 +276,6 @@ float16_t test_vmulh_f16(float16_t a, float16_t b) {
// COMMON-LABEL: test_vsubh_f16
// UNCONSTRAINED: [[SUB:%.*]] = fsub half %a, %b
// CONSTRAINED: [[SUB:%.*]] = call half @llvm.experimental.constrained.fsub.f16(half %a, half %b, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM: fsub
// COMMONIR: ret half [[SUB]]
float16_t test_vsubh_f16(float16_t a, float16_t b) {
return vsubh_f16(a, b);
@@ -347,7 +284,6 @@ float16_t test_vsubh_f16(float16_t a, float16_t b) {
// COMMON-LABEL: test_vfmah_f16
// UNCONSTRAINED: [[FMA:%.*]] = call half @llvm.fma.f16(half %b, half %c, half %a)
// CONSTRAINED: [[FMA:%.*]] = call half @llvm.experimental.constrained.fma.f16(half %b, half %c, half %a, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM: fmadd
// COMMONIR: ret half [[FMA]]
float16_t test_vfmah_f16(float16_t a, float16_t b, float16_t c) {
return vfmah_f16(a, b, c);
@@ -358,7 +294,6 @@ float16_t test_vfmah_f16(float16_t a, float16_t b, float16_t c) {
// CONSTRAINED: [[SUB:%.*]] = call half @llvm.experimental.constrained.fsub.f16(half 0xH8000, half %b, metadata !"round.tonearest", metadata !"fpexcept.strict")
// UNCONSTRAINED: [[ADD:%.*]] = call half @llvm.fma.f16(half [[SUB]], half %c, half %a)
// CONSTRAINED: [[ADD:%.*]] = call half @llvm.experimental.constrained.fma.f16(half [[SUB]], half %c, half %a, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM: fmsub
// COMMONIR: ret half [[ADD]]
float16_t test_vfmsh_f16(float16_t a, float16_t b, float16_t c) {
return vfmsh_f16(a, b, c);
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