[PATCH] D123450: [clang-format] Parse Verilog if statements

[sstwcw via Phabricator via cfe-commits]

sstwcw marked an inline comment as done.
sstwcw added inline comments.


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Comment at: clang/lib/Format/FormatToken.h:374
+  /// Verilog we want to treat the backtick like a hash.
+  tok::TokenKind AliasToken = tok::unknown;
+
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HazardyKnusperkeks wrote:
> sstwcw wrote:
> > HazardyKnusperkeks wrote:
> > > Can't we do that with a type?
> > > 
> > > I'm not very happy about the alias, because you can still call `Tok.getKind()`.
> > The main problem I seek to solve with the alias thing is with `tok::hash`.  In Verilog they use a backtick instead of a hash.  At first I modified all places in the code to recognize the backtick.  MyDeveloperDay said "year really not nice.. its like we can never use tok::hash again!"  Using a type also requires modifying all instances of tok::hash if I get you right.  How do I please everyone?
> Then you must hide Tok in the private part, so that no one can ever access `Tok.getKind()` accidentally.
In the new version the type of `Tok` itself gets changed instead.  So an alias is not needed.


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  https://reviews.llvm.org/D123450/new/

https://reviews.llvm.org/D123450