[PATCH] D123450: [clang-format] Parse Verilog if statements

sstwcw via Phabricator via cfe-commits cfe-commits at lists.llvm.org
Mon Apr 11 15:20:13 PDT 2022


sstwcw marked 3 inline comments as done.
sstwcw added inline comments.


================
Comment at: clang/lib/Format/FormatToken.h:374
+  /// Verilog we want to treat the backtick like a hash.
+  tok::TokenKind AliasToken = tok::unknown;
+
----------------
HazardyKnusperkeks wrote:
> Can't we do that with a type?
> 
> I'm not very happy about the alias, because you can still call `Tok.getKind()`.
The main problem I seek to solve with the alias thing is with `tok::hash`.  In Verilog they use a backtick instead of a hash.  At first I modified all places in the code to recognize the backtick.  MyDeveloperDay said "year really not nice.. its like we can never use tok::hash again!"  Using a type also requires modifying all instances of tok::hash if I get you right.  How do I please everyone?


================
Comment at: clang/lib/Format/FormatToken.h:1157
+    VerilogExtraKeywords = std::unordered_set<IdentifierInfo *>(
+        {kw_always,       kw_always_comb,  kw_always_ff,    kw_always_latch,
+         kw_assert,       kw_assign,       kw_assume,       kw_automatic,
----------------
HazardyKnusperkeks wrote:
> sstwcw wrote:
> > Does anyone know why this part gets aligned unlike the two lists above?
> Have you reformatted the other lines with the same config and revision?
> If yes, my guess would be the missing comment.
It was the missing comment.


================
Comment at: clang/lib/Format/FormatToken.h:1533
+    switch (Tok.Tok.getKind()) {
+    case tok::kw_case:
+    case tok::kw_class:
----------------
HazardyKnusperkeks wrote:
> So you have a blacklist what is not a keyword? Seems a bit non future proof, new C++ keywords would have to be added here.
This is a whitelist of what is a keyword.


Repository:
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CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D123450/new/

https://reviews.llvm.org/D123450



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