[clang] 95ea3e8 - [OpenMP] Regenerate the check lines for 2 tests
Johannes Doerfert via cfe-commits
cfe-commits at lists.llvm.org
Tue Mar 29 08:00:20 PDT 2022
Author: Johannes Doerfert
Date: 2022-03-29T10:00:03-05:00
New Revision: 95ea3e86bb72d3e4988af1affe3bc93138978db5
URL: https://github.com/llvm/llvm-project/commit/95ea3e86bb72d3e4988af1affe3bc93138978db5
DIFF: https://github.com/llvm/llvm-project/commit/95ea3e86bb72d3e4988af1affe3bc93138978db5.diff
LOG: [OpenMP] Regenerate the check lines for 2 tests
Somehow those check lines were mostly untested prefixes and the ones we
were looking for have been removed. Simple cleanup.
Added:
Modified:
clang/test/OpenMP/nvptx_target_teams_distribute_parallel_for_codegen.cpp
clang/test/OpenMP/nvptx_target_teams_distribute_parallel_for_simd_codegen.cpp
Removed:
################################################################################
diff --git a/clang/test/OpenMP/nvptx_target_teams_distribute_parallel_for_codegen.cpp b/clang/test/OpenMP/nvptx_target_teams_distribute_parallel_for_codegen.cpp
index c3fa77fa714f8..5d3308016a8d2 100644
--- a/clang/test/OpenMP/nvptx_target_teams_distribute_parallel_for_codegen.cpp
+++ b/clang/test/OpenMP/nvptx_target_teams_distribute_parallel_for_codegen.cpp
@@ -71,18402 +71,6 @@ int bar(int n){
}
#endif
-// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l43
-// CHECK5-SAME: (i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0:[0-9]+]] {
-// CHECK5-NEXT: entry:
-// CHECK5-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK5-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[L_CASTED:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK5-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK5-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK5-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
-// CHECK5-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK5-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK5-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK5-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK5: .execute:
-// CHECK5-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]])
-// CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK5-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
-// CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[L_ADDR]], align 4
-// CHECK5-NEXT: store i32 [[TMP4]], i32* [[L_CASTED]], align 4
-// CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[L_CASTED]], align 4
-// CHECK5-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK5-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP3]], [1000 x i32]* [[TMP0]], i32 [[TMP5]]) #[[ATTR3:[0-9]+]]
-// CHECK5-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK5: .omp.deinit:
-// CHECK5-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK5-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK5: .exit:
-// CHECK5-NEXT: ret void
-// CHECK5-LABEL: define {{[^@]+}}@__omp_outlined__
-// CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0]] {
-// CHECK5-NEXT: entry:
-// CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK5-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK5-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[I4:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[L_CASTED:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [5 x i8*], align 4
-// CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK5-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK5-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK5-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
-// CHECK5-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK5-NEXT: [[TMP1:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared", align 2
-// CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* @"_openmp_static_kernel$size", align 4
-// CHECK5-NEXT: call void @__kmpc_get_team_static_memory(i16 1, i8* addrspacecast (i8 addrspace(3)* getelementptr inbounds (%"union._shared_openmp_static_memory_type_$_", %"union._shared_openmp_static_memory_type_$_" addrspace(3)* @"_openmp_shared_static_glob_rd_$_", i32 0, i32 0, i32 0) to i8*), i32 [[TMP2]], i16 [[TMP1]], i8** addrspacecast (i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr" to i8**))
-// CHECK5-NEXT: [[TMP3:%.*]] = load i8*, i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr", align 4
-// CHECK5-NEXT: [[TMP4:%.*]] = getelementptr inbounds i8, i8* [[TMP3]], i32 0
-// CHECK5-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to %struct._globalized_locals_ty*
-// CHECK5-NEXT: [[L1:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY:%.*]], %struct._globalized_locals_ty* [[TMP5]], i32 0, i32 0
-// CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK5-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0
-// CHECK5-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK5-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK5-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK5-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK5-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]]
-// CHECK5-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK5: omp.precond.then:
-// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK5-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK5-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
-// CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 128)
-// CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK5-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]]
-// CHECK5-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK5: cond.true:
-// CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK5-NEXT: br label [[COND_END:%.*]]
-// CHECK5: cond.false:
-// CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: br label [[COND_END]]
-// CHECK5: cond.end:
-// CHECK5-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ]
-// CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK5-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK5: omp.inner.for.cond:
-// CHECK5-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], 1
-// CHECK5-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP17]], [[ADD]]
-// CHECK5-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK5: omp.inner.for.body:
-// CHECK5-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK5-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: [[TMP21:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK5-NEXT: store i32 [[TMP21]], i32* [[N_CASTED]], align 4
-// CHECK5-NEXT: [[TMP22:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK5-NEXT: [[TMP23:%.*]] = load i32, i32* [[L_ADDR]], align 4
-// CHECK5-NEXT: store i32 [[TMP23]], i32* [[L_CASTED]], align 4
-// CHECK5-NEXT: [[TMP24:%.*]] = load i32, i32* [[L_CASTED]], align 4
-// CHECK5-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK5-NEXT: [[TMP26:%.*]] = inttoptr i32 [[TMP19]] to i8*
-// CHECK5-NEXT: store i8* [[TMP26]], i8** [[TMP25]], align 4
-// CHECK5-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK5-NEXT: [[TMP28:%.*]] = inttoptr i32 [[TMP20]] to i8*
-// CHECK5-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 4
-// CHECK5-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK5-NEXT: [[TMP30:%.*]] = inttoptr i32 [[TMP22]] to i8*
-// CHECK5-NEXT: store i8* [[TMP30]], i8** [[TMP29]], align 4
-// CHECK5-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
-// CHECK5-NEXT: [[TMP32:%.*]] = bitcast [1000 x i32]* [[TMP0]] to i8*
-// CHECK5-NEXT: store i8* [[TMP32]], i8** [[TMP31]], align 4
-// CHECK5-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 4
-// CHECK5-NEXT: [[TMP34:%.*]] = inttoptr i32 [[TMP24]] to i8*
-// CHECK5-NEXT: store i8* [[TMP34]], i8** [[TMP33]], align 4
-// CHECK5-NEXT: [[TMP35:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK5-NEXT: [[TMP36:%.*]] = load i32, i32* [[TMP35]], align 4
-// CHECK5-NEXT: [[TMP37:%.*]] = bitcast [5 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK5-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP36]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i32]*, i32)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP37]], i32 5)
-// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK5: omp.inner.for.inc:
-// CHECK5-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK5-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP38]], [[TMP39]]
-// CHECK5-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK5-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK5-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP40]], [[TMP41]]
-// CHECK5-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK5-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK5-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP42]], [[TMP43]]
-// CHECK5-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK5-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP44]], [[TMP45]]
-// CHECK5-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
-// CHECK5: cond.true11:
-// CHECK5-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK5-NEXT: br label [[COND_END13:%.*]]
-// CHECK5: cond.false12:
-// CHECK5-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: br label [[COND_END13]]
-// CHECK5: cond.end13:
-// CHECK5-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP46]], [[COND_TRUE11]] ], [ [[TMP47]], [[COND_FALSE12]] ]
-// CHECK5-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK5-NEXT: store i32 [[TMP48]], i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK5: omp.inner.for.end:
-// CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK5: omp.loop.exit:
-// CHECK5-NEXT: [[TMP49:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK5-NEXT: [[TMP50:%.*]] = load i32, i32* [[TMP49]], align 4
-// CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP50]])
-// CHECK5-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK5-NEXT: [[TMP52:%.*]] = icmp ne i32 [[TMP51]], 0
-// CHECK5-NEXT: br i1 [[TMP52]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
-// CHECK5: .omp.lastprivate.then:
-// CHECK5-NEXT: [[TMP53:%.*]] = load i32, i32* [[L_ADDR]], align 4
-// CHECK5-NEXT: store i32 [[TMP53]], i32* [[L_ADDR]], align 4
-// CHECK5-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
-// CHECK5: .omp.lastprivate.done:
-// CHECK5-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK5: omp.precond.end:
-// CHECK5-NEXT: [[TMP54:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared", align 2
-// CHECK5-NEXT: call void @__kmpc_restore_team_static_memory(i16 1, i16 [[TMP54]])
-// CHECK5-NEXT: ret void
-// CHECK5-LABEL: define {{[^@]+}}@__omp_outlined__1
-// CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0]] {
-// CHECK5-NEXT: entry:
-// CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK5-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK5-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK5-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK5-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK5-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK5-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
-// CHECK5-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK5-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK5-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK5-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK5-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK5-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK5-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK5-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK5-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK5: omp.precond.then:
-// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK5-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
-// CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
-// CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
-// CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK5-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 32)
-// CHECK5-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
-// CHECK5: omp.dispatch.cond:
-// CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK5-NEXT: [[CMP4:%.*]] = icmp ugt i32 [[TMP9]], [[TMP10]]
-// CHECK5-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK5: cond.true:
-// CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK5-NEXT: br label [[COND_END:%.*]]
-// CHECK5: cond.false:
-// CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK5-NEXT: br label [[COND_END]]
-// CHECK5: cond.end:
-// CHECK5-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
-// CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
-// CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK5-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK5-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
-// CHECK5-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
-// CHECK5: omp.dispatch.body:
-// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK5: omp.inner.for.cond:
-// CHECK5-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK5-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
-// CHECK5-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK5: omp.inner.for.body:
-// CHECK5-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
-// CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK5-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
-// CHECK5-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4
-// CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 [[TMP19]]
-// CHECK5-NEXT: store i32 1, i32* [[ARRAYIDX]], align 4
-// CHECK5-NEXT: [[TMP20:%.*]] = load i32, i32* [[I3]], align 4
-// CHECK5-NEXT: store i32 [[TMP20]], i32* [[L_ADDR]], align 4
-// CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK5: omp.body.continue:
-// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK5: omp.inner.for.inc:
-// CHECK5-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP21]], 1
-// CHECK5-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK5: omp.inner.for.end:
-// CHECK5-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
-// CHECK5: omp.dispatch.inc:
-// CHECK5-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK5-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK5-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
-// CHECK5-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4
-// CHECK5-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK5-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK5-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
-// CHECK5-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4
-// CHECK5-NEXT: br label [[OMP_DISPATCH_COND]]
-// CHECK5: omp.dispatch.end:
-// CHECK5-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK5-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
-// CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP27]])
-// CHECK5-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK5-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
-// CHECK5-NEXT: br i1 [[TMP29]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
-// CHECK5: .omp.lastprivate.then:
-// CHECK5-NEXT: [[TMP30:%.*]] = load i32, i32* [[L_ADDR]], align 4
-// CHECK5-NEXT: store i32 [[TMP30]], i32* [[L_ADDR]], align 4
-// CHECK5-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
-// CHECK5: .omp.lastprivate.done:
-// CHECK5-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK5: omp.precond.end:
-// CHECK5-NEXT: ret void
-// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l49
-// CHECK5-SAME: (i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
-// CHECK5-NEXT: entry:
-// CHECK5-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
-// CHECK5-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK5-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK5-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK5-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK5-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK5-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK5-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK5: .execute:
-// CHECK5-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK5-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
-// CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK5-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK5-NEXT: call void @__omp_outlined__2(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP3]], [1000 x i16]* [[TMP0]]) #[[ATTR3]]
-// CHECK5-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK5: .omp.deinit:
-// CHECK5-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK5-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK5: .exit:
-// CHECK5-NEXT: ret void
-// CHECK5-LABEL: define {{[^@]+}}@__omp_outlined__2
-// CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
-// CHECK5-NEXT: entry:
-// CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK5-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
-// CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 4
-// CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK5-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK5-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK5-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK5-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK5-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK5-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK5-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK5-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK5-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK5-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK5-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK5: omp.precond.then:
-// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK5-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK5-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK5-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
-// CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK5-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
-// CHECK5-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK5: cond.true:
-// CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK5-NEXT: br label [[COND_END:%.*]]
-// CHECK5: cond.false:
-// CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: br label [[COND_END]]
-// CHECK5: cond.end:
-// CHECK5-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
-// CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK5-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK5: omp.inner.for.cond:
-// CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1
-// CHECK5-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]
-// CHECK5-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK5: omp.inner.for.body:
-// CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: [[TMP16:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK5-NEXT: store i32 [[TMP16]], i32* [[N_CASTED]], align 4
-// CHECK5-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK5-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK5-NEXT: [[TMP19:%.*]] = inttoptr i32 [[TMP14]] to i8*
-// CHECK5-NEXT: store i8* [[TMP19]], i8** [[TMP18]], align 4
-// CHECK5-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK5-NEXT: [[TMP21:%.*]] = inttoptr i32 [[TMP15]] to i8*
-// CHECK5-NEXT: store i8* [[TMP21]], i8** [[TMP20]], align 4
-// CHECK5-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK5-NEXT: [[TMP23:%.*]] = inttoptr i32 [[TMP17]] to i8*
-// CHECK5-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 4
-// CHECK5-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
-// CHECK5-NEXT: [[TMP25:%.*]] = bitcast [1000 x i16]* [[TMP0]] to i8*
-// CHECK5-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 4
-// CHECK5-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK5-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
-// CHECK5-NEXT: [[TMP28:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK5-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP27]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i16]*)* @__omp_outlined__3 to i8*), i8* null, i8** [[TMP28]], i32 4)
-// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK5: omp.inner.for.inc:
-// CHECK5-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK5-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP29]], [[TMP30]]
-// CHECK5-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK5-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK5-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP31]], [[TMP32]]
-// CHECK5-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK5-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK5-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP33]], [[TMP34]]
-// CHECK5-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK5-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP35]], [[TMP36]]
-// CHECK5-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]]
-// CHECK5: cond.true10:
-// CHECK5-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK5-NEXT: br label [[COND_END12:%.*]]
-// CHECK5: cond.false11:
-// CHECK5-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: br label [[COND_END12]]
-// CHECK5: cond.end12:
-// CHECK5-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP37]], [[COND_TRUE10]] ], [ [[TMP38]], [[COND_FALSE11]] ]
-// CHECK5-NEXT: store i32 [[COND13]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK5-NEXT: store i32 [[TMP39]], i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK5: omp.inner.for.end:
-// CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK5: omp.loop.exit:
-// CHECK5-NEXT: [[TMP40:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK5-NEXT: [[TMP41:%.*]] = load i32, i32* [[TMP40]], align 4
-// CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP41]])
-// CHECK5-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK5: omp.precond.end:
-// CHECK5-NEXT: ret void
-// CHECK5-LABEL: define {{[^@]+}}@__omp_outlined__3
-// CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
-// CHECK5-NEXT: entry:
-// CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
-// CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK5-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK5-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK5-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK5-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK5-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK5-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK5-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK5-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK5-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK5-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK5-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK5-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK5-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK5: omp.precond.then:
-// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK5-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
-// CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
-// CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
-// CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK5-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK5-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK5: omp.inner.for.cond:
-// CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK5-NEXT: [[CMP4:%.*]] = icmp ule i32 [[TMP10]], [[TMP11]]
-// CHECK5-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK5: omp.inner.for.body:
-// CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
-// CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK5-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
-// CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[I3]], align 4
-// CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i16], [1000 x i16]* [[TMP0]], i32 0, i32 [[TMP13]]
-// CHECK5-NEXT: [[TMP14:%.*]] = load i16, i16* [[ARRAYIDX]], align 2
-// CHECK5-NEXT: [[CONV:%.*]] = sext i16 [[TMP14]] to i32
-// CHECK5-NEXT: [[ADD5:%.*]] = add nsw i32 [[CONV]], 1
-// CHECK5-NEXT: [[CONV6:%.*]] = trunc i32 [[ADD5]] to i16
-// CHECK5-NEXT: store i16 [[CONV6]], i16* [[ARRAYIDX]], align 2
-// CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK5: omp.body.continue:
-// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK5: omp.inner.for.inc:
-// CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK5-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
-// CHECK5-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK5: omp.inner.for.end:
-// CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK5: omp.loop.exit:
-// CHECK5-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK5-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
-// CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]])
-// CHECK5-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK5: omp.precond.end:
-// CHECK5-NEXT: ret void
-// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l54
-// CHECK5-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
-// CHECK5-NEXT: entry:
-// CHECK5-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
-// CHECK5-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK5-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
-// CHECK5-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
-// CHECK5-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK5-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK5-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK5: .execute:
-// CHECK5-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK5-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK5-NEXT: call void @__omp_outlined__4(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x i32]* [[TMP0]]) #[[ATTR3]]
-// CHECK5-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK5: .omp.deinit:
-// CHECK5-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK5-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK5: .exit:
-// CHECK5-NEXT: ret void
-// CHECK5-LABEL: define {{[^@]+}}@__omp_outlined__4
-// CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
-// CHECK5-NEXT: entry:
-// CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK5-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
-// CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [3 x i8*], align 4
-// CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK5-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
-// CHECK5-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
-// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK5-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK5-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK5-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
-// CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
-// CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK5: cond.true:
-// CHECK5-NEXT: br label [[COND_END:%.*]]
-// CHECK5: cond.false:
-// CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: br label [[COND_END]]
-// CHECK5: cond.end:
-// CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
-// CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK5: omp.inner.for.cond:
-// CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP6]], 10
-// CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK5: omp.inner.for.body:
-// CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK5-NEXT: [[TMP10:%.*]] = inttoptr i32 [[TMP7]] to i8*
-// CHECK5-NEXT: store i8* [[TMP10]], i8** [[TMP9]], align 4
-// CHECK5-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK5-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP8]] to i8*
-// CHECK5-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 4
-// CHECK5-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK5-NEXT: [[TMP14:%.*]] = bitcast [10 x i32]* [[TMP0]] to i8*
-// CHECK5-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 4
-// CHECK5-NEXT: [[TMP15:%.*]] = bitcast [3 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK5-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @__omp_outlined__5 to i8*), i8* null, i8** [[TMP15]], i32 3)
-// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK5: omp.inner.for.inc:
-// CHECK5-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
-// CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK5-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK5-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
-// CHECK5-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK5-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
-// CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP22]], 9
-// CHECK5-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
-// CHECK5: cond.true5:
-// CHECK5-NEXT: br label [[COND_END7:%.*]]
-// CHECK5: cond.false6:
-// CHECK5-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: br label [[COND_END7]]
-// CHECK5: cond.end7:
-// CHECK5-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP23]], [[COND_FALSE6]] ]
-// CHECK5-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK5-NEXT: store i32 [[TMP24]], i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK5: omp.inner.for.end:
-// CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK5: omp.loop.exit:
-// CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
-// CHECK5-NEXT: ret void
-// CHECK5-LABEL: define {{[^@]+}}@__omp_outlined__5
-// CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
-// CHECK5-NEXT: entry:
-// CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
-// CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK5-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK5-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK5-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
-// CHECK5-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
-// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK5-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
-// CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK5-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
-// CHECK5-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
-// CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK5-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
-// CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK5: omp.inner.for.cond:
-// CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK5-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP6]], [[TMP7]]
-// CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK5: omp.inner.for.body:
-// CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
-// CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4
-// CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
-// CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]]
-// CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
-// CHECK5-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP10]], 1
-// CHECK5-NEXT: store i32 [[ADD1]], i32* [[ARRAYIDX]], align 4
-// CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK5: omp.body.continue:
-// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK5: omp.inner.for.inc:
-// CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK5-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
-// CHECK5-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK5: omp.inner.for.end:
-// CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK5: omp.loop.exit:
-// CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
-// CHECK5-NEXT: ret void
-// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l59
-// CHECK5-SAME: ([10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
-// CHECK5-NEXT: entry:
-// CHECK5-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK5-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[F_CASTED:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK5-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK5-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
-// CHECK5-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK5-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK5-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK5-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK5: .execute:
-// CHECK5-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[F_ADDR]], align 4
-// CHECK5-NEXT: store i32 [[TMP2]], i32* [[F_CASTED]], align 4
-// CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[F_CASTED]], align 4
-// CHECK5-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK5-NEXT: call void @__omp_outlined__6(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x [10 x i32]]* [[TMP0]], i32 [[TMP3]]) #[[ATTR3]]
-// CHECK5-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK5: .omp.deinit:
-// CHECK5-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK5-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK5: .exit:
-// CHECK5-NEXT: ret void
-// CHECK5-LABEL: define {{[^@]+}}@__omp_outlined__6
-// CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
-// CHECK5-NEXT: entry:
-// CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK5-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK5-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[K:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[J:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[F_CASTED:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 4
-// CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK5-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK5-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
-// CHECK5-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK5-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK5-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK5-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
-// CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
-// CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK5: cond.true:
-// CHECK5-NEXT: br label [[COND_END:%.*]]
-// CHECK5: cond.false:
-// CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: br label [[COND_END]]
-// CHECK5: cond.end:
-// CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
-// CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK5: omp.inner.for.cond:
-// CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP6]], 100
-// CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK5: omp.inner.for.body:
-// CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[F_ADDR]], align 4
-// CHECK5-NEXT: store i32 [[TMP9]], i32* [[F_CASTED]], align 4
-// CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[F_CASTED]], align 4
-// CHECK5-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK5-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP7]] to i8*
-// CHECK5-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 4
-// CHECK5-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK5-NEXT: [[TMP14:%.*]] = inttoptr i32 [[TMP8]] to i8*
-// CHECK5-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 4
-// CHECK5-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK5-NEXT: [[TMP16:%.*]] = bitcast [10 x [10 x i32]]* [[TMP0]] to i8*
-// CHECK5-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 4
-// CHECK5-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
-// CHECK5-NEXT: [[TMP18:%.*]] = inttoptr i32 [[TMP10]] to i8*
-// CHECK5-NEXT: store i8* [[TMP18]], i8** [[TMP17]], align 4
-// CHECK5-NEXT: [[TMP19:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK5-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, [10 x [10 x i32]]*, i32)* @__omp_outlined__7 to i8*), i8* null, i8** [[TMP19]], i32 4)
-// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK5: omp.inner.for.inc:
-// CHECK5-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
-// CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK5-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
-// CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK5-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK5-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
-// CHECK5-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP26]], 99
-// CHECK5-NEXT: br i1 [[CMP5]], label [[COND_TRUE6:%.*]], label [[COND_FALSE7:%.*]]
-// CHECK5: cond.true6:
-// CHECK5-NEXT: br label [[COND_END8:%.*]]
-// CHECK5: cond.false7:
-// CHECK5-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: br label [[COND_END8]]
-// CHECK5: cond.end8:
-// CHECK5-NEXT: [[COND9:%.*]] = phi i32 [ 99, [[COND_TRUE6]] ], [ [[TMP27]], [[COND_FALSE7]] ]
-// CHECK5-NEXT: store i32 [[COND9]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK5-NEXT: store i32 [[TMP28]], i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK5: omp.inner.for.end:
-// CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK5: omp.loop.exit:
-// CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
-// CHECK5-NEXT: ret void
-// CHECK5-LABEL: define {{[^@]+}}@__omp_outlined__7
-// CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
-// CHECK5-NEXT: entry:
-// CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK5-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[K:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[J:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK5-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK5-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK5-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK5-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
-// CHECK5-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
-// CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK5-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
-// CHECK5-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
-// CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK5-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
-// CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK5: omp.inner.for.cond:
-// CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK5-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP6]], [[TMP7]]
-// CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK5: omp.inner.for.body:
-// CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP8]], 10
-// CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
-// CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4
-// CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: [[DIV2:%.*]] = sdiv i32 [[TMP10]], 10
-// CHECK5-NEXT: [[MUL3:%.*]] = mul nsw i32 [[DIV2]], 10
-// CHECK5-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL3]]
-// CHECK5-NEXT: [[MUL4:%.*]] = mul nsw i32 [[SUB]], 1
-// CHECK5-NEXT: [[ADD5:%.*]] = add nsw i32 0, [[MUL4]]
-// CHECK5-NEXT: store i32 [[ADD5]], i32* [[J]], align 4
-// CHECK5-NEXT: store i32 10, i32* [[K]], align 4
-// CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
-// CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[J]], align 4
-// CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[F_ADDR]], align 4
-// CHECK5-NEXT: [[MUL6:%.*]] = mul nsw i32 [[TMP12]], [[TMP13]]
-// CHECK5-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP11]], [[MUL6]]
-// CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[K]], align 4
-// CHECK5-NEXT: [[ADD8:%.*]] = add nsw i32 [[ADD7]], [[TMP14]]
-// CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4
-// CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [10 x i32]], [10 x [10 x i32]]* [[TMP0]], i32 0, i32 [[TMP15]]
-// CHECK5-NEXT: [[TMP16:%.*]] = load i32, i32* [[J]], align 4
-// CHECK5-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP16]]
-// CHECK5-NEXT: store i32 [[ADD8]], i32* [[ARRAYIDX9]], align 4
-// CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK5: omp.body.continue:
-// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK5: omp.inner.for.inc:
-// CHECK5-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK5-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
-// CHECK5-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK5: omp.inner.for.end:
-// CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK5: omp.loop.exit:
-// CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
-// CHECK5-NEXT: ret void
-// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l67
-// CHECK5-SAME: (i32 [[N:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]]) #[[ATTR0]] {
-// CHECK5-NEXT: entry:
-// CHECK5-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK5-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK5-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK5-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK5-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK5-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK5-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK5-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK5: .execute:
-// CHECK5-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK5-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
-// CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK5-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK5-NEXT: call void @__omp_outlined__8(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP3]], [10 x [10 x i32]]* [[TMP0]]) #[[ATTR3]]
-// CHECK5-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK5: .omp.deinit:
-// CHECK5-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK5-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK5: .exit:
-// CHECK5-NEXT: ret void
-// CHECK5-LABEL: define {{[^@]+}}@__omp_outlined__8
-// CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]]) #[[ATTR0]] {
-// CHECK5-NEXT: entry:
-// CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK5-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
-// CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8
-// CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[J:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i64, align 8
-// CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i64, align 8
-// CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
-// CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[I9:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[J10:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 4
-// CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK5-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK5-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK5-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK5-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK5-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK5-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
-// CHECK5-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK5-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64
-// CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK5-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP4]], 0
-// CHECK5-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1
-// CHECK5-NEXT: [[CONV6:%.*]] = sext i32 [[DIV5]] to i64
-// CHECK5-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]]
-// CHECK5-NEXT: [[SUB7:%.*]] = sub nsw i64 [[MUL]], 1
-// CHECK5-NEXT: store i64 [[SUB7]], i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK5-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK5-NEXT: store i32 0, i32* [[J]], align 4
-// CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK5-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
-// CHECK5-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK5: land.lhs.true:
-// CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK5-NEXT: [[CMP8:%.*]] = icmp slt i32 0, [[TMP6]]
-// CHECK5-NEXT: br i1 [[CMP8]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
-// CHECK5: omp.precond.then:
-// CHECK5-NEXT: store i64 0, i64* [[DOTOMP_COMB_LB]], align 8
-// CHECK5-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK5-NEXT: store i64 [[TMP7]], i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK5-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8
-// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK5-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK5-NEXT: [[CONV11:%.*]] = zext i32 [[NVPTX_NUM_THREADS]] to i64
-// CHECK5-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
-// CHECK5-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_COMB_LB]], i64* [[DOTOMP_COMB_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 [[CONV11]])
-// CHECK5-NEXT: [[TMP10:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK5-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK5-NEXT: [[CMP12:%.*]] = icmp sgt i64 [[TMP10]], [[TMP11]]
-// CHECK5-NEXT: br i1 [[CMP12]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK5: cond.true:
-// CHECK5-NEXT: [[TMP12:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK5-NEXT: br label [[COND_END:%.*]]
-// CHECK5: cond.false:
-// CHECK5-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK5-NEXT: br label [[COND_END]]
-// CHECK5: cond.end:
-// CHECK5-NEXT: [[COND:%.*]] = phi i64 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
-// CHECK5-NEXT: store i64 [[COND]], i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK5-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
-// CHECK5-NEXT: store i64 [[TMP14]], i64* [[DOTOMP_IV]], align 8
-// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK5: omp.inner.for.cond:
-// CHECK5-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK5-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK5-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP16]], 1
-// CHECK5-NEXT: [[CMP13:%.*]] = icmp slt i64 [[TMP15]], [[ADD]]
-// CHECK5-NEXT: br i1 [[CMP13]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK5: omp.inner.for.body:
-// CHECK5-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
-// CHECK5-NEXT: [[TMP18:%.*]] = trunc i64 [[TMP17]] to i32
-// CHECK5-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK5-NEXT: [[TMP20:%.*]] = trunc i64 [[TMP19]] to i32
-// CHECK5-NEXT: [[TMP21:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK5-NEXT: store i32 [[TMP21]], i32* [[N_CASTED]], align 4
-// CHECK5-NEXT: [[TMP22:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK5-NEXT: [[TMP23:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK5-NEXT: [[TMP24:%.*]] = inttoptr i32 [[TMP18]] to i8*
-// CHECK5-NEXT: store i8* [[TMP24]], i8** [[TMP23]], align 4
-// CHECK5-NEXT: [[TMP25:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK5-NEXT: [[TMP26:%.*]] = inttoptr i32 [[TMP20]] to i8*
-// CHECK5-NEXT: store i8* [[TMP26]], i8** [[TMP25]], align 4
-// CHECK5-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK5-NEXT: [[TMP28:%.*]] = inttoptr i32 [[TMP22]] to i8*
-// CHECK5-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 4
-// CHECK5-NEXT: [[TMP29:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
-// CHECK5-NEXT: [[TMP30:%.*]] = bitcast [10 x [10 x i32]]* [[TMP0]] to i8*
-// CHECK5-NEXT: store i8* [[TMP30]], i8** [[TMP29]], align 4
-// CHECK5-NEXT: [[TMP31:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK5-NEXT: [[TMP32:%.*]] = load i32, i32* [[TMP31]], align 4
-// CHECK5-NEXT: [[TMP33:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK5-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP32]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [10 x [10 x i32]]*)* @__omp_outlined__9 to i8*), i8* null, i8** [[TMP33]], i32 4)
-// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK5: omp.inner.for.inc:
-// CHECK5-NEXT: [[TMP34:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK5-NEXT: [[TMP35:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8
-// CHECK5-NEXT: [[ADD14:%.*]] = add nsw i64 [[TMP34]], [[TMP35]]
-// CHECK5-NEXT: store i64 [[ADD14]], i64* [[DOTOMP_IV]], align 8
-// CHECK5-NEXT: [[TMP36:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
-// CHECK5-NEXT: [[TMP37:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8
-// CHECK5-NEXT: [[ADD15:%.*]] = add nsw i64 [[TMP36]], [[TMP37]]
-// CHECK5-NEXT: store i64 [[ADD15]], i64* [[DOTOMP_COMB_LB]], align 8
-// CHECK5-NEXT: [[TMP38:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK5-NEXT: [[TMP39:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8
-// CHECK5-NEXT: [[ADD16:%.*]] = add nsw i64 [[TMP38]], [[TMP39]]
-// CHECK5-NEXT: store i64 [[ADD16]], i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK5-NEXT: [[TMP40:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK5-NEXT: [[TMP41:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK5-NEXT: [[CMP17:%.*]] = icmp sgt i64 [[TMP40]], [[TMP41]]
-// CHECK5-NEXT: br i1 [[CMP17]], label [[COND_TRUE18:%.*]], label [[COND_FALSE19:%.*]]
-// CHECK5: cond.true18:
-// CHECK5-NEXT: [[TMP42:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK5-NEXT: br label [[COND_END20:%.*]]
-// CHECK5: cond.false19:
-// CHECK5-NEXT: [[TMP43:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK5-NEXT: br label [[COND_END20]]
-// CHECK5: cond.end20:
-// CHECK5-NEXT: [[COND21:%.*]] = phi i64 [ [[TMP42]], [[COND_TRUE18]] ], [ [[TMP43]], [[COND_FALSE19]] ]
-// CHECK5-NEXT: store i64 [[COND21]], i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK5-NEXT: [[TMP44:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
-// CHECK5-NEXT: store i64 [[TMP44]], i64* [[DOTOMP_IV]], align 8
-// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK5: omp.inner.for.end:
-// CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK5: omp.loop.exit:
-// CHECK5-NEXT: [[TMP45:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK5-NEXT: [[TMP46:%.*]] = load i32, i32* [[TMP45]], align 4
-// CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP46]])
-// CHECK5-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK5: omp.precond.end:
-// CHECK5-NEXT: ret void
-// CHECK5-LABEL: define {{[^@]+}}@__omp_outlined__9
-// CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]]) #[[ATTR0]] {
-// CHECK5-NEXT: entry:
-// CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
-// CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8
-// CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[J:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8
-// CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8
-// CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
-// CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[I11:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[J12:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK5-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK5-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK5-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK5-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK5-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK5-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK5-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK5-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
-// CHECK5-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK5-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64
-// CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK5-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP4]], 0
-// CHECK5-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1
-// CHECK5-NEXT: [[CONV6:%.*]] = sext i32 [[DIV5]] to i64
-// CHECK5-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]]
-// CHECK5-NEXT: [[SUB7:%.*]] = sub nsw i64 [[MUL]], 1
-// CHECK5-NEXT: store i64 [[SUB7]], i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK5-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK5-NEXT: store i32 0, i32* [[J]], align 4
-// CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK5-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
-// CHECK5-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK5: land.lhs.true:
-// CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK5-NEXT: [[CMP8:%.*]] = icmp slt i32 0, [[TMP6]]
-// CHECK5-NEXT: br i1 [[CMP8]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
-// CHECK5: omp.precond.then:
-// CHECK5-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8
-// CHECK5-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK5-NEXT: store i64 [[TMP7]], i64* [[DOTOMP_UB]], align 8
-// CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK5-NEXT: [[CONV9:%.*]] = zext i32 [[TMP8]] to i64
-// CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK5-NEXT: [[CONV10:%.*]] = zext i32 [[TMP9]] to i64
-// CHECK5-NEXT: store i64 [[CONV9]], i64* [[DOTOMP_LB]], align 8
-// CHECK5-NEXT: store i64 [[CONV10]], i64* [[DOTOMP_UB]], align 8
-// CHECK5-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8
-// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK5-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
-// CHECK5-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 33, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_LB]], i64* [[DOTOMP_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1)
-// CHECK5-NEXT: [[TMP12:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8
-// CHECK5-NEXT: store i64 [[TMP12]], i64* [[DOTOMP_IV]], align 8
-// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK5: omp.inner.for.cond:
-// CHECK5-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK5-NEXT: [[CONV13:%.*]] = zext i32 [[TMP14]] to i64
-// CHECK5-NEXT: [[CMP14:%.*]] = icmp sle i64 [[TMP13]], [[CONV13]]
-// CHECK5-NEXT: br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK5: omp.inner.for.body:
-// CHECK5-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK5-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK5-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP16]], 0
-// CHECK5-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1
-// CHECK5-NEXT: [[MUL17:%.*]] = mul nsw i32 1, [[DIV16]]
-// CHECK5-NEXT: [[CONV18:%.*]] = sext i32 [[MUL17]] to i64
-// CHECK5-NEXT: [[DIV19:%.*]] = sdiv i64 [[TMP15]], [[CONV18]]
-// CHECK5-NEXT: [[MUL20:%.*]] = mul nsw i64 [[DIV19]], 1
-// CHECK5-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL20]]
-// CHECK5-NEXT: [[CONV21:%.*]] = trunc i64 [[ADD]] to i32
-// CHECK5-NEXT: store i32 [[CONV21]], i32* [[I11]], align 4
-// CHECK5-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK5-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK5-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK5-NEXT: [[SUB22:%.*]] = sub nsw i32 [[TMP19]], 0
-// CHECK5-NEXT: [[DIV23:%.*]] = sdiv i32 [[SUB22]], 1
-// CHECK5-NEXT: [[MUL24:%.*]] = mul nsw i32 1, [[DIV23]]
-// CHECK5-NEXT: [[CONV25:%.*]] = sext i32 [[MUL24]] to i64
-// CHECK5-NEXT: [[DIV26:%.*]] = sdiv i64 [[TMP18]], [[CONV25]]
-// CHECK5-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK5-NEXT: [[SUB27:%.*]] = sub nsw i32 [[TMP20]], 0
-// CHECK5-NEXT: [[DIV28:%.*]] = sdiv i32 [[SUB27]], 1
-// CHECK5-NEXT: [[MUL29:%.*]] = mul nsw i32 1, [[DIV28]]
-// CHECK5-NEXT: [[CONV30:%.*]] = sext i32 [[MUL29]] to i64
-// CHECK5-NEXT: [[MUL31:%.*]] = mul nsw i64 [[DIV26]], [[CONV30]]
-// CHECK5-NEXT: [[SUB32:%.*]] = sub nsw i64 [[TMP17]], [[MUL31]]
-// CHECK5-NEXT: [[MUL33:%.*]] = mul nsw i64 [[SUB32]], 1
-// CHECK5-NEXT: [[ADD34:%.*]] = add nsw i64 0, [[MUL33]]
-// CHECK5-NEXT: [[CONV35:%.*]] = trunc i64 [[ADD34]] to i32
-// CHECK5-NEXT: store i32 [[CONV35]], i32* [[J12]], align 4
-// CHECK5-NEXT: [[TMP21:%.*]] = load i32, i32* [[I11]], align 4
-// CHECK5-NEXT: [[TMP22:%.*]] = load i32, i32* [[J12]], align 4
-// CHECK5-NEXT: [[ADD36:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
-// CHECK5-NEXT: [[TMP23:%.*]] = load i32, i32* [[I11]], align 4
-// CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [10 x i32]], [10 x [10 x i32]]* [[TMP0]], i32 0, i32 [[TMP23]]
-// CHECK5-NEXT: [[TMP24:%.*]] = load i32, i32* [[J12]], align 4
-// CHECK5-NEXT: [[ARRAYIDX37:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP24]]
-// CHECK5-NEXT: store i32 [[ADD36]], i32* [[ARRAYIDX37]], align 4
-// CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK5: omp.body.continue:
-// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK5: omp.inner.for.inc:
-// CHECK5-NEXT: [[TMP25:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK5-NEXT: [[TMP26:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8
-// CHECK5-NEXT: [[ADD38:%.*]] = add nsw i64 [[TMP25]], [[TMP26]]
-// CHECK5-NEXT: store i64 [[ADD38]], i64* [[DOTOMP_IV]], align 8
-// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK5: omp.inner.for.end:
-// CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK5: omp.loop.exit:
-// CHECK5-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK5-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4
-// CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP28]])
-// CHECK5-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK5: omp.precond.end:
-// CHECK5-NEXT: ret void
-// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l74
-// CHECK5-SAME: (i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* [[V:%.*]]) #[[ATTR0]] {
-// CHECK5-NEXT: entry:
-// CHECK5-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK5-NEXT: [[V_ADDR:%.*]] = alloca i32*, align 4
-// CHECK5-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK5-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK5-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK5-NEXT: store i32* [[V]], i32** [[V_ADDR]], align 4
-// CHECK5-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK5-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK5-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK5-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK5: .execute:
-// CHECK5-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK5-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
-// CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK5-NEXT: [[TMP4:%.*]] = load i32*, i32** [[V_ADDR]], align 4
-// CHECK5-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK5-NEXT: call void @__omp_outlined__10(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP3]], [1000 x i32]* [[TMP0]], i32* [[TMP4]]) #[[ATTR3]]
-// CHECK5-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK5: .omp.deinit:
-// CHECK5-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK5-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK5: .exit:
-// CHECK5-NEXT: ret void
-// CHECK5-LABEL: define {{[^@]+}}@__omp_outlined__10
-// CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* [[V:%.*]]) #[[ATTR0]] {
-// CHECK5-NEXT: entry:
-// CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK5-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK5-NEXT: [[V_ADDR:%.*]] = alloca i32*, align 4
-// CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [5 x i8*], align 4
-// CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK5-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK5-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK5-NEXT: store i32* [[V]], i32** [[V_ADDR]], align 4
-// CHECK5-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK5-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK5-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK5-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK5-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK5-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK5-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK5-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK5-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK5: omp.precond.then:
-// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK5-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK5-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK5-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
-// CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK5-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
-// CHECK5-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK5: cond.true:
-// CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK5-NEXT: br label [[COND_END:%.*]]
-// CHECK5: cond.false:
-// CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: br label [[COND_END]]
-// CHECK5: cond.end:
-// CHECK5-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
-// CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK5-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK5: omp.inner.for.cond:
-// CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1
-// CHECK5-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]
-// CHECK5-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK5: omp.inner.for.body:
-// CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: [[TMP16:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK5-NEXT: store i32 [[TMP16]], i32* [[N_CASTED]], align 4
-// CHECK5-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK5-NEXT: [[TMP18:%.*]] = load i32*, i32** [[V_ADDR]], align 4
-// CHECK5-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK5-NEXT: [[TMP20:%.*]] = inttoptr i32 [[TMP14]] to i8*
-// CHECK5-NEXT: store i8* [[TMP20]], i8** [[TMP19]], align 4
-// CHECK5-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK5-NEXT: [[TMP22:%.*]] = inttoptr i32 [[TMP15]] to i8*
-// CHECK5-NEXT: store i8* [[TMP22]], i8** [[TMP21]], align 4
-// CHECK5-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK5-NEXT: [[TMP24:%.*]] = inttoptr i32 [[TMP17]] to i8*
-// CHECK5-NEXT: store i8* [[TMP24]], i8** [[TMP23]], align 4
-// CHECK5-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
-// CHECK5-NEXT: [[TMP26:%.*]] = bitcast [1000 x i32]* [[TMP0]] to i8*
-// CHECK5-NEXT: store i8* [[TMP26]], i8** [[TMP25]], align 4
-// CHECK5-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 4
-// CHECK5-NEXT: [[TMP28:%.*]] = bitcast i32* [[TMP18]] to i8*
-// CHECK5-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 4
-// CHECK5-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK5-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4
-// CHECK5-NEXT: [[TMP31:%.*]] = bitcast [5 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK5-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP30]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i32]*, i32*)* @__omp_outlined__11 to i8*), i8* null, i8** [[TMP31]], i32 5)
-// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK5: omp.inner.for.inc:
-// CHECK5-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK5-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP32]], [[TMP33]]
-// CHECK5-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK5-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK5-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP34]], [[TMP35]]
-// CHECK5-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK5-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK5-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP36]], [[TMP37]]
-// CHECK5-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK5-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP38]], [[TMP39]]
-// CHECK5-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]]
-// CHECK5: cond.true10:
-// CHECK5-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK5-NEXT: br label [[COND_END12:%.*]]
-// CHECK5: cond.false11:
-// CHECK5-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: br label [[COND_END12]]
-// CHECK5: cond.end12:
-// CHECK5-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP40]], [[COND_TRUE10]] ], [ [[TMP41]], [[COND_FALSE11]] ]
-// CHECK5-NEXT: store i32 [[COND13]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK5-NEXT: store i32 [[TMP42]], i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK5: omp.inner.for.end:
-// CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK5: omp.loop.exit:
-// CHECK5-NEXT: [[TMP43:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK5-NEXT: [[TMP44:%.*]] = load i32, i32* [[TMP43]], align 4
-// CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP44]])
-// CHECK5-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK5: omp.precond.end:
-// CHECK5-NEXT: ret void
-// CHECK5-LABEL: define {{[^@]+}}@__omp_outlined__11
-// CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* [[V:%.*]]) #[[ATTR0]] {
-// CHECK5-NEXT: entry:
-// CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK5-NEXT: [[V_ADDR:%.*]] = alloca i32*, align 4
-// CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK5-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK5-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK5-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK5-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK5-NEXT: store i32* [[V]], i32** [[V_ADDR]], align 4
-// CHECK5-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK5-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK5-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK5-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK5-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK5-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK5-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK5-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK5-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK5: omp.precond.then:
-// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK5-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
-// CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
-// CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
-// CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK5-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK5-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK5: omp.inner.for.cond:
-// CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK5-NEXT: [[CMP4:%.*]] = icmp ule i32 [[TMP10]], [[TMP11]]
-// CHECK5-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK5: omp.inner.for.body:
-// CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
-// CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK5-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
-// CHECK5-NEXT: [[TMP13:%.*]] = load i32*, i32** [[V_ADDR]], align 4
-// CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[I3]], align 4
-// CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP13]], i32 [[TMP14]]
-// CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
-// CHECK5-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4
-// CHECK5-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 [[TMP16]]
-// CHECK5-NEXT: store i32 [[TMP15]], i32* [[ARRAYIDX5]], align 4
-// CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK5: omp.body.continue:
-// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK5: omp.inner.for.inc:
-// CHECK5-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK5-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
-// CHECK5-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK5: omp.inner.for.end:
-// CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK5: omp.loop.exit:
-// CHECK5-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK5-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4
-// CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]])
-// CHECK5-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK5: omp.precond.end:
-// CHECK5-NEXT: ret void
-// CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l43
-// CHECK6-SAME: (i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0:[0-9]+]] {
-// CHECK6-NEXT: entry:
-// CHECK6-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK6-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[L_CASTED:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK6-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK6-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK6-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
-// CHECK6-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK6-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK6-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK6-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK6: .execute:
-// CHECK6-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]])
-// CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK6-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
-// CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[L_ADDR]], align 4
-// CHECK6-NEXT: store i32 [[TMP4]], i32* [[L_CASTED]], align 4
-// CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[L_CASTED]], align 4
-// CHECK6-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK6-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP3]], [1000 x i32]* [[TMP0]], i32 [[TMP5]]) #[[ATTR3:[0-9]+]]
-// CHECK6-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK6: .omp.deinit:
-// CHECK6-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK6-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK6: .exit:
-// CHECK6-NEXT: ret void
-// CHECK6-LABEL: define {{[^@]+}}@__omp_outlined__
-// CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0]] {
-// CHECK6-NEXT: entry:
-// CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK6-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK6-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[I4:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[L_CASTED:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [5 x i8*], align 4
-// CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK6-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK6-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK6-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
-// CHECK6-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK6-NEXT: [[TMP1:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared", align 2
-// CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* @"_openmp_static_kernel$size", align 4
-// CHECK6-NEXT: call void @__kmpc_get_team_static_memory(i16 1, i8* addrspacecast (i8 addrspace(3)* getelementptr inbounds (%"union._shared_openmp_static_memory_type_$_", %"union._shared_openmp_static_memory_type_$_" addrspace(3)* @"_openmp_shared_static_glob_rd_$_", i32 0, i32 0, i32 0) to i8*), i32 [[TMP2]], i16 [[TMP1]], i8** addrspacecast (i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr" to i8**))
-// CHECK6-NEXT: [[TMP3:%.*]] = load i8*, i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr", align 4
-// CHECK6-NEXT: [[TMP4:%.*]] = getelementptr inbounds i8, i8* [[TMP3]], i32 0
-// CHECK6-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to %struct._globalized_locals_ty*
-// CHECK6-NEXT: [[L1:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY:%.*]], %struct._globalized_locals_ty* [[TMP5]], i32 0, i32 0
-// CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK6-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK6-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0
-// CHECK6-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK6-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK6-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK6-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK6-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]]
-// CHECK6-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK6: omp.precond.then:
-// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK6-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK6-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
-// CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 128)
-// CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK6-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]]
-// CHECK6-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK6: cond.true:
-// CHECK6-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK6-NEXT: br label [[COND_END:%.*]]
-// CHECK6: cond.false:
-// CHECK6-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: br label [[COND_END]]
-// CHECK6: cond.end:
-// CHECK6-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ]
-// CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK6-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK6: omp.inner.for.cond:
-// CHECK6-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], 1
-// CHECK6-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP17]], [[ADD]]
-// CHECK6-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK6: omp.inner.for.body:
-// CHECK6-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK6-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: [[TMP21:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK6-NEXT: store i32 [[TMP21]], i32* [[N_CASTED]], align 4
-// CHECK6-NEXT: [[TMP22:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK6-NEXT: [[TMP23:%.*]] = load i32, i32* [[L_ADDR]], align 4
-// CHECK6-NEXT: store i32 [[TMP23]], i32* [[L_CASTED]], align 4
-// CHECK6-NEXT: [[TMP24:%.*]] = load i32, i32* [[L_CASTED]], align 4
-// CHECK6-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK6-NEXT: [[TMP26:%.*]] = inttoptr i32 [[TMP19]] to i8*
-// CHECK6-NEXT: store i8* [[TMP26]], i8** [[TMP25]], align 4
-// CHECK6-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK6-NEXT: [[TMP28:%.*]] = inttoptr i32 [[TMP20]] to i8*
-// CHECK6-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 4
-// CHECK6-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK6-NEXT: [[TMP30:%.*]] = inttoptr i32 [[TMP22]] to i8*
-// CHECK6-NEXT: store i8* [[TMP30]], i8** [[TMP29]], align 4
-// CHECK6-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
-// CHECK6-NEXT: [[TMP32:%.*]] = bitcast [1000 x i32]* [[TMP0]] to i8*
-// CHECK6-NEXT: store i8* [[TMP32]], i8** [[TMP31]], align 4
-// CHECK6-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 4
-// CHECK6-NEXT: [[TMP34:%.*]] = inttoptr i32 [[TMP24]] to i8*
-// CHECK6-NEXT: store i8* [[TMP34]], i8** [[TMP33]], align 4
-// CHECK6-NEXT: [[TMP35:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK6-NEXT: [[TMP36:%.*]] = load i32, i32* [[TMP35]], align 4
-// CHECK6-NEXT: [[TMP37:%.*]] = bitcast [5 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK6-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP36]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i32]*, i32)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP37]], i32 5)
-// CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK6: omp.inner.for.inc:
-// CHECK6-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK6-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP38]], [[TMP39]]
-// CHECK6-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK6-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK6-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP40]], [[TMP41]]
-// CHECK6-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK6-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK6-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP42]], [[TMP43]]
-// CHECK6-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK6-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP44]], [[TMP45]]
-// CHECK6-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
-// CHECK6: cond.true11:
-// CHECK6-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK6-NEXT: br label [[COND_END13:%.*]]
-// CHECK6: cond.false12:
-// CHECK6-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: br label [[COND_END13]]
-// CHECK6: cond.end13:
-// CHECK6-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP46]], [[COND_TRUE11]] ], [ [[TMP47]], [[COND_FALSE12]] ]
-// CHECK6-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK6-NEXT: store i32 [[TMP48]], i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK6: omp.inner.for.end:
-// CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK6: omp.loop.exit:
-// CHECK6-NEXT: [[TMP49:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK6-NEXT: [[TMP50:%.*]] = load i32, i32* [[TMP49]], align 4
-// CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP50]])
-// CHECK6-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK6-NEXT: [[TMP52:%.*]] = icmp ne i32 [[TMP51]], 0
-// CHECK6-NEXT: br i1 [[TMP52]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
-// CHECK6: .omp.lastprivate.then:
-// CHECK6-NEXT: [[TMP53:%.*]] = load i32, i32* [[L_ADDR]], align 4
-// CHECK6-NEXT: store i32 [[TMP53]], i32* [[L_ADDR]], align 4
-// CHECK6-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
-// CHECK6: .omp.lastprivate.done:
-// CHECK6-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK6: omp.precond.end:
-// CHECK6-NEXT: [[TMP54:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared", align 2
-// CHECK6-NEXT: call void @__kmpc_restore_team_static_memory(i16 1, i16 [[TMP54]])
-// CHECK6-NEXT: ret void
-// CHECK6-LABEL: define {{[^@]+}}@__omp_outlined__1
-// CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0]] {
-// CHECK6-NEXT: entry:
-// CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK6-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK6-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK6-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK6-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK6-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK6-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK6-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
-// CHECK6-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK6-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK6-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK6-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK6-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK6-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK6-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK6-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK6-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK6: omp.precond.then:
-// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK6-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
-// CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK6-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
-// CHECK6-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
-// CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK6-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 32)
-// CHECK6-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
-// CHECK6: omp.dispatch.cond:
-// CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK6-NEXT: [[CMP4:%.*]] = icmp ugt i32 [[TMP9]], [[TMP10]]
-// CHECK6-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK6: cond.true:
-// CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK6-NEXT: br label [[COND_END:%.*]]
-// CHECK6: cond.false:
-// CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK6-NEXT: br label [[COND_END]]
-// CHECK6: cond.end:
-// CHECK6-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
-// CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
-// CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK6-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK6-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
-// CHECK6-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
-// CHECK6: omp.dispatch.body:
-// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK6: omp.inner.for.cond:
-// CHECK6-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK6-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
-// CHECK6-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK6: omp.inner.for.body:
-// CHECK6-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
-// CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK6-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
-// CHECK6-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4
-// CHECK6-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 [[TMP19]]
-// CHECK6-NEXT: store i32 1, i32* [[ARRAYIDX]], align 4
-// CHECK6-NEXT: [[TMP20:%.*]] = load i32, i32* [[I3]], align 4
-// CHECK6-NEXT: store i32 [[TMP20]], i32* [[L_ADDR]], align 4
-// CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK6: omp.body.continue:
-// CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK6: omp.inner.for.inc:
-// CHECK6-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP21]], 1
-// CHECK6-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK6: omp.inner.for.end:
-// CHECK6-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
-// CHECK6: omp.dispatch.inc:
-// CHECK6-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK6-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK6-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
-// CHECK6-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4
-// CHECK6-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK6-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK6-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
-// CHECK6-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4
-// CHECK6-NEXT: br label [[OMP_DISPATCH_COND]]
-// CHECK6: omp.dispatch.end:
-// CHECK6-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK6-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
-// CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP27]])
-// CHECK6-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK6-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
-// CHECK6-NEXT: br i1 [[TMP29]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
-// CHECK6: .omp.lastprivate.then:
-// CHECK6-NEXT: [[TMP30:%.*]] = load i32, i32* [[L_ADDR]], align 4
-// CHECK6-NEXT: store i32 [[TMP30]], i32* [[L_ADDR]], align 4
-// CHECK6-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
-// CHECK6: .omp.lastprivate.done:
-// CHECK6-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK6: omp.precond.end:
-// CHECK6-NEXT: ret void
-// CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l49
-// CHECK6-SAME: (i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
-// CHECK6-NEXT: entry:
-// CHECK6-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
-// CHECK6-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK6-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK6-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK6-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK6-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK6-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK6-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK6: .execute:
-// CHECK6-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK6-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
-// CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK6-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK6-NEXT: call void @__omp_outlined__2(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP3]], [1000 x i16]* [[TMP0]]) #[[ATTR3]]
-// CHECK6-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK6: .omp.deinit:
-// CHECK6-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK6-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK6: .exit:
-// CHECK6-NEXT: ret void
-// CHECK6-LABEL: define {{[^@]+}}@__omp_outlined__2
-// CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
-// CHECK6-NEXT: entry:
-// CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK6-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
-// CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 4
-// CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK6-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK6-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK6-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK6-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK6-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK6-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK6-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK6-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK6-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK6-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK6-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK6: omp.precond.then:
-// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK6-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK6-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK6-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
-// CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK6-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
-// CHECK6-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK6: cond.true:
-// CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK6-NEXT: br label [[COND_END:%.*]]
-// CHECK6: cond.false:
-// CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: br label [[COND_END]]
-// CHECK6: cond.end:
-// CHECK6-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
-// CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK6-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK6: omp.inner.for.cond:
-// CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1
-// CHECK6-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]
-// CHECK6-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK6: omp.inner.for.body:
-// CHECK6-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK6-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: [[TMP16:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK6-NEXT: store i32 [[TMP16]], i32* [[N_CASTED]], align 4
-// CHECK6-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK6-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK6-NEXT: [[TMP19:%.*]] = inttoptr i32 [[TMP14]] to i8*
-// CHECK6-NEXT: store i8* [[TMP19]], i8** [[TMP18]], align 4
-// CHECK6-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK6-NEXT: [[TMP21:%.*]] = inttoptr i32 [[TMP15]] to i8*
-// CHECK6-NEXT: store i8* [[TMP21]], i8** [[TMP20]], align 4
-// CHECK6-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK6-NEXT: [[TMP23:%.*]] = inttoptr i32 [[TMP17]] to i8*
-// CHECK6-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 4
-// CHECK6-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
-// CHECK6-NEXT: [[TMP25:%.*]] = bitcast [1000 x i16]* [[TMP0]] to i8*
-// CHECK6-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 4
-// CHECK6-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK6-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
-// CHECK6-NEXT: [[TMP28:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK6-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP27]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i16]*)* @__omp_outlined__3 to i8*), i8* null, i8** [[TMP28]], i32 4)
-// CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK6: omp.inner.for.inc:
-// CHECK6-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK6-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP29]], [[TMP30]]
-// CHECK6-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK6-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK6-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP31]], [[TMP32]]
-// CHECK6-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK6-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK6-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP33]], [[TMP34]]
-// CHECK6-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK6-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP35]], [[TMP36]]
-// CHECK6-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]]
-// CHECK6: cond.true10:
-// CHECK6-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK6-NEXT: br label [[COND_END12:%.*]]
-// CHECK6: cond.false11:
-// CHECK6-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: br label [[COND_END12]]
-// CHECK6: cond.end12:
-// CHECK6-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP37]], [[COND_TRUE10]] ], [ [[TMP38]], [[COND_FALSE11]] ]
-// CHECK6-NEXT: store i32 [[COND13]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK6-NEXT: store i32 [[TMP39]], i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK6: omp.inner.for.end:
-// CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK6: omp.loop.exit:
-// CHECK6-NEXT: [[TMP40:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK6-NEXT: [[TMP41:%.*]] = load i32, i32* [[TMP40]], align 4
-// CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP41]])
-// CHECK6-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK6: omp.precond.end:
-// CHECK6-NEXT: ret void
-// CHECK6-LABEL: define {{[^@]+}}@__omp_outlined__3
-// CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
-// CHECK6-NEXT: entry:
-// CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK6-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
-// CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK6-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK6-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK6-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK6-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK6-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK6-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK6-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK6-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK6-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK6-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK6-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK6-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK6-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK6: omp.precond.then:
-// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK6-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
-// CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK6-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
-// CHECK6-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
-// CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK6-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK6-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK6: omp.inner.for.cond:
-// CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK6-NEXT: [[CMP4:%.*]] = icmp ule i32 [[TMP10]], [[TMP11]]
-// CHECK6-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK6: omp.inner.for.body:
-// CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
-// CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK6-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
-// CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[I3]], align 4
-// CHECK6-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i16], [1000 x i16]* [[TMP0]], i32 0, i32 [[TMP13]]
-// CHECK6-NEXT: [[TMP14:%.*]] = load i16, i16* [[ARRAYIDX]], align 2
-// CHECK6-NEXT: [[CONV:%.*]] = sext i16 [[TMP14]] to i32
-// CHECK6-NEXT: [[ADD5:%.*]] = add nsw i32 [[CONV]], 1
-// CHECK6-NEXT: [[CONV6:%.*]] = trunc i32 [[ADD5]] to i16
-// CHECK6-NEXT: store i16 [[CONV6]], i16* [[ARRAYIDX]], align 2
-// CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK6: omp.body.continue:
-// CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK6: omp.inner.for.inc:
-// CHECK6-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK6-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
-// CHECK6-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK6: omp.inner.for.end:
-// CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK6: omp.loop.exit:
-// CHECK6-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK6-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
-// CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]])
-// CHECK6-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK6: omp.precond.end:
-// CHECK6-NEXT: ret void
-// CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l54
-// CHECK6-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
-// CHECK6-NEXT: entry:
-// CHECK6-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
-// CHECK6-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK6-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
-// CHECK6-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
-// CHECK6-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK6-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK6-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK6: .execute:
-// CHECK6-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK6-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK6-NEXT: call void @__omp_outlined__4(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x i32]* [[TMP0]]) #[[ATTR3]]
-// CHECK6-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK6: .omp.deinit:
-// CHECK6-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK6-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK6: .exit:
-// CHECK6-NEXT: ret void
-// CHECK6-LABEL: define {{[^@]+}}@__omp_outlined__4
-// CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
-// CHECK6-NEXT: entry:
-// CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK6-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
-// CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [3 x i8*], align 4
-// CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK6-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
-// CHECK6-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
-// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK6-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK6-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK6-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
-// CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
-// CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK6: cond.true:
-// CHECK6-NEXT: br label [[COND_END:%.*]]
-// CHECK6: cond.false:
-// CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: br label [[COND_END]]
-// CHECK6: cond.end:
-// CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
-// CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK6-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK6: omp.inner.for.cond:
-// CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP6]], 10
-// CHECK6-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK6: omp.inner.for.body:
-// CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK6-NEXT: [[TMP10:%.*]] = inttoptr i32 [[TMP7]] to i8*
-// CHECK6-NEXT: store i8* [[TMP10]], i8** [[TMP9]], align 4
-// CHECK6-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK6-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP8]] to i8*
-// CHECK6-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 4
-// CHECK6-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK6-NEXT: [[TMP14:%.*]] = bitcast [10 x i32]* [[TMP0]] to i8*
-// CHECK6-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 4
-// CHECK6-NEXT: [[TMP15:%.*]] = bitcast [3 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK6-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @__omp_outlined__5 to i8*), i8* null, i8** [[TMP15]], i32 3)
-// CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK6: omp.inner.for.inc:
-// CHECK6-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
-// CHECK6-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK6-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK6-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
-// CHECK6-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK6-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK6-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
-// CHECK6-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP22]], 9
-// CHECK6-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
-// CHECK6: cond.true5:
-// CHECK6-NEXT: br label [[COND_END7:%.*]]
-// CHECK6: cond.false6:
-// CHECK6-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: br label [[COND_END7]]
-// CHECK6: cond.end7:
-// CHECK6-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP23]], [[COND_FALSE6]] ]
-// CHECK6-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK6-NEXT: store i32 [[TMP24]], i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK6: omp.inner.for.end:
-// CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK6: omp.loop.exit:
-// CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
-// CHECK6-NEXT: ret void
-// CHECK6-LABEL: define {{[^@]+}}@__omp_outlined__5
-// CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
-// CHECK6-NEXT: entry:
-// CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK6-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
-// CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK6-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK6-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK6-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
-// CHECK6-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
-// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK6-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
-// CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK6-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
-// CHECK6-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
-// CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK6-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
-// CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK6-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK6: omp.inner.for.cond:
-// CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK6-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP6]], [[TMP7]]
-// CHECK6-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK6: omp.inner.for.body:
-// CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
-// CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4
-// CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
-// CHECK6-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]]
-// CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
-// CHECK6-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP10]], 1
-// CHECK6-NEXT: store i32 [[ADD1]], i32* [[ARRAYIDX]], align 4
-// CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK6: omp.body.continue:
-// CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK6: omp.inner.for.inc:
-// CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK6-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
-// CHECK6-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK6: omp.inner.for.end:
-// CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK6: omp.loop.exit:
-// CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
-// CHECK6-NEXT: ret void
-// CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l59
-// CHECK6-SAME: ([10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
-// CHECK6-NEXT: entry:
-// CHECK6-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK6-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[F_CASTED:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK6-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK6-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
-// CHECK6-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK6-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK6-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK6-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK6: .execute:
-// CHECK6-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[F_ADDR]], align 4
-// CHECK6-NEXT: store i32 [[TMP2]], i32* [[F_CASTED]], align 4
-// CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[F_CASTED]], align 4
-// CHECK6-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK6-NEXT: call void @__omp_outlined__6(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x [10 x i32]]* [[TMP0]], i32 [[TMP3]]) #[[ATTR3]]
-// CHECK6-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK6: .omp.deinit:
-// CHECK6-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK6-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK6: .exit:
-// CHECK6-NEXT: ret void
-// CHECK6-LABEL: define {{[^@]+}}@__omp_outlined__6
-// CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
-// CHECK6-NEXT: entry:
-// CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK6-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK6-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[K:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[J:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[F_CASTED:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 4
-// CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK6-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK6-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
-// CHECK6-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK6-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK6-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK6-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
-// CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
-// CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK6: cond.true:
-// CHECK6-NEXT: br label [[COND_END:%.*]]
-// CHECK6: cond.false:
-// CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: br label [[COND_END]]
-// CHECK6: cond.end:
-// CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
-// CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK6-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK6: omp.inner.for.cond:
-// CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP6]], 100
-// CHECK6-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK6: omp.inner.for.body:
-// CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[F_ADDR]], align 4
-// CHECK6-NEXT: store i32 [[TMP9]], i32* [[F_CASTED]], align 4
-// CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[F_CASTED]], align 4
-// CHECK6-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK6-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP7]] to i8*
-// CHECK6-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 4
-// CHECK6-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK6-NEXT: [[TMP14:%.*]] = inttoptr i32 [[TMP8]] to i8*
-// CHECK6-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 4
-// CHECK6-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK6-NEXT: [[TMP16:%.*]] = bitcast [10 x [10 x i32]]* [[TMP0]] to i8*
-// CHECK6-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 4
-// CHECK6-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
-// CHECK6-NEXT: [[TMP18:%.*]] = inttoptr i32 [[TMP10]] to i8*
-// CHECK6-NEXT: store i8* [[TMP18]], i8** [[TMP17]], align 4
-// CHECK6-NEXT: [[TMP19:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK6-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, [10 x [10 x i32]]*, i32)* @__omp_outlined__7 to i8*), i8* null, i8** [[TMP19]], i32 4)
-// CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK6: omp.inner.for.inc:
-// CHECK6-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
-// CHECK6-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK6-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK6-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
-// CHECK6-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK6-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK6-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
-// CHECK6-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP26]], 99
-// CHECK6-NEXT: br i1 [[CMP5]], label [[COND_TRUE6:%.*]], label [[COND_FALSE7:%.*]]
-// CHECK6: cond.true6:
-// CHECK6-NEXT: br label [[COND_END8:%.*]]
-// CHECK6: cond.false7:
-// CHECK6-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: br label [[COND_END8]]
-// CHECK6: cond.end8:
-// CHECK6-NEXT: [[COND9:%.*]] = phi i32 [ 99, [[COND_TRUE6]] ], [ [[TMP27]], [[COND_FALSE7]] ]
-// CHECK6-NEXT: store i32 [[COND9]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK6-NEXT: store i32 [[TMP28]], i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK6: omp.inner.for.end:
-// CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK6: omp.loop.exit:
-// CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
-// CHECK6-NEXT: ret void
-// CHECK6-LABEL: define {{[^@]+}}@__omp_outlined__7
-// CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
-// CHECK6-NEXT: entry:
-// CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK6-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK6-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[K:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[J:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK6-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK6-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK6-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK6-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
-// CHECK6-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
-// CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK6-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
-// CHECK6-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
-// CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK6-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
-// CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK6-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK6: omp.inner.for.cond:
-// CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK6-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP6]], [[TMP7]]
-// CHECK6-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK6: omp.inner.for.body:
-// CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP8]], 10
-// CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
-// CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4
-// CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: [[DIV2:%.*]] = sdiv i32 [[TMP10]], 10
-// CHECK6-NEXT: [[MUL3:%.*]] = mul nsw i32 [[DIV2]], 10
-// CHECK6-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL3]]
-// CHECK6-NEXT: [[MUL4:%.*]] = mul nsw i32 [[SUB]], 1
-// CHECK6-NEXT: [[ADD5:%.*]] = add nsw i32 0, [[MUL4]]
-// CHECK6-NEXT: store i32 [[ADD5]], i32* [[J]], align 4
-// CHECK6-NEXT: store i32 10, i32* [[K]], align 4
-// CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
-// CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[J]], align 4
-// CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[F_ADDR]], align 4
-// CHECK6-NEXT: [[MUL6:%.*]] = mul nsw i32 [[TMP12]], [[TMP13]]
-// CHECK6-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP11]], [[MUL6]]
-// CHECK6-NEXT: [[TMP14:%.*]] = load i32, i32* [[K]], align 4
-// CHECK6-NEXT: [[ADD8:%.*]] = add nsw i32 [[ADD7]], [[TMP14]]
-// CHECK6-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4
-// CHECK6-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [10 x i32]], [10 x [10 x i32]]* [[TMP0]], i32 0, i32 [[TMP15]]
-// CHECK6-NEXT: [[TMP16:%.*]] = load i32, i32* [[J]], align 4
-// CHECK6-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP16]]
-// CHECK6-NEXT: store i32 [[ADD8]], i32* [[ARRAYIDX9]], align 4
-// CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK6: omp.body.continue:
-// CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK6: omp.inner.for.inc:
-// CHECK6-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK6-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
-// CHECK6-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK6: omp.inner.for.end:
-// CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK6: omp.loop.exit:
-// CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
-// CHECK6-NEXT: ret void
-// CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l67
-// CHECK6-SAME: (i32 [[N:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]]) #[[ATTR0]] {
-// CHECK6-NEXT: entry:
-// CHECK6-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK6-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK6-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK6-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK6-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK6-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK6-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK6-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK6: .execute:
-// CHECK6-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK6-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
-// CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK6-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK6-NEXT: call void @__omp_outlined__8(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP3]], [10 x [10 x i32]]* [[TMP0]]) #[[ATTR3]]
-// CHECK6-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK6: .omp.deinit:
-// CHECK6-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK6-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK6: .exit:
-// CHECK6-NEXT: ret void
-// CHECK6-LABEL: define {{[^@]+}}@__omp_outlined__8
-// CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]]) #[[ATTR0]] {
-// CHECK6-NEXT: entry:
-// CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK6-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
-// CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8
-// CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[J:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i64, align 8
-// CHECK6-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i64, align 8
-// CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
-// CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[I9:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[J10:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 4
-// CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK6-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK6-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK6-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK6-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK6-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK6-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
-// CHECK6-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK6-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64
-// CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK6-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP4]], 0
-// CHECK6-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1
-// CHECK6-NEXT: [[CONV6:%.*]] = sext i32 [[DIV5]] to i64
-// CHECK6-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]]
-// CHECK6-NEXT: [[SUB7:%.*]] = sub nsw i64 [[MUL]], 1
-// CHECK6-NEXT: store i64 [[SUB7]], i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK6-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK6-NEXT: store i32 0, i32* [[J]], align 4
-// CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK6-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
-// CHECK6-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK6: land.lhs.true:
-// CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK6-NEXT: [[CMP8:%.*]] = icmp slt i32 0, [[TMP6]]
-// CHECK6-NEXT: br i1 [[CMP8]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
-// CHECK6: omp.precond.then:
-// CHECK6-NEXT: store i64 0, i64* [[DOTOMP_COMB_LB]], align 8
-// CHECK6-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK6-NEXT: store i64 [[TMP7]], i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK6-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8
-// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK6-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK6-NEXT: [[CONV11:%.*]] = zext i32 [[NVPTX_NUM_THREADS]] to i64
-// CHECK6-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
-// CHECK6-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_COMB_LB]], i64* [[DOTOMP_COMB_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 [[CONV11]])
-// CHECK6-NEXT: [[TMP10:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK6-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK6-NEXT: [[CMP12:%.*]] = icmp sgt i64 [[TMP10]], [[TMP11]]
-// CHECK6-NEXT: br i1 [[CMP12]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK6: cond.true:
-// CHECK6-NEXT: [[TMP12:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK6-NEXT: br label [[COND_END:%.*]]
-// CHECK6: cond.false:
-// CHECK6-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK6-NEXT: br label [[COND_END]]
-// CHECK6: cond.end:
-// CHECK6-NEXT: [[COND:%.*]] = phi i64 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
-// CHECK6-NEXT: store i64 [[COND]], i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK6-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
-// CHECK6-NEXT: store i64 [[TMP14]], i64* [[DOTOMP_IV]], align 8
-// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK6: omp.inner.for.cond:
-// CHECK6-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK6-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK6-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP16]], 1
-// CHECK6-NEXT: [[CMP13:%.*]] = icmp slt i64 [[TMP15]], [[ADD]]
-// CHECK6-NEXT: br i1 [[CMP13]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK6: omp.inner.for.body:
-// CHECK6-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
-// CHECK6-NEXT: [[TMP18:%.*]] = trunc i64 [[TMP17]] to i32
-// CHECK6-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK6-NEXT: [[TMP20:%.*]] = trunc i64 [[TMP19]] to i32
-// CHECK6-NEXT: [[TMP21:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK6-NEXT: store i32 [[TMP21]], i32* [[N_CASTED]], align 4
-// CHECK6-NEXT: [[TMP22:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK6-NEXT: [[TMP23:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK6-NEXT: [[TMP24:%.*]] = inttoptr i32 [[TMP18]] to i8*
-// CHECK6-NEXT: store i8* [[TMP24]], i8** [[TMP23]], align 4
-// CHECK6-NEXT: [[TMP25:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK6-NEXT: [[TMP26:%.*]] = inttoptr i32 [[TMP20]] to i8*
-// CHECK6-NEXT: store i8* [[TMP26]], i8** [[TMP25]], align 4
-// CHECK6-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK6-NEXT: [[TMP28:%.*]] = inttoptr i32 [[TMP22]] to i8*
-// CHECK6-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 4
-// CHECK6-NEXT: [[TMP29:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
-// CHECK6-NEXT: [[TMP30:%.*]] = bitcast [10 x [10 x i32]]* [[TMP0]] to i8*
-// CHECK6-NEXT: store i8* [[TMP30]], i8** [[TMP29]], align 4
-// CHECK6-NEXT: [[TMP31:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK6-NEXT: [[TMP32:%.*]] = load i32, i32* [[TMP31]], align 4
-// CHECK6-NEXT: [[TMP33:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK6-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP32]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [10 x [10 x i32]]*)* @__omp_outlined__9 to i8*), i8* null, i8** [[TMP33]], i32 4)
-// CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK6: omp.inner.for.inc:
-// CHECK6-NEXT: [[TMP34:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK6-NEXT: [[TMP35:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8
-// CHECK6-NEXT: [[ADD14:%.*]] = add nsw i64 [[TMP34]], [[TMP35]]
-// CHECK6-NEXT: store i64 [[ADD14]], i64* [[DOTOMP_IV]], align 8
-// CHECK6-NEXT: [[TMP36:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
-// CHECK6-NEXT: [[TMP37:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8
-// CHECK6-NEXT: [[ADD15:%.*]] = add nsw i64 [[TMP36]], [[TMP37]]
-// CHECK6-NEXT: store i64 [[ADD15]], i64* [[DOTOMP_COMB_LB]], align 8
-// CHECK6-NEXT: [[TMP38:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK6-NEXT: [[TMP39:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8
-// CHECK6-NEXT: [[ADD16:%.*]] = add nsw i64 [[TMP38]], [[TMP39]]
-// CHECK6-NEXT: store i64 [[ADD16]], i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK6-NEXT: [[TMP40:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK6-NEXT: [[TMP41:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK6-NEXT: [[CMP17:%.*]] = icmp sgt i64 [[TMP40]], [[TMP41]]
-// CHECK6-NEXT: br i1 [[CMP17]], label [[COND_TRUE18:%.*]], label [[COND_FALSE19:%.*]]
-// CHECK6: cond.true18:
-// CHECK6-NEXT: [[TMP42:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK6-NEXT: br label [[COND_END20:%.*]]
-// CHECK6: cond.false19:
-// CHECK6-NEXT: [[TMP43:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK6-NEXT: br label [[COND_END20]]
-// CHECK6: cond.end20:
-// CHECK6-NEXT: [[COND21:%.*]] = phi i64 [ [[TMP42]], [[COND_TRUE18]] ], [ [[TMP43]], [[COND_FALSE19]] ]
-// CHECK6-NEXT: store i64 [[COND21]], i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK6-NEXT: [[TMP44:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
-// CHECK6-NEXT: store i64 [[TMP44]], i64* [[DOTOMP_IV]], align 8
-// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK6: omp.inner.for.end:
-// CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK6: omp.loop.exit:
-// CHECK6-NEXT: [[TMP45:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK6-NEXT: [[TMP46:%.*]] = load i32, i32* [[TMP45]], align 4
-// CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP46]])
-// CHECK6-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK6: omp.precond.end:
-// CHECK6-NEXT: ret void
-// CHECK6-LABEL: define {{[^@]+}}@__omp_outlined__9
-// CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]]) #[[ATTR0]] {
-// CHECK6-NEXT: entry:
-// CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK6-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
-// CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8
-// CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[J:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8
-// CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8
-// CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
-// CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[I11:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[J12:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK6-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK6-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK6-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK6-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK6-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK6-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK6-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK6-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
-// CHECK6-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK6-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64
-// CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK6-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP4]], 0
-// CHECK6-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1
-// CHECK6-NEXT: [[CONV6:%.*]] = sext i32 [[DIV5]] to i64
-// CHECK6-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]]
-// CHECK6-NEXT: [[SUB7:%.*]] = sub nsw i64 [[MUL]], 1
-// CHECK6-NEXT: store i64 [[SUB7]], i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK6-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK6-NEXT: store i32 0, i32* [[J]], align 4
-// CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK6-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
-// CHECK6-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK6: land.lhs.true:
-// CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK6-NEXT: [[CMP8:%.*]] = icmp slt i32 0, [[TMP6]]
-// CHECK6-NEXT: br i1 [[CMP8]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
-// CHECK6: omp.precond.then:
-// CHECK6-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8
-// CHECK6-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK6-NEXT: store i64 [[TMP7]], i64* [[DOTOMP_UB]], align 8
-// CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK6-NEXT: [[CONV9:%.*]] = zext i32 [[TMP8]] to i64
-// CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK6-NEXT: [[CONV10:%.*]] = zext i32 [[TMP9]] to i64
-// CHECK6-NEXT: store i64 [[CONV9]], i64* [[DOTOMP_LB]], align 8
-// CHECK6-NEXT: store i64 [[CONV10]], i64* [[DOTOMP_UB]], align 8
-// CHECK6-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8
-// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK6-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
-// CHECK6-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 33, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_LB]], i64* [[DOTOMP_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1)
-// CHECK6-NEXT: [[TMP12:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8
-// CHECK6-NEXT: store i64 [[TMP12]], i64* [[DOTOMP_IV]], align 8
-// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK6: omp.inner.for.cond:
-// CHECK6-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK6-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK6-NEXT: [[CONV13:%.*]] = zext i32 [[TMP14]] to i64
-// CHECK6-NEXT: [[CMP14:%.*]] = icmp sle i64 [[TMP13]], [[CONV13]]
-// CHECK6-NEXT: br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK6: omp.inner.for.body:
-// CHECK6-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK6-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK6-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP16]], 0
-// CHECK6-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1
-// CHECK6-NEXT: [[MUL17:%.*]] = mul nsw i32 1, [[DIV16]]
-// CHECK6-NEXT: [[CONV18:%.*]] = sext i32 [[MUL17]] to i64
-// CHECK6-NEXT: [[DIV19:%.*]] = sdiv i64 [[TMP15]], [[CONV18]]
-// CHECK6-NEXT: [[MUL20:%.*]] = mul nsw i64 [[DIV19]], 1
-// CHECK6-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL20]]
-// CHECK6-NEXT: [[CONV21:%.*]] = trunc i64 [[ADD]] to i32
-// CHECK6-NEXT: store i32 [[CONV21]], i32* [[I11]], align 4
-// CHECK6-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK6-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK6-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK6-NEXT: [[SUB22:%.*]] = sub nsw i32 [[TMP19]], 0
-// CHECK6-NEXT: [[DIV23:%.*]] = sdiv i32 [[SUB22]], 1
-// CHECK6-NEXT: [[MUL24:%.*]] = mul nsw i32 1, [[DIV23]]
-// CHECK6-NEXT: [[CONV25:%.*]] = sext i32 [[MUL24]] to i64
-// CHECK6-NEXT: [[DIV26:%.*]] = sdiv i64 [[TMP18]], [[CONV25]]
-// CHECK6-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK6-NEXT: [[SUB27:%.*]] = sub nsw i32 [[TMP20]], 0
-// CHECK6-NEXT: [[DIV28:%.*]] = sdiv i32 [[SUB27]], 1
-// CHECK6-NEXT: [[MUL29:%.*]] = mul nsw i32 1, [[DIV28]]
-// CHECK6-NEXT: [[CONV30:%.*]] = sext i32 [[MUL29]] to i64
-// CHECK6-NEXT: [[MUL31:%.*]] = mul nsw i64 [[DIV26]], [[CONV30]]
-// CHECK6-NEXT: [[SUB32:%.*]] = sub nsw i64 [[TMP17]], [[MUL31]]
-// CHECK6-NEXT: [[MUL33:%.*]] = mul nsw i64 [[SUB32]], 1
-// CHECK6-NEXT: [[ADD34:%.*]] = add nsw i64 0, [[MUL33]]
-// CHECK6-NEXT: [[CONV35:%.*]] = trunc i64 [[ADD34]] to i32
-// CHECK6-NEXT: store i32 [[CONV35]], i32* [[J12]], align 4
-// CHECK6-NEXT: [[TMP21:%.*]] = load i32, i32* [[I11]], align 4
-// CHECK6-NEXT: [[TMP22:%.*]] = load i32, i32* [[J12]], align 4
-// CHECK6-NEXT: [[ADD36:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
-// CHECK6-NEXT: [[TMP23:%.*]] = load i32, i32* [[I11]], align 4
-// CHECK6-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [10 x i32]], [10 x [10 x i32]]* [[TMP0]], i32 0, i32 [[TMP23]]
-// CHECK6-NEXT: [[TMP24:%.*]] = load i32, i32* [[J12]], align 4
-// CHECK6-NEXT: [[ARRAYIDX37:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP24]]
-// CHECK6-NEXT: store i32 [[ADD36]], i32* [[ARRAYIDX37]], align 4
-// CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK6: omp.body.continue:
-// CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK6: omp.inner.for.inc:
-// CHECK6-NEXT: [[TMP25:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK6-NEXT: [[TMP26:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8
-// CHECK6-NEXT: [[ADD38:%.*]] = add nsw i64 [[TMP25]], [[TMP26]]
-// CHECK6-NEXT: store i64 [[ADD38]], i64* [[DOTOMP_IV]], align 8
-// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK6: omp.inner.for.end:
-// CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK6: omp.loop.exit:
-// CHECK6-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK6-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4
-// CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP28]])
-// CHECK6-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK6: omp.precond.end:
-// CHECK6-NEXT: ret void
-// CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l74
-// CHECK6-SAME: (i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* [[V:%.*]]) #[[ATTR0]] {
-// CHECK6-NEXT: entry:
-// CHECK6-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK6-NEXT: [[V_ADDR:%.*]] = alloca i32*, align 4
-// CHECK6-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK6-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK6-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK6-NEXT: store i32* [[V]], i32** [[V_ADDR]], align 4
-// CHECK6-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK6-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK6-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK6-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK6: .execute:
-// CHECK6-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK6-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
-// CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK6-NEXT: [[TMP4:%.*]] = load i32*, i32** [[V_ADDR]], align 4
-// CHECK6-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK6-NEXT: call void @__omp_outlined__10(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP3]], [1000 x i32]* [[TMP0]], i32* [[TMP4]]) #[[ATTR3]]
-// CHECK6-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK6: .omp.deinit:
-// CHECK6-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK6-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK6: .exit:
-// CHECK6-NEXT: ret void
-// CHECK6-LABEL: define {{[^@]+}}@__omp_outlined__10
-// CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* [[V:%.*]]) #[[ATTR0]] {
-// CHECK6-NEXT: entry:
-// CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK6-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK6-NEXT: [[V_ADDR:%.*]] = alloca i32*, align 4
-// CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [5 x i8*], align 4
-// CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK6-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK6-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK6-NEXT: store i32* [[V]], i32** [[V_ADDR]], align 4
-// CHECK6-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK6-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK6-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK6-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK6-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK6-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK6-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK6-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK6-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK6: omp.precond.then:
-// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK6-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK6-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK6-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
-// CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK6-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
-// CHECK6-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK6: cond.true:
-// CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK6-NEXT: br label [[COND_END:%.*]]
-// CHECK6: cond.false:
-// CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: br label [[COND_END]]
-// CHECK6: cond.end:
-// CHECK6-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
-// CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK6-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK6: omp.inner.for.cond:
-// CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1
-// CHECK6-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]
-// CHECK6-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK6: omp.inner.for.body:
-// CHECK6-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK6-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: [[TMP16:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK6-NEXT: store i32 [[TMP16]], i32* [[N_CASTED]], align 4
-// CHECK6-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK6-NEXT: [[TMP18:%.*]] = load i32*, i32** [[V_ADDR]], align 4
-// CHECK6-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK6-NEXT: [[TMP20:%.*]] = inttoptr i32 [[TMP14]] to i8*
-// CHECK6-NEXT: store i8* [[TMP20]], i8** [[TMP19]], align 4
-// CHECK6-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK6-NEXT: [[TMP22:%.*]] = inttoptr i32 [[TMP15]] to i8*
-// CHECK6-NEXT: store i8* [[TMP22]], i8** [[TMP21]], align 4
-// CHECK6-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK6-NEXT: [[TMP24:%.*]] = inttoptr i32 [[TMP17]] to i8*
-// CHECK6-NEXT: store i8* [[TMP24]], i8** [[TMP23]], align 4
-// CHECK6-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
-// CHECK6-NEXT: [[TMP26:%.*]] = bitcast [1000 x i32]* [[TMP0]] to i8*
-// CHECK6-NEXT: store i8* [[TMP26]], i8** [[TMP25]], align 4
-// CHECK6-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 4
-// CHECK6-NEXT: [[TMP28:%.*]] = bitcast i32* [[TMP18]] to i8*
-// CHECK6-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 4
-// CHECK6-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK6-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4
-// CHECK6-NEXT: [[TMP31:%.*]] = bitcast [5 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK6-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP30]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i32]*, i32*)* @__omp_outlined__11 to i8*), i8* null, i8** [[TMP31]], i32 5)
-// CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK6: omp.inner.for.inc:
-// CHECK6-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK6-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP32]], [[TMP33]]
-// CHECK6-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK6-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK6-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP34]], [[TMP35]]
-// CHECK6-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK6-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK6-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP36]], [[TMP37]]
-// CHECK6-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK6-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP38]], [[TMP39]]
-// CHECK6-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]]
-// CHECK6: cond.true10:
-// CHECK6-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK6-NEXT: br label [[COND_END12:%.*]]
-// CHECK6: cond.false11:
-// CHECK6-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: br label [[COND_END12]]
-// CHECK6: cond.end12:
-// CHECK6-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP40]], [[COND_TRUE10]] ], [ [[TMP41]], [[COND_FALSE11]] ]
-// CHECK6-NEXT: store i32 [[COND13]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK6-NEXT: store i32 [[TMP42]], i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK6: omp.inner.for.end:
-// CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK6: omp.loop.exit:
-// CHECK6-NEXT: [[TMP43:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK6-NEXT: [[TMP44:%.*]] = load i32, i32* [[TMP43]], align 4
-// CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP44]])
-// CHECK6-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK6: omp.precond.end:
-// CHECK6-NEXT: ret void
-// CHECK6-LABEL: define {{[^@]+}}@__omp_outlined__11
-// CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* [[V:%.*]]) #[[ATTR0]] {
-// CHECK6-NEXT: entry:
-// CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK6-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK6-NEXT: [[V_ADDR:%.*]] = alloca i32*, align 4
-// CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK6-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK6-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK6-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK6-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK6-NEXT: store i32* [[V]], i32** [[V_ADDR]], align 4
-// CHECK6-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK6-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK6-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK6-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK6-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK6-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK6-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK6-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK6-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK6: omp.precond.then:
-// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK6-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
-// CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK6-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
-// CHECK6-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
-// CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK6-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK6-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK6: omp.inner.for.cond:
-// CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK6-NEXT: [[CMP4:%.*]] = icmp ule i32 [[TMP10]], [[TMP11]]
-// CHECK6-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK6: omp.inner.for.body:
-// CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
-// CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK6-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
-// CHECK6-NEXT: [[TMP13:%.*]] = load i32*, i32** [[V_ADDR]], align 4
-// CHECK6-NEXT: [[TMP14:%.*]] = load i32, i32* [[I3]], align 4
-// CHECK6-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP13]], i32 [[TMP14]]
-// CHECK6-NEXT: [[TMP15:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
-// CHECK6-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4
-// CHECK6-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 [[TMP16]]
-// CHECK6-NEXT: store i32 [[TMP15]], i32* [[ARRAYIDX5]], align 4
-// CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK6: omp.body.continue:
-// CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK6: omp.inner.for.inc:
-// CHECK6-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK6-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
-// CHECK6-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK6: omp.inner.for.end:
-// CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK6: omp.loop.exit:
-// CHECK6-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK6-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4
-// CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]])
-// CHECK6-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK6: omp.precond.end:
-// CHECK6-NEXT: ret void
-// CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l43
-// CHECK7-SAME: (i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0:[0-9]+]] {
-// CHECK7-NEXT: entry:
-// CHECK7-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK7-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[L_CASTED:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK7-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK7-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK7-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
-// CHECK7-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK7-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK7-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK7-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK7: .execute:
-// CHECK7-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]])
-// CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK7-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
-// CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[L_ADDR]], align 4
-// CHECK7-NEXT: store i32 [[TMP4]], i32* [[L_CASTED]], align 4
-// CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[L_CASTED]], align 4
-// CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK7-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP3]], [1000 x i32]* [[TMP0]], i32 [[TMP5]]) #[[ATTR3:[0-9]+]]
-// CHECK7-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK7: .omp.deinit:
-// CHECK7-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK7-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK7: .exit:
-// CHECK7-NEXT: ret void
-// CHECK7-LABEL: define {{[^@]+}}@__omp_outlined__
-// CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0]] {
-// CHECK7-NEXT: entry:
-// CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK7-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK7-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[I4:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[L_CASTED:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [5 x i8*], align 4
-// CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK7-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK7-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK7-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
-// CHECK7-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK7-NEXT: [[TMP1:%.*]] = call i8* @__kmpc_data_sharing_push_stack(i32 4, i16 1)
-// CHECK7-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to %struct._globalized_locals_ty*
-// CHECK7-NEXT: [[L1:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY:%.*]], %struct._globalized_locals_ty* [[TMP2]], i32 0, i32 0
-// CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK7-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK7-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
-// CHECK7-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK7-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK7-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK7-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK7-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
-// CHECK7-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK7: omp.precond.then:
-// CHECK7-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK7-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK7-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 128)
-// CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK7-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
-// CHECK7-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK7: cond.true:
-// CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK7-NEXT: br label [[COND_END:%.*]]
-// CHECK7: cond.false:
-// CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: br label [[COND_END]]
-// CHECK7: cond.end:
-// CHECK7-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
-// CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK7-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK7: omp.inner.for.cond:
-// CHECK7-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], 1
-// CHECK7-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP14]], [[ADD]]
-// CHECK7-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK7: omp.inner.for.body:
-// CHECK7-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK7-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: [[TMP18:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK7-NEXT: store i32 [[TMP18]], i32* [[N_CASTED]], align 4
-// CHECK7-NEXT: [[TMP19:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK7-NEXT: [[TMP20:%.*]] = load i32, i32* [[L_ADDR]], align 4
-// CHECK7-NEXT: store i32 [[TMP20]], i32* [[L_CASTED]], align 4
-// CHECK7-NEXT: [[TMP21:%.*]] = load i32, i32* [[L_CASTED]], align 4
-// CHECK7-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK7-NEXT: [[TMP23:%.*]] = inttoptr i32 [[TMP16]] to i8*
-// CHECK7-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 4
-// CHECK7-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK7-NEXT: [[TMP25:%.*]] = inttoptr i32 [[TMP17]] to i8*
-// CHECK7-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 4
-// CHECK7-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK7-NEXT: [[TMP27:%.*]] = inttoptr i32 [[TMP19]] to i8*
-// CHECK7-NEXT: store i8* [[TMP27]], i8** [[TMP26]], align 4
-// CHECK7-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
-// CHECK7-NEXT: [[TMP29:%.*]] = bitcast [1000 x i32]* [[TMP0]] to i8*
-// CHECK7-NEXT: store i8* [[TMP29]], i8** [[TMP28]], align 4
-// CHECK7-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 4
-// CHECK7-NEXT: [[TMP31:%.*]] = inttoptr i32 [[TMP21]] to i8*
-// CHECK7-NEXT: store i8* [[TMP31]], i8** [[TMP30]], align 4
-// CHECK7-NEXT: [[TMP32:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK7-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4
-// CHECK7-NEXT: [[TMP34:%.*]] = bitcast [5 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK7-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP33]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i32]*, i32)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP34]], i32 5)
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK7: omp.inner.for.inc:
-// CHECK7-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK7-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP35]], [[TMP36]]
-// CHECK7-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK7-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK7-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP37]], [[TMP38]]
-// CHECK7-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK7-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK7-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP39]], [[TMP40]]
-// CHECK7-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK7-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP41]], [[TMP42]]
-// CHECK7-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
-// CHECK7: cond.true11:
-// CHECK7-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK7-NEXT: br label [[COND_END13:%.*]]
-// CHECK7: cond.false12:
-// CHECK7-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: br label [[COND_END13]]
-// CHECK7: cond.end13:
-// CHECK7-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP43]], [[COND_TRUE11]] ], [ [[TMP44]], [[COND_FALSE12]] ]
-// CHECK7-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK7-NEXT: store i32 [[TMP45]], i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK7: omp.inner.for.end:
-// CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK7: omp.loop.exit:
-// CHECK7-NEXT: [[TMP46:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK7-NEXT: [[TMP47:%.*]] = load i32, i32* [[TMP46]], align 4
-// CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP47]])
-// CHECK7-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK7-NEXT: [[TMP49:%.*]] = icmp ne i32 [[TMP48]], 0
-// CHECK7-NEXT: br i1 [[TMP49]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
-// CHECK7: .omp.lastprivate.then:
-// CHECK7-NEXT: [[TMP50:%.*]] = load i32, i32* [[L_ADDR]], align 4
-// CHECK7-NEXT: store i32 [[TMP50]], i32* [[L_ADDR]], align 4
-// CHECK7-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
-// CHECK7: .omp.lastprivate.done:
-// CHECK7-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK7: omp.precond.end:
-// CHECK7-NEXT: call void @__kmpc_data_sharing_pop_stack(i8* [[TMP1]])
-// CHECK7-NEXT: ret void
-// CHECK7-LABEL: define {{[^@]+}}@__omp_outlined__1
-// CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0]] {
-// CHECK7-NEXT: entry:
-// CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK7-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK7-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK7-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK7-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK7-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK7-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
-// CHECK7-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK7-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK7-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK7-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK7-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK7-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK7-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK7-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK7: omp.precond.then:
-// CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK7-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
-// CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
-// CHECK7-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
-// CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK7-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 32)
-// CHECK7-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
-// CHECK7: omp.dispatch.cond:
-// CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK7-NEXT: [[CMP4:%.*]] = icmp ugt i32 [[TMP9]], [[TMP10]]
-// CHECK7-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK7: cond.true:
-// CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK7-NEXT: br label [[COND_END:%.*]]
-// CHECK7: cond.false:
-// CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK7-NEXT: br label [[COND_END]]
-// CHECK7: cond.end:
-// CHECK7-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
-// CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
-// CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK7-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK7-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
-// CHECK7-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
-// CHECK7: omp.dispatch.body:
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK7: omp.inner.for.cond:
-// CHECK7-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK7-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
-// CHECK7-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK7: omp.inner.for.body:
-// CHECK7-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
-// CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK7-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
-// CHECK7-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4
-// CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 [[TMP19]]
-// CHECK7-NEXT: store i32 1, i32* [[ARRAYIDX]], align 4
-// CHECK7-NEXT: [[TMP20:%.*]] = load i32, i32* [[I3]], align 4
-// CHECK7-NEXT: store i32 [[TMP20]], i32* [[L_ADDR]], align 4
-// CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK7: omp.body.continue:
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK7: omp.inner.for.inc:
-// CHECK7-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP21]], 1
-// CHECK7-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK7: omp.inner.for.end:
-// CHECK7-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
-// CHECK7: omp.dispatch.inc:
-// CHECK7-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK7-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK7-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
-// CHECK7-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4
-// CHECK7-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK7-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK7-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
-// CHECK7-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4
-// CHECK7-NEXT: br label [[OMP_DISPATCH_COND]]
-// CHECK7: omp.dispatch.end:
-// CHECK7-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK7-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
-// CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP27]])
-// CHECK7-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK7-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
-// CHECK7-NEXT: br i1 [[TMP29]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
-// CHECK7: .omp.lastprivate.then:
-// CHECK7-NEXT: [[TMP30:%.*]] = load i32, i32* [[L_ADDR]], align 4
-// CHECK7-NEXT: store i32 [[TMP30]], i32* [[L_ADDR]], align 4
-// CHECK7-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
-// CHECK7: .omp.lastprivate.done:
-// CHECK7-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK7: omp.precond.end:
-// CHECK7-NEXT: ret void
-// CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l49
-// CHECK7-SAME: (i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
-// CHECK7-NEXT: entry:
-// CHECK7-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
-// CHECK7-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK7-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK7-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK7-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK7-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK7-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK7-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK7: .execute:
-// CHECK7-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK7-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
-// CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK7-NEXT: call void @__omp_outlined__2(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP3]], [1000 x i16]* [[TMP0]]) #[[ATTR3]]
-// CHECK7-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK7: .omp.deinit:
-// CHECK7-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK7-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK7: .exit:
-// CHECK7-NEXT: ret void
-// CHECK7-LABEL: define {{[^@]+}}@__omp_outlined__2
-// CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
-// CHECK7-NEXT: entry:
-// CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK7-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
-// CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 4
-// CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK7-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK7-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK7-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK7-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK7-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK7-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK7-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK7-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK7-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK7-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK7: omp.precond.then:
-// CHECK7-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK7-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK7-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK7-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
-// CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK7-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
-// CHECK7-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK7: cond.true:
-// CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK7-NEXT: br label [[COND_END:%.*]]
-// CHECK7: cond.false:
-// CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: br label [[COND_END]]
-// CHECK7: cond.end:
-// CHECK7-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
-// CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK7-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK7: omp.inner.for.cond:
-// CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1
-// CHECK7-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]
-// CHECK7-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK7: omp.inner.for.body:
-// CHECK7-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK7-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: [[TMP16:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK7-NEXT: store i32 [[TMP16]], i32* [[N_CASTED]], align 4
-// CHECK7-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK7-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK7-NEXT: [[TMP19:%.*]] = inttoptr i32 [[TMP14]] to i8*
-// CHECK7-NEXT: store i8* [[TMP19]], i8** [[TMP18]], align 4
-// CHECK7-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK7-NEXT: [[TMP21:%.*]] = inttoptr i32 [[TMP15]] to i8*
-// CHECK7-NEXT: store i8* [[TMP21]], i8** [[TMP20]], align 4
-// CHECK7-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK7-NEXT: [[TMP23:%.*]] = inttoptr i32 [[TMP17]] to i8*
-// CHECK7-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 4
-// CHECK7-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
-// CHECK7-NEXT: [[TMP25:%.*]] = bitcast [1000 x i16]* [[TMP0]] to i8*
-// CHECK7-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 4
-// CHECK7-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK7-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
-// CHECK7-NEXT: [[TMP28:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK7-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP27]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i16]*)* @__omp_outlined__3 to i8*), i8* null, i8** [[TMP28]], i32 4)
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK7: omp.inner.for.inc:
-// CHECK7-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK7-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP29]], [[TMP30]]
-// CHECK7-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK7-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK7-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP31]], [[TMP32]]
-// CHECK7-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK7-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK7-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP33]], [[TMP34]]
-// CHECK7-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK7-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP35]], [[TMP36]]
-// CHECK7-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]]
-// CHECK7: cond.true10:
-// CHECK7-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK7-NEXT: br label [[COND_END12:%.*]]
-// CHECK7: cond.false11:
-// CHECK7-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: br label [[COND_END12]]
-// CHECK7: cond.end12:
-// CHECK7-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP37]], [[COND_TRUE10]] ], [ [[TMP38]], [[COND_FALSE11]] ]
-// CHECK7-NEXT: store i32 [[COND13]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK7-NEXT: store i32 [[TMP39]], i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK7: omp.inner.for.end:
-// CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK7: omp.loop.exit:
-// CHECK7-NEXT: [[TMP40:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK7-NEXT: [[TMP41:%.*]] = load i32, i32* [[TMP40]], align 4
-// CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP41]])
-// CHECK7-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK7: omp.precond.end:
-// CHECK7-NEXT: ret void
-// CHECK7-LABEL: define {{[^@]+}}@__omp_outlined__3
-// CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
-// CHECK7-NEXT: entry:
-// CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
-// CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK7-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK7-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK7-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK7-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK7-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK7-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK7-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK7-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK7-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK7-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK7-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK7-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK7: omp.precond.then:
-// CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK7-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
-// CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
-// CHECK7-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
-// CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK7-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK7-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK7: omp.inner.for.cond:
-// CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK7-NEXT: [[CMP4:%.*]] = icmp ule i32 [[TMP10]], [[TMP11]]
-// CHECK7-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK7: omp.inner.for.body:
-// CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
-// CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK7-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
-// CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[I3]], align 4
-// CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i16], [1000 x i16]* [[TMP0]], i32 0, i32 [[TMP13]]
-// CHECK7-NEXT: [[TMP14:%.*]] = load i16, i16* [[ARRAYIDX]], align 2
-// CHECK7-NEXT: [[CONV:%.*]] = sext i16 [[TMP14]] to i32
-// CHECK7-NEXT: [[ADD5:%.*]] = add nsw i32 [[CONV]], 1
-// CHECK7-NEXT: [[CONV6:%.*]] = trunc i32 [[ADD5]] to i16
-// CHECK7-NEXT: store i16 [[CONV6]], i16* [[ARRAYIDX]], align 2
-// CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK7: omp.body.continue:
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK7: omp.inner.for.inc:
-// CHECK7-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK7-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
-// CHECK7-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK7: omp.inner.for.end:
-// CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK7: omp.loop.exit:
-// CHECK7-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK7-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
-// CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]])
-// CHECK7-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK7: omp.precond.end:
-// CHECK7-NEXT: ret void
-// CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l54
-// CHECK7-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
-// CHECK7-NEXT: entry:
-// CHECK7-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
-// CHECK7-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK7-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
-// CHECK7-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
-// CHECK7-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK7-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK7-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK7: .execute:
-// CHECK7-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK7-NEXT: call void @__omp_outlined__4(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x i32]* [[TMP0]]) #[[ATTR3]]
-// CHECK7-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK7: .omp.deinit:
-// CHECK7-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK7-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK7: .exit:
-// CHECK7-NEXT: ret void
-// CHECK7-LABEL: define {{[^@]+}}@__omp_outlined__4
-// CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
-// CHECK7-NEXT: entry:
-// CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK7-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
-// CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [3 x i8*], align 4
-// CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK7-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
-// CHECK7-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
-// CHECK7-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK7-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK7-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK7-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
-// CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
-// CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK7: cond.true:
-// CHECK7-NEXT: br label [[COND_END:%.*]]
-// CHECK7: cond.false:
-// CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: br label [[COND_END]]
-// CHECK7: cond.end:
-// CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
-// CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK7: omp.inner.for.cond:
-// CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP6]], 10
-// CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK7: omp.inner.for.body:
-// CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK7-NEXT: [[TMP10:%.*]] = inttoptr i32 [[TMP7]] to i8*
-// CHECK7-NEXT: store i8* [[TMP10]], i8** [[TMP9]], align 4
-// CHECK7-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK7-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP8]] to i8*
-// CHECK7-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 4
-// CHECK7-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK7-NEXT: [[TMP14:%.*]] = bitcast [10 x i32]* [[TMP0]] to i8*
-// CHECK7-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 4
-// CHECK7-NEXT: [[TMP15:%.*]] = bitcast [3 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK7-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @__omp_outlined__5 to i8*), i8* null, i8** [[TMP15]], i32 3)
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK7: omp.inner.for.inc:
-// CHECK7-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
-// CHECK7-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK7-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK7-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
-// CHECK7-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK7-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK7-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
-// CHECK7-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP22]], 9
-// CHECK7-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
-// CHECK7: cond.true5:
-// CHECK7-NEXT: br label [[COND_END7:%.*]]
-// CHECK7: cond.false6:
-// CHECK7-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: br label [[COND_END7]]
-// CHECK7: cond.end7:
-// CHECK7-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP23]], [[COND_FALSE6]] ]
-// CHECK7-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK7-NEXT: store i32 [[TMP24]], i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK7: omp.inner.for.end:
-// CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK7: omp.loop.exit:
-// CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
-// CHECK7-NEXT: ret void
-// CHECK7-LABEL: define {{[^@]+}}@__omp_outlined__5
-// CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
-// CHECK7-NEXT: entry:
-// CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
-// CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK7-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK7-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK7-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
-// CHECK7-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
-// CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK7-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
-// CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
-// CHECK7-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
-// CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK7-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
-// CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK7: omp.inner.for.cond:
-// CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK7-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP6]], [[TMP7]]
-// CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK7: omp.inner.for.body:
-// CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
-// CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4
-// CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
-// CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]]
-// CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
-// CHECK7-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP10]], 1
-// CHECK7-NEXT: store i32 [[ADD1]], i32* [[ARRAYIDX]], align 4
-// CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK7: omp.body.continue:
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK7: omp.inner.for.inc:
-// CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK7-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
-// CHECK7-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK7: omp.inner.for.end:
-// CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK7: omp.loop.exit:
-// CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
-// CHECK7-NEXT: ret void
-// CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l59
-// CHECK7-SAME: ([10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
-// CHECK7-NEXT: entry:
-// CHECK7-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK7-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[F_CASTED:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK7-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK7-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
-// CHECK7-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK7-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK7-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK7-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK7: .execute:
-// CHECK7-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[F_ADDR]], align 4
-// CHECK7-NEXT: store i32 [[TMP2]], i32* [[F_CASTED]], align 4
-// CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[F_CASTED]], align 4
-// CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK7-NEXT: call void @__omp_outlined__6(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x [10 x i32]]* [[TMP0]], i32 [[TMP3]]) #[[ATTR3]]
-// CHECK7-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK7: .omp.deinit:
-// CHECK7-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK7-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK7: .exit:
-// CHECK7-NEXT: ret void
-// CHECK7-LABEL: define {{[^@]+}}@__omp_outlined__6
-// CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
-// CHECK7-NEXT: entry:
-// CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK7-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK7-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[K:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[J:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[F_CASTED:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 4
-// CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK7-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK7-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
-// CHECK7-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK7-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK7-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK7-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK7-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
-// CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
-// CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK7: cond.true:
-// CHECK7-NEXT: br label [[COND_END:%.*]]
-// CHECK7: cond.false:
-// CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: br label [[COND_END]]
-// CHECK7: cond.end:
-// CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
-// CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK7: omp.inner.for.cond:
-// CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP6]], 100
-// CHECK7-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK7: omp.inner.for.body:
-// CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[F_ADDR]], align 4
-// CHECK7-NEXT: store i32 [[TMP9]], i32* [[F_CASTED]], align 4
-// CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[F_CASTED]], align 4
-// CHECK7-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK7-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP7]] to i8*
-// CHECK7-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 4
-// CHECK7-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK7-NEXT: [[TMP14:%.*]] = inttoptr i32 [[TMP8]] to i8*
-// CHECK7-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 4
-// CHECK7-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK7-NEXT: [[TMP16:%.*]] = bitcast [10 x [10 x i32]]* [[TMP0]] to i8*
-// CHECK7-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 4
-// CHECK7-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
-// CHECK7-NEXT: [[TMP18:%.*]] = inttoptr i32 [[TMP10]] to i8*
-// CHECK7-NEXT: store i8* [[TMP18]], i8** [[TMP17]], align 4
-// CHECK7-NEXT: [[TMP19:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK7-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, [10 x [10 x i32]]*, i32)* @__omp_outlined__7 to i8*), i8* null, i8** [[TMP19]], i32 4)
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK7: omp.inner.for.inc:
-// CHECK7-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
-// CHECK7-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK7-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK7-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
-// CHECK7-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK7-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK7-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
-// CHECK7-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP26]], 99
-// CHECK7-NEXT: br i1 [[CMP5]], label [[COND_TRUE6:%.*]], label [[COND_FALSE7:%.*]]
-// CHECK7: cond.true6:
-// CHECK7-NEXT: br label [[COND_END8:%.*]]
-// CHECK7: cond.false7:
-// CHECK7-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: br label [[COND_END8]]
-// CHECK7: cond.end8:
-// CHECK7-NEXT: [[COND9:%.*]] = phi i32 [ 99, [[COND_TRUE6]] ], [ [[TMP27]], [[COND_FALSE7]] ]
-// CHECK7-NEXT: store i32 [[COND9]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK7-NEXT: store i32 [[TMP28]], i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK7: omp.inner.for.end:
-// CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK7: omp.loop.exit:
-// CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
-// CHECK7-NEXT: ret void
-// CHECK7-LABEL: define {{[^@]+}}@__omp_outlined__7
-// CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
-// CHECK7-NEXT: entry:
-// CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK7-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[K:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[J:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK7-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK7-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK7-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK7-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
-// CHECK7-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK7-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
-// CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
-// CHECK7-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
-// CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK7-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
-// CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK7: omp.inner.for.cond:
-// CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK7-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP6]], [[TMP7]]
-// CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK7: omp.inner.for.body:
-// CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP8]], 10
-// CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
-// CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4
-// CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: [[DIV2:%.*]] = sdiv i32 [[TMP10]], 10
-// CHECK7-NEXT: [[MUL3:%.*]] = mul nsw i32 [[DIV2]], 10
-// CHECK7-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL3]]
-// CHECK7-NEXT: [[MUL4:%.*]] = mul nsw i32 [[SUB]], 1
-// CHECK7-NEXT: [[ADD5:%.*]] = add nsw i32 0, [[MUL4]]
-// CHECK7-NEXT: store i32 [[ADD5]], i32* [[J]], align 4
-// CHECK7-NEXT: store i32 10, i32* [[K]], align 4
-// CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
-// CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[J]], align 4
-// CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[F_ADDR]], align 4
-// CHECK7-NEXT: [[MUL6:%.*]] = mul nsw i32 [[TMP12]], [[TMP13]]
-// CHECK7-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP11]], [[MUL6]]
-// CHECK7-NEXT: [[TMP14:%.*]] = load i32, i32* [[K]], align 4
-// CHECK7-NEXT: [[ADD8:%.*]] = add nsw i32 [[ADD7]], [[TMP14]]
-// CHECK7-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4
-// CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [10 x i32]], [10 x [10 x i32]]* [[TMP0]], i32 0, i32 [[TMP15]]
-// CHECK7-NEXT: [[TMP16:%.*]] = load i32, i32* [[J]], align 4
-// CHECK7-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP16]]
-// CHECK7-NEXT: store i32 [[ADD8]], i32* [[ARRAYIDX9]], align 4
-// CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK7: omp.body.continue:
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK7: omp.inner.for.inc:
-// CHECK7-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK7-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
-// CHECK7-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK7: omp.inner.for.end:
-// CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK7: omp.loop.exit:
-// CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
-// CHECK7-NEXT: ret void
-// CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l67
-// CHECK7-SAME: (i32 [[N:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]]) #[[ATTR0]] {
-// CHECK7-NEXT: entry:
-// CHECK7-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK7-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK7-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK7-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK7-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK7-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK7-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK7-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK7: .execute:
-// CHECK7-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK7-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
-// CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK7-NEXT: call void @__omp_outlined__8(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP3]], [10 x [10 x i32]]* [[TMP0]]) #[[ATTR3]]
-// CHECK7-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK7: .omp.deinit:
-// CHECK7-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK7-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK7: .exit:
-// CHECK7-NEXT: ret void
-// CHECK7-LABEL: define {{[^@]+}}@__omp_outlined__8
-// CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]]) #[[ATTR0]] {
-// CHECK7-NEXT: entry:
-// CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK7-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
-// CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8
-// CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[J:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i64, align 8
-// CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i64, align 8
-// CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
-// CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[I9:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[J10:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 4
-// CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK7-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK7-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK7-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK7-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK7-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
-// CHECK7-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK7-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64
-// CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK7-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP4]], 0
-// CHECK7-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1
-// CHECK7-NEXT: [[CONV6:%.*]] = sext i32 [[DIV5]] to i64
-// CHECK7-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]]
-// CHECK7-NEXT: [[SUB7:%.*]] = sub nsw i64 [[MUL]], 1
-// CHECK7-NEXT: store i64 [[SUB7]], i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK7-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK7-NEXT: store i32 0, i32* [[J]], align 4
-// CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK7-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
-// CHECK7-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK7: land.lhs.true:
-// CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK7-NEXT: [[CMP8:%.*]] = icmp slt i32 0, [[TMP6]]
-// CHECK7-NEXT: br i1 [[CMP8]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
-// CHECK7: omp.precond.then:
-// CHECK7-NEXT: store i64 0, i64* [[DOTOMP_COMB_LB]], align 8
-// CHECK7-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK7-NEXT: store i64 [[TMP7]], i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK7-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8
-// CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK7-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK7-NEXT: [[CONV11:%.*]] = zext i32 [[NVPTX_NUM_THREADS]] to i64
-// CHECK7-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
-// CHECK7-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_COMB_LB]], i64* [[DOTOMP_COMB_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 [[CONV11]])
-// CHECK7-NEXT: [[TMP10:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK7-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK7-NEXT: [[CMP12:%.*]] = icmp sgt i64 [[TMP10]], [[TMP11]]
-// CHECK7-NEXT: br i1 [[CMP12]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK7: cond.true:
-// CHECK7-NEXT: [[TMP12:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK7-NEXT: br label [[COND_END:%.*]]
-// CHECK7: cond.false:
-// CHECK7-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK7-NEXT: br label [[COND_END]]
-// CHECK7: cond.end:
-// CHECK7-NEXT: [[COND:%.*]] = phi i64 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
-// CHECK7-NEXT: store i64 [[COND]], i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK7-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
-// CHECK7-NEXT: store i64 [[TMP14]], i64* [[DOTOMP_IV]], align 8
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK7: omp.inner.for.cond:
-// CHECK7-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK7-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK7-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP16]], 1
-// CHECK7-NEXT: [[CMP13:%.*]] = icmp slt i64 [[TMP15]], [[ADD]]
-// CHECK7-NEXT: br i1 [[CMP13]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK7: omp.inner.for.body:
-// CHECK7-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
-// CHECK7-NEXT: [[TMP18:%.*]] = trunc i64 [[TMP17]] to i32
-// CHECK7-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK7-NEXT: [[TMP20:%.*]] = trunc i64 [[TMP19]] to i32
-// CHECK7-NEXT: [[TMP21:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK7-NEXT: store i32 [[TMP21]], i32* [[N_CASTED]], align 4
-// CHECK7-NEXT: [[TMP22:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK7-NEXT: [[TMP23:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK7-NEXT: [[TMP24:%.*]] = inttoptr i32 [[TMP18]] to i8*
-// CHECK7-NEXT: store i8* [[TMP24]], i8** [[TMP23]], align 4
-// CHECK7-NEXT: [[TMP25:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK7-NEXT: [[TMP26:%.*]] = inttoptr i32 [[TMP20]] to i8*
-// CHECK7-NEXT: store i8* [[TMP26]], i8** [[TMP25]], align 4
-// CHECK7-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK7-NEXT: [[TMP28:%.*]] = inttoptr i32 [[TMP22]] to i8*
-// CHECK7-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 4
-// CHECK7-NEXT: [[TMP29:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
-// CHECK7-NEXT: [[TMP30:%.*]] = bitcast [10 x [10 x i32]]* [[TMP0]] to i8*
-// CHECK7-NEXT: store i8* [[TMP30]], i8** [[TMP29]], align 4
-// CHECK7-NEXT: [[TMP31:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK7-NEXT: [[TMP32:%.*]] = load i32, i32* [[TMP31]], align 4
-// CHECK7-NEXT: [[TMP33:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK7-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP32]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [10 x [10 x i32]]*)* @__omp_outlined__9 to i8*), i8* null, i8** [[TMP33]], i32 4)
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK7: omp.inner.for.inc:
-// CHECK7-NEXT: [[TMP34:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK7-NEXT: [[TMP35:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8
-// CHECK7-NEXT: [[ADD14:%.*]] = add nsw i64 [[TMP34]], [[TMP35]]
-// CHECK7-NEXT: store i64 [[ADD14]], i64* [[DOTOMP_IV]], align 8
-// CHECK7-NEXT: [[TMP36:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
-// CHECK7-NEXT: [[TMP37:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8
-// CHECK7-NEXT: [[ADD15:%.*]] = add nsw i64 [[TMP36]], [[TMP37]]
-// CHECK7-NEXT: store i64 [[ADD15]], i64* [[DOTOMP_COMB_LB]], align 8
-// CHECK7-NEXT: [[TMP38:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK7-NEXT: [[TMP39:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8
-// CHECK7-NEXT: [[ADD16:%.*]] = add nsw i64 [[TMP38]], [[TMP39]]
-// CHECK7-NEXT: store i64 [[ADD16]], i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK7-NEXT: [[TMP40:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK7-NEXT: [[TMP41:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK7-NEXT: [[CMP17:%.*]] = icmp sgt i64 [[TMP40]], [[TMP41]]
-// CHECK7-NEXT: br i1 [[CMP17]], label [[COND_TRUE18:%.*]], label [[COND_FALSE19:%.*]]
-// CHECK7: cond.true18:
-// CHECK7-NEXT: [[TMP42:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK7-NEXT: br label [[COND_END20:%.*]]
-// CHECK7: cond.false19:
-// CHECK7-NEXT: [[TMP43:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK7-NEXT: br label [[COND_END20]]
-// CHECK7: cond.end20:
-// CHECK7-NEXT: [[COND21:%.*]] = phi i64 [ [[TMP42]], [[COND_TRUE18]] ], [ [[TMP43]], [[COND_FALSE19]] ]
-// CHECK7-NEXT: store i64 [[COND21]], i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK7-NEXT: [[TMP44:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
-// CHECK7-NEXT: store i64 [[TMP44]], i64* [[DOTOMP_IV]], align 8
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK7: omp.inner.for.end:
-// CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK7: omp.loop.exit:
-// CHECK7-NEXT: [[TMP45:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK7-NEXT: [[TMP46:%.*]] = load i32, i32* [[TMP45]], align 4
-// CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP46]])
-// CHECK7-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK7: omp.precond.end:
-// CHECK7-NEXT: ret void
-// CHECK7-LABEL: define {{[^@]+}}@__omp_outlined__9
-// CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]]) #[[ATTR0]] {
-// CHECK7-NEXT: entry:
-// CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
-// CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8
-// CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[J:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8
-// CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8
-// CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
-// CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[I11:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[J12:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK7-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK7-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK7-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK7-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK7-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK7-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK7-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
-// CHECK7-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK7-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64
-// CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK7-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP4]], 0
-// CHECK7-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1
-// CHECK7-NEXT: [[CONV6:%.*]] = sext i32 [[DIV5]] to i64
-// CHECK7-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]]
-// CHECK7-NEXT: [[SUB7:%.*]] = sub nsw i64 [[MUL]], 1
-// CHECK7-NEXT: store i64 [[SUB7]], i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK7-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK7-NEXT: store i32 0, i32* [[J]], align 4
-// CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK7-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
-// CHECK7-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK7: land.lhs.true:
-// CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK7-NEXT: [[CMP8:%.*]] = icmp slt i32 0, [[TMP6]]
-// CHECK7-NEXT: br i1 [[CMP8]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
-// CHECK7: omp.precond.then:
-// CHECK7-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8
-// CHECK7-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK7-NEXT: store i64 [[TMP7]], i64* [[DOTOMP_UB]], align 8
-// CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK7-NEXT: [[CONV9:%.*]] = zext i32 [[TMP8]] to i64
-// CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK7-NEXT: [[CONV10:%.*]] = zext i32 [[TMP9]] to i64
-// CHECK7-NEXT: store i64 [[CONV9]], i64* [[DOTOMP_LB]], align 8
-// CHECK7-NEXT: store i64 [[CONV10]], i64* [[DOTOMP_UB]], align 8
-// CHECK7-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8
-// CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK7-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
-// CHECK7-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 33, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_LB]], i64* [[DOTOMP_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1)
-// CHECK7-NEXT: [[TMP12:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8
-// CHECK7-NEXT: store i64 [[TMP12]], i64* [[DOTOMP_IV]], align 8
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK7: omp.inner.for.cond:
-// CHECK7-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK7-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK7-NEXT: [[CONV13:%.*]] = zext i32 [[TMP14]] to i64
-// CHECK7-NEXT: [[CMP14:%.*]] = icmp sle i64 [[TMP13]], [[CONV13]]
-// CHECK7-NEXT: br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK7: omp.inner.for.body:
-// CHECK7-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK7-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK7-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP16]], 0
-// CHECK7-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1
-// CHECK7-NEXT: [[MUL17:%.*]] = mul nsw i32 1, [[DIV16]]
-// CHECK7-NEXT: [[CONV18:%.*]] = sext i32 [[MUL17]] to i64
-// CHECK7-NEXT: [[DIV19:%.*]] = sdiv i64 [[TMP15]], [[CONV18]]
-// CHECK7-NEXT: [[MUL20:%.*]] = mul nsw i64 [[DIV19]], 1
-// CHECK7-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL20]]
-// CHECK7-NEXT: [[CONV21:%.*]] = trunc i64 [[ADD]] to i32
-// CHECK7-NEXT: store i32 [[CONV21]], i32* [[I11]], align 4
-// CHECK7-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK7-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK7-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK7-NEXT: [[SUB22:%.*]] = sub nsw i32 [[TMP19]], 0
-// CHECK7-NEXT: [[DIV23:%.*]] = sdiv i32 [[SUB22]], 1
-// CHECK7-NEXT: [[MUL24:%.*]] = mul nsw i32 1, [[DIV23]]
-// CHECK7-NEXT: [[CONV25:%.*]] = sext i32 [[MUL24]] to i64
-// CHECK7-NEXT: [[DIV26:%.*]] = sdiv i64 [[TMP18]], [[CONV25]]
-// CHECK7-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK7-NEXT: [[SUB27:%.*]] = sub nsw i32 [[TMP20]], 0
-// CHECK7-NEXT: [[DIV28:%.*]] = sdiv i32 [[SUB27]], 1
-// CHECK7-NEXT: [[MUL29:%.*]] = mul nsw i32 1, [[DIV28]]
-// CHECK7-NEXT: [[CONV30:%.*]] = sext i32 [[MUL29]] to i64
-// CHECK7-NEXT: [[MUL31:%.*]] = mul nsw i64 [[DIV26]], [[CONV30]]
-// CHECK7-NEXT: [[SUB32:%.*]] = sub nsw i64 [[TMP17]], [[MUL31]]
-// CHECK7-NEXT: [[MUL33:%.*]] = mul nsw i64 [[SUB32]], 1
-// CHECK7-NEXT: [[ADD34:%.*]] = add nsw i64 0, [[MUL33]]
-// CHECK7-NEXT: [[CONV35:%.*]] = trunc i64 [[ADD34]] to i32
-// CHECK7-NEXT: store i32 [[CONV35]], i32* [[J12]], align 4
-// CHECK7-NEXT: [[TMP21:%.*]] = load i32, i32* [[I11]], align 4
-// CHECK7-NEXT: [[TMP22:%.*]] = load i32, i32* [[J12]], align 4
-// CHECK7-NEXT: [[ADD36:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
-// CHECK7-NEXT: [[TMP23:%.*]] = load i32, i32* [[I11]], align 4
-// CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [10 x i32]], [10 x [10 x i32]]* [[TMP0]], i32 0, i32 [[TMP23]]
-// CHECK7-NEXT: [[TMP24:%.*]] = load i32, i32* [[J12]], align 4
-// CHECK7-NEXT: [[ARRAYIDX37:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP24]]
-// CHECK7-NEXT: store i32 [[ADD36]], i32* [[ARRAYIDX37]], align 4
-// CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK7: omp.body.continue:
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK7: omp.inner.for.inc:
-// CHECK7-NEXT: [[TMP25:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK7-NEXT: [[TMP26:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8
-// CHECK7-NEXT: [[ADD38:%.*]] = add nsw i64 [[TMP25]], [[TMP26]]
-// CHECK7-NEXT: store i64 [[ADD38]], i64* [[DOTOMP_IV]], align 8
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK7: omp.inner.for.end:
-// CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK7: omp.loop.exit:
-// CHECK7-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK7-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4
-// CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP28]])
-// CHECK7-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK7: omp.precond.end:
-// CHECK7-NEXT: ret void
-// CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l74
-// CHECK7-SAME: (i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* [[V:%.*]]) #[[ATTR0]] {
-// CHECK7-NEXT: entry:
-// CHECK7-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK7-NEXT: [[V_ADDR:%.*]] = alloca i32*, align 4
-// CHECK7-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK7-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK7-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK7-NEXT: store i32* [[V]], i32** [[V_ADDR]], align 4
-// CHECK7-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK7-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK7-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK7-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK7: .execute:
-// CHECK7-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK7-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
-// CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK7-NEXT: [[TMP4:%.*]] = load i32*, i32** [[V_ADDR]], align 4
-// CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK7-NEXT: call void @__omp_outlined__10(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP3]], [1000 x i32]* [[TMP0]], i32* [[TMP4]]) #[[ATTR3]]
-// CHECK7-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK7: .omp.deinit:
-// CHECK7-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK7-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK7: .exit:
-// CHECK7-NEXT: ret void
-// CHECK7-LABEL: define {{[^@]+}}@__omp_outlined__10
-// CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* [[V:%.*]]) #[[ATTR0]] {
-// CHECK7-NEXT: entry:
-// CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK7-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK7-NEXT: [[V_ADDR:%.*]] = alloca i32*, align 4
-// CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [5 x i8*], align 4
-// CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK7-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK7-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK7-NEXT: store i32* [[V]], i32** [[V_ADDR]], align 4
-// CHECK7-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK7-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK7-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK7-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK7-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK7-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK7-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK7-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK7: omp.precond.then:
-// CHECK7-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK7-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK7-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK7-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
-// CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK7-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
-// CHECK7-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK7: cond.true:
-// CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK7-NEXT: br label [[COND_END:%.*]]
-// CHECK7: cond.false:
-// CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: br label [[COND_END]]
-// CHECK7: cond.end:
-// CHECK7-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
-// CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK7-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK7: omp.inner.for.cond:
-// CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1
-// CHECK7-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]
-// CHECK7-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK7: omp.inner.for.body:
-// CHECK7-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK7-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: [[TMP16:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK7-NEXT: store i32 [[TMP16]], i32* [[N_CASTED]], align 4
-// CHECK7-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK7-NEXT: [[TMP18:%.*]] = load i32*, i32** [[V_ADDR]], align 4
-// CHECK7-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK7-NEXT: [[TMP20:%.*]] = inttoptr i32 [[TMP14]] to i8*
-// CHECK7-NEXT: store i8* [[TMP20]], i8** [[TMP19]], align 4
-// CHECK7-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK7-NEXT: [[TMP22:%.*]] = inttoptr i32 [[TMP15]] to i8*
-// CHECK7-NEXT: store i8* [[TMP22]], i8** [[TMP21]], align 4
-// CHECK7-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK7-NEXT: [[TMP24:%.*]] = inttoptr i32 [[TMP17]] to i8*
-// CHECK7-NEXT: store i8* [[TMP24]], i8** [[TMP23]], align 4
-// CHECK7-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
-// CHECK7-NEXT: [[TMP26:%.*]] = bitcast [1000 x i32]* [[TMP0]] to i8*
-// CHECK7-NEXT: store i8* [[TMP26]], i8** [[TMP25]], align 4
-// CHECK7-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 4
-// CHECK7-NEXT: [[TMP28:%.*]] = bitcast i32* [[TMP18]] to i8*
-// CHECK7-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 4
-// CHECK7-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK7-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4
-// CHECK7-NEXT: [[TMP31:%.*]] = bitcast [5 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK7-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP30]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i32]*, i32*)* @__omp_outlined__11 to i8*), i8* null, i8** [[TMP31]], i32 5)
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK7: omp.inner.for.inc:
-// CHECK7-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK7-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP32]], [[TMP33]]
-// CHECK7-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK7-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK7-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP34]], [[TMP35]]
-// CHECK7-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK7-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK7-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP36]], [[TMP37]]
-// CHECK7-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK7-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP38]], [[TMP39]]
-// CHECK7-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]]
-// CHECK7: cond.true10:
-// CHECK7-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK7-NEXT: br label [[COND_END12:%.*]]
-// CHECK7: cond.false11:
-// CHECK7-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: br label [[COND_END12]]
-// CHECK7: cond.end12:
-// CHECK7-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP40]], [[COND_TRUE10]] ], [ [[TMP41]], [[COND_FALSE11]] ]
-// CHECK7-NEXT: store i32 [[COND13]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK7-NEXT: store i32 [[TMP42]], i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK7: omp.inner.for.end:
-// CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK7: omp.loop.exit:
-// CHECK7-NEXT: [[TMP43:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK7-NEXT: [[TMP44:%.*]] = load i32, i32* [[TMP43]], align 4
-// CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP44]])
-// CHECK7-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK7: omp.precond.end:
-// CHECK7-NEXT: ret void
-// CHECK7-LABEL: define {{[^@]+}}@__omp_outlined__11
-// CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* [[V:%.*]]) #[[ATTR0]] {
-// CHECK7-NEXT: entry:
-// CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK7-NEXT: [[V_ADDR:%.*]] = alloca i32*, align 4
-// CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK7-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK7-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK7-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK7-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK7-NEXT: store i32* [[V]], i32** [[V_ADDR]], align 4
-// CHECK7-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK7-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK7-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK7-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK7-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK7-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK7-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK7-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK7: omp.precond.then:
-// CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK7-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
-// CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
-// CHECK7-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
-// CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK7-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK7-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK7: omp.inner.for.cond:
-// CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK7-NEXT: [[CMP4:%.*]] = icmp ule i32 [[TMP10]], [[TMP11]]
-// CHECK7-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK7: omp.inner.for.body:
-// CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
-// CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK7-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
-// CHECK7-NEXT: [[TMP13:%.*]] = load i32*, i32** [[V_ADDR]], align 4
-// CHECK7-NEXT: [[TMP14:%.*]] = load i32, i32* [[I3]], align 4
-// CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP13]], i32 [[TMP14]]
-// CHECK7-NEXT: [[TMP15:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
-// CHECK7-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4
-// CHECK7-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 [[TMP16]]
-// CHECK7-NEXT: store i32 [[TMP15]], i32* [[ARRAYIDX5]], align 4
-// CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK7: omp.body.continue:
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK7: omp.inner.for.inc:
-// CHECK7-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK7-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
-// CHECK7-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK7: omp.inner.for.end:
-// CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK7: omp.loop.exit:
-// CHECK7-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK7-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4
-// CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]])
-// CHECK7-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK7: omp.precond.end:
-// CHECK7-NEXT: ret void
-// CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l43
-// CHECK8-SAME: (i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0:[0-9]+]] {
-// CHECK8-NEXT: entry:
-// CHECK8-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK8-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[L_CASTED:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK8-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK8-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK8-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
-// CHECK8-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK8-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK8-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK8-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK8: .execute:
-// CHECK8-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]])
-// CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK8-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
-// CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[L_ADDR]], align 4
-// CHECK8-NEXT: store i32 [[TMP4]], i32* [[L_CASTED]], align 4
-// CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[L_CASTED]], align 4
-// CHECK8-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK8-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP3]], [1000 x i32]* [[TMP0]], i32 [[TMP5]]) #[[ATTR3:[0-9]+]]
-// CHECK8-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK8: .omp.deinit:
-// CHECK8-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK8-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK8: .exit:
-// CHECK8-NEXT: ret void
-// CHECK8-LABEL: define {{[^@]+}}@__omp_outlined__
-// CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0]] {
-// CHECK8-NEXT: entry:
-// CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK8-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK8-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[I4:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[L_CASTED:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [5 x i8*], align 4
-// CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK8-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK8-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK8-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
-// CHECK8-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK8-NEXT: [[TMP1:%.*]] = call i8* @__kmpc_data_sharing_push_stack(i32 4, i16 1)
-// CHECK8-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to %struct._globalized_locals_ty*
-// CHECK8-NEXT: [[L1:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY:%.*]], %struct._globalized_locals_ty* [[TMP2]], i32 0, i32 0
-// CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK8-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK8-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
-// CHECK8-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK8-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK8-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK8-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK8-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
-// CHECK8-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK8: omp.precond.then:
-// CHECK8-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK8-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK8-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 128)
-// CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK8-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
-// CHECK8-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK8: cond.true:
-// CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK8-NEXT: br label [[COND_END:%.*]]
-// CHECK8: cond.false:
-// CHECK8-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: br label [[COND_END]]
-// CHECK8: cond.end:
-// CHECK8-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
-// CHECK8-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK8-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK8: omp.inner.for.cond:
-// CHECK8-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], 1
-// CHECK8-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP14]], [[ADD]]
-// CHECK8-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK8: omp.inner.for.body:
-// CHECK8-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK8-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: [[TMP18:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK8-NEXT: store i32 [[TMP18]], i32* [[N_CASTED]], align 4
-// CHECK8-NEXT: [[TMP19:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK8-NEXT: [[TMP20:%.*]] = load i32, i32* [[L_ADDR]], align 4
-// CHECK8-NEXT: store i32 [[TMP20]], i32* [[L_CASTED]], align 4
-// CHECK8-NEXT: [[TMP21:%.*]] = load i32, i32* [[L_CASTED]], align 4
-// CHECK8-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK8-NEXT: [[TMP23:%.*]] = inttoptr i32 [[TMP16]] to i8*
-// CHECK8-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 4
-// CHECK8-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK8-NEXT: [[TMP25:%.*]] = inttoptr i32 [[TMP17]] to i8*
-// CHECK8-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 4
-// CHECK8-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK8-NEXT: [[TMP27:%.*]] = inttoptr i32 [[TMP19]] to i8*
-// CHECK8-NEXT: store i8* [[TMP27]], i8** [[TMP26]], align 4
-// CHECK8-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
-// CHECK8-NEXT: [[TMP29:%.*]] = bitcast [1000 x i32]* [[TMP0]] to i8*
-// CHECK8-NEXT: store i8* [[TMP29]], i8** [[TMP28]], align 4
-// CHECK8-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 4
-// CHECK8-NEXT: [[TMP31:%.*]] = inttoptr i32 [[TMP21]] to i8*
-// CHECK8-NEXT: store i8* [[TMP31]], i8** [[TMP30]], align 4
-// CHECK8-NEXT: [[TMP32:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK8-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4
-// CHECK8-NEXT: [[TMP34:%.*]] = bitcast [5 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK8-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP33]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i32]*, i32)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP34]], i32 5)
-// CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK8: omp.inner.for.inc:
-// CHECK8-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK8-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP35]], [[TMP36]]
-// CHECK8-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK8-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK8-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP37]], [[TMP38]]
-// CHECK8-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK8-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK8-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP39]], [[TMP40]]
-// CHECK8-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK8-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP41]], [[TMP42]]
-// CHECK8-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
-// CHECK8: cond.true11:
-// CHECK8-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK8-NEXT: br label [[COND_END13:%.*]]
-// CHECK8: cond.false12:
-// CHECK8-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: br label [[COND_END13]]
-// CHECK8: cond.end13:
-// CHECK8-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP43]], [[COND_TRUE11]] ], [ [[TMP44]], [[COND_FALSE12]] ]
-// CHECK8-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK8-NEXT: store i32 [[TMP45]], i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK8: omp.inner.for.end:
-// CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK8: omp.loop.exit:
-// CHECK8-NEXT: [[TMP46:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK8-NEXT: [[TMP47:%.*]] = load i32, i32* [[TMP46]], align 4
-// CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP47]])
-// CHECK8-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK8-NEXT: [[TMP49:%.*]] = icmp ne i32 [[TMP48]], 0
-// CHECK8-NEXT: br i1 [[TMP49]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
-// CHECK8: .omp.lastprivate.then:
-// CHECK8-NEXT: [[TMP50:%.*]] = load i32, i32* [[L_ADDR]], align 4
-// CHECK8-NEXT: store i32 [[TMP50]], i32* [[L_ADDR]], align 4
-// CHECK8-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
-// CHECK8: .omp.lastprivate.done:
-// CHECK8-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK8: omp.precond.end:
-// CHECK8-NEXT: call void @__kmpc_data_sharing_pop_stack(i8* [[TMP1]])
-// CHECK8-NEXT: ret void
-// CHECK8-LABEL: define {{[^@]+}}@__omp_outlined__1
-// CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0]] {
-// CHECK8-NEXT: entry:
-// CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK8-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK8-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK8-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK8-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK8-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK8-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK8-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
-// CHECK8-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK8-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK8-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK8-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK8-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK8-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK8-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK8-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK8-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK8-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK8: omp.precond.then:
-// CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK8-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
-// CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK8-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
-// CHECK8-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
-// CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK8-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 32)
-// CHECK8-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
-// CHECK8: omp.dispatch.cond:
-// CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK8-NEXT: [[CMP4:%.*]] = icmp ugt i32 [[TMP9]], [[TMP10]]
-// CHECK8-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK8: cond.true:
-// CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK8-NEXT: br label [[COND_END:%.*]]
-// CHECK8: cond.false:
-// CHECK8-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK8-NEXT: br label [[COND_END]]
-// CHECK8: cond.end:
-// CHECK8-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
-// CHECK8-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
-// CHECK8-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK8-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK8-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
-// CHECK8-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
-// CHECK8: omp.dispatch.body:
-// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK8: omp.inner.for.cond:
-// CHECK8-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK8-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
-// CHECK8-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK8: omp.inner.for.body:
-// CHECK8-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
-// CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK8-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
-// CHECK8-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4
-// CHECK8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 [[TMP19]]
-// CHECK8-NEXT: store i32 1, i32* [[ARRAYIDX]], align 4
-// CHECK8-NEXT: [[TMP20:%.*]] = load i32, i32* [[I3]], align 4
-// CHECK8-NEXT: store i32 [[TMP20]], i32* [[L_ADDR]], align 4
-// CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK8: omp.body.continue:
-// CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK8: omp.inner.for.inc:
-// CHECK8-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP21]], 1
-// CHECK8-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK8: omp.inner.for.end:
-// CHECK8-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
-// CHECK8: omp.dispatch.inc:
-// CHECK8-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK8-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK8-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
-// CHECK8-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4
-// CHECK8-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK8-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK8-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
-// CHECK8-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4
-// CHECK8-NEXT: br label [[OMP_DISPATCH_COND]]
-// CHECK8: omp.dispatch.end:
-// CHECK8-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK8-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
-// CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP27]])
-// CHECK8-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK8-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
-// CHECK8-NEXT: br i1 [[TMP29]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
-// CHECK8: .omp.lastprivate.then:
-// CHECK8-NEXT: [[TMP30:%.*]] = load i32, i32* [[L_ADDR]], align 4
-// CHECK8-NEXT: store i32 [[TMP30]], i32* [[L_ADDR]], align 4
-// CHECK8-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
-// CHECK8: .omp.lastprivate.done:
-// CHECK8-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK8: omp.precond.end:
-// CHECK8-NEXT: ret void
-// CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l49
-// CHECK8-SAME: (i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
-// CHECK8-NEXT: entry:
-// CHECK8-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
-// CHECK8-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK8-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK8-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK8-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK8-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK8-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK8-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK8: .execute:
-// CHECK8-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK8-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
-// CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK8-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK8-NEXT: call void @__omp_outlined__2(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP3]], [1000 x i16]* [[TMP0]]) #[[ATTR3]]
-// CHECK8-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK8: .omp.deinit:
-// CHECK8-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK8-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK8: .exit:
-// CHECK8-NEXT: ret void
-// CHECK8-LABEL: define {{[^@]+}}@__omp_outlined__2
-// CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
-// CHECK8-NEXT: entry:
-// CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK8-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
-// CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 4
-// CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK8-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK8-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK8-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK8-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK8-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK8-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK8-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK8-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK8-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK8-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK8-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK8-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK8: omp.precond.then:
-// CHECK8-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK8-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK8-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK8-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
-// CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK8-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
-// CHECK8-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK8: cond.true:
-// CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK8-NEXT: br label [[COND_END:%.*]]
-// CHECK8: cond.false:
-// CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: br label [[COND_END]]
-// CHECK8: cond.end:
-// CHECK8-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
-// CHECK8-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK8-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK8: omp.inner.for.cond:
-// CHECK8-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1
-// CHECK8-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]
-// CHECK8-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK8: omp.inner.for.body:
-// CHECK8-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK8-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: [[TMP16:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK8-NEXT: store i32 [[TMP16]], i32* [[N_CASTED]], align 4
-// CHECK8-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK8-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK8-NEXT: [[TMP19:%.*]] = inttoptr i32 [[TMP14]] to i8*
-// CHECK8-NEXT: store i8* [[TMP19]], i8** [[TMP18]], align 4
-// CHECK8-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK8-NEXT: [[TMP21:%.*]] = inttoptr i32 [[TMP15]] to i8*
-// CHECK8-NEXT: store i8* [[TMP21]], i8** [[TMP20]], align 4
-// CHECK8-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK8-NEXT: [[TMP23:%.*]] = inttoptr i32 [[TMP17]] to i8*
-// CHECK8-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 4
-// CHECK8-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
-// CHECK8-NEXT: [[TMP25:%.*]] = bitcast [1000 x i16]* [[TMP0]] to i8*
-// CHECK8-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 4
-// CHECK8-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK8-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
-// CHECK8-NEXT: [[TMP28:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK8-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP27]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i16]*)* @__omp_outlined__3 to i8*), i8* null, i8** [[TMP28]], i32 4)
-// CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK8: omp.inner.for.inc:
-// CHECK8-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK8-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP29]], [[TMP30]]
-// CHECK8-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK8-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK8-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP31]], [[TMP32]]
-// CHECK8-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK8-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK8-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP33]], [[TMP34]]
-// CHECK8-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK8-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP35]], [[TMP36]]
-// CHECK8-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]]
-// CHECK8: cond.true10:
-// CHECK8-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK8-NEXT: br label [[COND_END12:%.*]]
-// CHECK8: cond.false11:
-// CHECK8-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: br label [[COND_END12]]
-// CHECK8: cond.end12:
-// CHECK8-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP37]], [[COND_TRUE10]] ], [ [[TMP38]], [[COND_FALSE11]] ]
-// CHECK8-NEXT: store i32 [[COND13]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK8-NEXT: store i32 [[TMP39]], i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK8: omp.inner.for.end:
-// CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK8: omp.loop.exit:
-// CHECK8-NEXT: [[TMP40:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK8-NEXT: [[TMP41:%.*]] = load i32, i32* [[TMP40]], align 4
-// CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP41]])
-// CHECK8-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK8: omp.precond.end:
-// CHECK8-NEXT: ret void
-// CHECK8-LABEL: define {{[^@]+}}@__omp_outlined__3
-// CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
-// CHECK8-NEXT: entry:
-// CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK8-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
-// CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK8-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK8-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK8-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK8-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK8-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK8-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK8-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK8-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK8-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK8-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK8-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK8-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK8-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK8-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK8: omp.precond.then:
-// CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK8-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
-// CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK8-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
-// CHECK8-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
-// CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK8-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK8-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK8: omp.inner.for.cond:
-// CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK8-NEXT: [[CMP4:%.*]] = icmp ule i32 [[TMP10]], [[TMP11]]
-// CHECK8-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK8: omp.inner.for.body:
-// CHECK8-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
-// CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK8-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
-// CHECK8-NEXT: [[TMP13:%.*]] = load i32, i32* [[I3]], align 4
-// CHECK8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i16], [1000 x i16]* [[TMP0]], i32 0, i32 [[TMP13]]
-// CHECK8-NEXT: [[TMP14:%.*]] = load i16, i16* [[ARRAYIDX]], align 2
-// CHECK8-NEXT: [[CONV:%.*]] = sext i16 [[TMP14]] to i32
-// CHECK8-NEXT: [[ADD5:%.*]] = add nsw i32 [[CONV]], 1
-// CHECK8-NEXT: [[CONV6:%.*]] = trunc i32 [[ADD5]] to i16
-// CHECK8-NEXT: store i16 [[CONV6]], i16* [[ARRAYIDX]], align 2
-// CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK8: omp.body.continue:
-// CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK8: omp.inner.for.inc:
-// CHECK8-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK8-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
-// CHECK8-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK8: omp.inner.for.end:
-// CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK8: omp.loop.exit:
-// CHECK8-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK8-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
-// CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]])
-// CHECK8-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK8: omp.precond.end:
-// CHECK8-NEXT: ret void
-// CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l54
-// CHECK8-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
-// CHECK8-NEXT: entry:
-// CHECK8-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
-// CHECK8-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK8-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
-// CHECK8-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
-// CHECK8-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK8-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK8-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK8: .execute:
-// CHECK8-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK8-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK8-NEXT: call void @__omp_outlined__4(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x i32]* [[TMP0]]) #[[ATTR3]]
-// CHECK8-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK8: .omp.deinit:
-// CHECK8-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK8-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK8: .exit:
-// CHECK8-NEXT: ret void
-// CHECK8-LABEL: define {{[^@]+}}@__omp_outlined__4
-// CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
-// CHECK8-NEXT: entry:
-// CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK8-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
-// CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [3 x i8*], align 4
-// CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK8-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
-// CHECK8-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
-// CHECK8-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK8-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK8-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK8-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
-// CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
-// CHECK8-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK8: cond.true:
-// CHECK8-NEXT: br label [[COND_END:%.*]]
-// CHECK8: cond.false:
-// CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: br label [[COND_END]]
-// CHECK8: cond.end:
-// CHECK8-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
-// CHECK8-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK8-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK8: omp.inner.for.cond:
-// CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP6]], 10
-// CHECK8-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK8: omp.inner.for.body:
-// CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK8-NEXT: [[TMP10:%.*]] = inttoptr i32 [[TMP7]] to i8*
-// CHECK8-NEXT: store i8* [[TMP10]], i8** [[TMP9]], align 4
-// CHECK8-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK8-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP8]] to i8*
-// CHECK8-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 4
-// CHECK8-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK8-NEXT: [[TMP14:%.*]] = bitcast [10 x i32]* [[TMP0]] to i8*
-// CHECK8-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 4
-// CHECK8-NEXT: [[TMP15:%.*]] = bitcast [3 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK8-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @__omp_outlined__5 to i8*), i8* null, i8** [[TMP15]], i32 3)
-// CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK8: omp.inner.for.inc:
-// CHECK8-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
-// CHECK8-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK8-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK8-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
-// CHECK8-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK8-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK8-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
-// CHECK8-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP22]], 9
-// CHECK8-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
-// CHECK8: cond.true5:
-// CHECK8-NEXT: br label [[COND_END7:%.*]]
-// CHECK8: cond.false6:
-// CHECK8-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: br label [[COND_END7]]
-// CHECK8: cond.end7:
-// CHECK8-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP23]], [[COND_FALSE6]] ]
-// CHECK8-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK8-NEXT: store i32 [[TMP24]], i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK8: omp.inner.for.end:
-// CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK8: omp.loop.exit:
-// CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
-// CHECK8-NEXT: ret void
-// CHECK8-LABEL: define {{[^@]+}}@__omp_outlined__5
-// CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
-// CHECK8-NEXT: entry:
-// CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK8-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
-// CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK8-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK8-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK8-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
-// CHECK8-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
-// CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK8-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
-// CHECK8-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK8-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
-// CHECK8-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
-// CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK8-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
-// CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK8-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK8: omp.inner.for.cond:
-// CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK8-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP6]], [[TMP7]]
-// CHECK8-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK8: omp.inner.for.body:
-// CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
-// CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK8-NEXT: store i32 [[ADD]], i32* [[I]], align 4
-// CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
-// CHECK8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]]
-// CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
-// CHECK8-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP10]], 1
-// CHECK8-NEXT: store i32 [[ADD1]], i32* [[ARRAYIDX]], align 4
-// CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK8: omp.body.continue:
-// CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK8: omp.inner.for.inc:
-// CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK8-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
-// CHECK8-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK8: omp.inner.for.end:
-// CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK8: omp.loop.exit:
-// CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
-// CHECK8-NEXT: ret void
-// CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l59
-// CHECK8-SAME: ([10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
-// CHECK8-NEXT: entry:
-// CHECK8-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK8-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[F_CASTED:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK8-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK8-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
-// CHECK8-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK8-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK8-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK8-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK8: .execute:
-// CHECK8-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[F_ADDR]], align 4
-// CHECK8-NEXT: store i32 [[TMP2]], i32* [[F_CASTED]], align 4
-// CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[F_CASTED]], align 4
-// CHECK8-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK8-NEXT: call void @__omp_outlined__6(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x [10 x i32]]* [[TMP0]], i32 [[TMP3]]) #[[ATTR3]]
-// CHECK8-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK8: .omp.deinit:
-// CHECK8-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK8-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK8: .exit:
-// CHECK8-NEXT: ret void
-// CHECK8-LABEL: define {{[^@]+}}@__omp_outlined__6
-// CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
-// CHECK8-NEXT: entry:
-// CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK8-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK8-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[K:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[J:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[F_CASTED:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 4
-// CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK8-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK8-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
-// CHECK8-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK8-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK8-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK8-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK8-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
-// CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
-// CHECK8-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK8: cond.true:
-// CHECK8-NEXT: br label [[COND_END:%.*]]
-// CHECK8: cond.false:
-// CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: br label [[COND_END]]
-// CHECK8: cond.end:
-// CHECK8-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
-// CHECK8-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK8-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK8: omp.inner.for.cond:
-// CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP6]], 100
-// CHECK8-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK8: omp.inner.for.body:
-// CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[F_ADDR]], align 4
-// CHECK8-NEXT: store i32 [[TMP9]], i32* [[F_CASTED]], align 4
-// CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[F_CASTED]], align 4
-// CHECK8-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK8-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP7]] to i8*
-// CHECK8-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 4
-// CHECK8-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK8-NEXT: [[TMP14:%.*]] = inttoptr i32 [[TMP8]] to i8*
-// CHECK8-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 4
-// CHECK8-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK8-NEXT: [[TMP16:%.*]] = bitcast [10 x [10 x i32]]* [[TMP0]] to i8*
-// CHECK8-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 4
-// CHECK8-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
-// CHECK8-NEXT: [[TMP18:%.*]] = inttoptr i32 [[TMP10]] to i8*
-// CHECK8-NEXT: store i8* [[TMP18]], i8** [[TMP17]], align 4
-// CHECK8-NEXT: [[TMP19:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK8-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, [10 x [10 x i32]]*, i32)* @__omp_outlined__7 to i8*), i8* null, i8** [[TMP19]], i32 4)
-// CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK8: omp.inner.for.inc:
-// CHECK8-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
-// CHECK8-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK8-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK8-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
-// CHECK8-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK8-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK8-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
-// CHECK8-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP26]], 99
-// CHECK8-NEXT: br i1 [[CMP5]], label [[COND_TRUE6:%.*]], label [[COND_FALSE7:%.*]]
-// CHECK8: cond.true6:
-// CHECK8-NEXT: br label [[COND_END8:%.*]]
-// CHECK8: cond.false7:
-// CHECK8-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: br label [[COND_END8]]
-// CHECK8: cond.end8:
-// CHECK8-NEXT: [[COND9:%.*]] = phi i32 [ 99, [[COND_TRUE6]] ], [ [[TMP27]], [[COND_FALSE7]] ]
-// CHECK8-NEXT: store i32 [[COND9]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK8-NEXT: store i32 [[TMP28]], i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK8: omp.inner.for.end:
-// CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK8: omp.loop.exit:
-// CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
-// CHECK8-NEXT: ret void
-// CHECK8-LABEL: define {{[^@]+}}@__omp_outlined__7
-// CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
-// CHECK8-NEXT: entry:
-// CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK8-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK8-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[K:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[J:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK8-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK8-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK8-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK8-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
-// CHECK8-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK8-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
-// CHECK8-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK8-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
-// CHECK8-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
-// CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK8-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
-// CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK8-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK8: omp.inner.for.cond:
-// CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK8-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP6]], [[TMP7]]
-// CHECK8-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK8: omp.inner.for.body:
-// CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP8]], 10
-// CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
-// CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK8-NEXT: store i32 [[ADD]], i32* [[I]], align 4
-// CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: [[DIV2:%.*]] = sdiv i32 [[TMP10]], 10
-// CHECK8-NEXT: [[MUL3:%.*]] = mul nsw i32 [[DIV2]], 10
-// CHECK8-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL3]]
-// CHECK8-NEXT: [[MUL4:%.*]] = mul nsw i32 [[SUB]], 1
-// CHECK8-NEXT: [[ADD5:%.*]] = add nsw i32 0, [[MUL4]]
-// CHECK8-NEXT: store i32 [[ADD5]], i32* [[J]], align 4
-// CHECK8-NEXT: store i32 10, i32* [[K]], align 4
-// CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
-// CHECK8-NEXT: [[TMP12:%.*]] = load i32, i32* [[J]], align 4
-// CHECK8-NEXT: [[TMP13:%.*]] = load i32, i32* [[F_ADDR]], align 4
-// CHECK8-NEXT: [[MUL6:%.*]] = mul nsw i32 [[TMP12]], [[TMP13]]
-// CHECK8-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP11]], [[MUL6]]
-// CHECK8-NEXT: [[TMP14:%.*]] = load i32, i32* [[K]], align 4
-// CHECK8-NEXT: [[ADD8:%.*]] = add nsw i32 [[ADD7]], [[TMP14]]
-// CHECK8-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4
-// CHECK8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [10 x i32]], [10 x [10 x i32]]* [[TMP0]], i32 0, i32 [[TMP15]]
-// CHECK8-NEXT: [[TMP16:%.*]] = load i32, i32* [[J]], align 4
-// CHECK8-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP16]]
-// CHECK8-NEXT: store i32 [[ADD8]], i32* [[ARRAYIDX9]], align 4
-// CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK8: omp.body.continue:
-// CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK8: omp.inner.for.inc:
-// CHECK8-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK8-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
-// CHECK8-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK8: omp.inner.for.end:
-// CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK8: omp.loop.exit:
-// CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
-// CHECK8-NEXT: ret void
-// CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l67
-// CHECK8-SAME: (i32 [[N:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]]) #[[ATTR0]] {
-// CHECK8-NEXT: entry:
-// CHECK8-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK8-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK8-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK8-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK8-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK8-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK8-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK8-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK8: .execute:
-// CHECK8-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK8-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
-// CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK8-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK8-NEXT: call void @__omp_outlined__8(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP3]], [10 x [10 x i32]]* [[TMP0]]) #[[ATTR3]]
-// CHECK8-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK8: .omp.deinit:
-// CHECK8-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK8-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK8: .exit:
-// CHECK8-NEXT: ret void
-// CHECK8-LABEL: define {{[^@]+}}@__omp_outlined__8
-// CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]]) #[[ATTR0]] {
-// CHECK8-NEXT: entry:
-// CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK8-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
-// CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8
-// CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[J:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i64, align 8
-// CHECK8-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i64, align 8
-// CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
-// CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[I9:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[J10:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 4
-// CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK8-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK8-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK8-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK8-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK8-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK8-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK8-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
-// CHECK8-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK8-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64
-// CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK8-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP4]], 0
-// CHECK8-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1
-// CHECK8-NEXT: [[CONV6:%.*]] = sext i32 [[DIV5]] to i64
-// CHECK8-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]]
-// CHECK8-NEXT: [[SUB7:%.*]] = sub nsw i64 [[MUL]], 1
-// CHECK8-NEXT: store i64 [[SUB7]], i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK8-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK8-NEXT: store i32 0, i32* [[J]], align 4
-// CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK8-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
-// CHECK8-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK8: land.lhs.true:
-// CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK8-NEXT: [[CMP8:%.*]] = icmp slt i32 0, [[TMP6]]
-// CHECK8-NEXT: br i1 [[CMP8]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
-// CHECK8: omp.precond.then:
-// CHECK8-NEXT: store i64 0, i64* [[DOTOMP_COMB_LB]], align 8
-// CHECK8-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK8-NEXT: store i64 [[TMP7]], i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK8-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8
-// CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK8-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK8-NEXT: [[CONV11:%.*]] = zext i32 [[NVPTX_NUM_THREADS]] to i64
-// CHECK8-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
-// CHECK8-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_COMB_LB]], i64* [[DOTOMP_COMB_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 [[CONV11]])
-// CHECK8-NEXT: [[TMP10:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK8-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK8-NEXT: [[CMP12:%.*]] = icmp sgt i64 [[TMP10]], [[TMP11]]
-// CHECK8-NEXT: br i1 [[CMP12]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK8: cond.true:
-// CHECK8-NEXT: [[TMP12:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK8-NEXT: br label [[COND_END:%.*]]
-// CHECK8: cond.false:
-// CHECK8-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK8-NEXT: br label [[COND_END]]
-// CHECK8: cond.end:
-// CHECK8-NEXT: [[COND:%.*]] = phi i64 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
-// CHECK8-NEXT: store i64 [[COND]], i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK8-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
-// CHECK8-NEXT: store i64 [[TMP14]], i64* [[DOTOMP_IV]], align 8
-// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK8: omp.inner.for.cond:
-// CHECK8-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK8-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK8-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP16]], 1
-// CHECK8-NEXT: [[CMP13:%.*]] = icmp slt i64 [[TMP15]], [[ADD]]
-// CHECK8-NEXT: br i1 [[CMP13]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK8: omp.inner.for.body:
-// CHECK8-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
-// CHECK8-NEXT: [[TMP18:%.*]] = trunc i64 [[TMP17]] to i32
-// CHECK8-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK8-NEXT: [[TMP20:%.*]] = trunc i64 [[TMP19]] to i32
-// CHECK8-NEXT: [[TMP21:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK8-NEXT: store i32 [[TMP21]], i32* [[N_CASTED]], align 4
-// CHECK8-NEXT: [[TMP22:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK8-NEXT: [[TMP23:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK8-NEXT: [[TMP24:%.*]] = inttoptr i32 [[TMP18]] to i8*
-// CHECK8-NEXT: store i8* [[TMP24]], i8** [[TMP23]], align 4
-// CHECK8-NEXT: [[TMP25:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK8-NEXT: [[TMP26:%.*]] = inttoptr i32 [[TMP20]] to i8*
-// CHECK8-NEXT: store i8* [[TMP26]], i8** [[TMP25]], align 4
-// CHECK8-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK8-NEXT: [[TMP28:%.*]] = inttoptr i32 [[TMP22]] to i8*
-// CHECK8-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 4
-// CHECK8-NEXT: [[TMP29:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
-// CHECK8-NEXT: [[TMP30:%.*]] = bitcast [10 x [10 x i32]]* [[TMP0]] to i8*
-// CHECK8-NEXT: store i8* [[TMP30]], i8** [[TMP29]], align 4
-// CHECK8-NEXT: [[TMP31:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK8-NEXT: [[TMP32:%.*]] = load i32, i32* [[TMP31]], align 4
-// CHECK8-NEXT: [[TMP33:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK8-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP32]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [10 x [10 x i32]]*)* @__omp_outlined__9 to i8*), i8* null, i8** [[TMP33]], i32 4)
-// CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK8: omp.inner.for.inc:
-// CHECK8-NEXT: [[TMP34:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK8-NEXT: [[TMP35:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8
-// CHECK8-NEXT: [[ADD14:%.*]] = add nsw i64 [[TMP34]], [[TMP35]]
-// CHECK8-NEXT: store i64 [[ADD14]], i64* [[DOTOMP_IV]], align 8
-// CHECK8-NEXT: [[TMP36:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
-// CHECK8-NEXT: [[TMP37:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8
-// CHECK8-NEXT: [[ADD15:%.*]] = add nsw i64 [[TMP36]], [[TMP37]]
-// CHECK8-NEXT: store i64 [[ADD15]], i64* [[DOTOMP_COMB_LB]], align 8
-// CHECK8-NEXT: [[TMP38:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK8-NEXT: [[TMP39:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8
-// CHECK8-NEXT: [[ADD16:%.*]] = add nsw i64 [[TMP38]], [[TMP39]]
-// CHECK8-NEXT: store i64 [[ADD16]], i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK8-NEXT: [[TMP40:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK8-NEXT: [[TMP41:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK8-NEXT: [[CMP17:%.*]] = icmp sgt i64 [[TMP40]], [[TMP41]]
-// CHECK8-NEXT: br i1 [[CMP17]], label [[COND_TRUE18:%.*]], label [[COND_FALSE19:%.*]]
-// CHECK8: cond.true18:
-// CHECK8-NEXT: [[TMP42:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK8-NEXT: br label [[COND_END20:%.*]]
-// CHECK8: cond.false19:
-// CHECK8-NEXT: [[TMP43:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK8-NEXT: br label [[COND_END20]]
-// CHECK8: cond.end20:
-// CHECK8-NEXT: [[COND21:%.*]] = phi i64 [ [[TMP42]], [[COND_TRUE18]] ], [ [[TMP43]], [[COND_FALSE19]] ]
-// CHECK8-NEXT: store i64 [[COND21]], i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK8-NEXT: [[TMP44:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
-// CHECK8-NEXT: store i64 [[TMP44]], i64* [[DOTOMP_IV]], align 8
-// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK8: omp.inner.for.end:
-// CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK8: omp.loop.exit:
-// CHECK8-NEXT: [[TMP45:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK8-NEXT: [[TMP46:%.*]] = load i32, i32* [[TMP45]], align 4
-// CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP46]])
-// CHECK8-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK8: omp.precond.end:
-// CHECK8-NEXT: ret void
-// CHECK8-LABEL: define {{[^@]+}}@__omp_outlined__9
-// CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]]) #[[ATTR0]] {
-// CHECK8-NEXT: entry:
-// CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK8-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
-// CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8
-// CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[J:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8
-// CHECK8-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8
-// CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
-// CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[I11:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[J12:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK8-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK8-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK8-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK8-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK8-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK8-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK8-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK8-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK8-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
-// CHECK8-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK8-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64
-// CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK8-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP4]], 0
-// CHECK8-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1
-// CHECK8-NEXT: [[CONV6:%.*]] = sext i32 [[DIV5]] to i64
-// CHECK8-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]]
-// CHECK8-NEXT: [[SUB7:%.*]] = sub nsw i64 [[MUL]], 1
-// CHECK8-NEXT: store i64 [[SUB7]], i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK8-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK8-NEXT: store i32 0, i32* [[J]], align 4
-// CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK8-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
-// CHECK8-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK8: land.lhs.true:
-// CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK8-NEXT: [[CMP8:%.*]] = icmp slt i32 0, [[TMP6]]
-// CHECK8-NEXT: br i1 [[CMP8]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
-// CHECK8: omp.precond.then:
-// CHECK8-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8
-// CHECK8-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK8-NEXT: store i64 [[TMP7]], i64* [[DOTOMP_UB]], align 8
-// CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK8-NEXT: [[CONV9:%.*]] = zext i32 [[TMP8]] to i64
-// CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK8-NEXT: [[CONV10:%.*]] = zext i32 [[TMP9]] to i64
-// CHECK8-NEXT: store i64 [[CONV9]], i64* [[DOTOMP_LB]], align 8
-// CHECK8-NEXT: store i64 [[CONV10]], i64* [[DOTOMP_UB]], align 8
-// CHECK8-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8
-// CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK8-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
-// CHECK8-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 33, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_LB]], i64* [[DOTOMP_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1)
-// CHECK8-NEXT: [[TMP12:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8
-// CHECK8-NEXT: store i64 [[TMP12]], i64* [[DOTOMP_IV]], align 8
-// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK8: omp.inner.for.cond:
-// CHECK8-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK8-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK8-NEXT: [[CONV13:%.*]] = zext i32 [[TMP14]] to i64
-// CHECK8-NEXT: [[CMP14:%.*]] = icmp sle i64 [[TMP13]], [[CONV13]]
-// CHECK8-NEXT: br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK8: omp.inner.for.body:
-// CHECK8-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK8-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK8-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP16]], 0
-// CHECK8-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1
-// CHECK8-NEXT: [[MUL17:%.*]] = mul nsw i32 1, [[DIV16]]
-// CHECK8-NEXT: [[CONV18:%.*]] = sext i32 [[MUL17]] to i64
-// CHECK8-NEXT: [[DIV19:%.*]] = sdiv i64 [[TMP15]], [[CONV18]]
-// CHECK8-NEXT: [[MUL20:%.*]] = mul nsw i64 [[DIV19]], 1
-// CHECK8-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL20]]
-// CHECK8-NEXT: [[CONV21:%.*]] = trunc i64 [[ADD]] to i32
-// CHECK8-NEXT: store i32 [[CONV21]], i32* [[I11]], align 4
-// CHECK8-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK8-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK8-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK8-NEXT: [[SUB22:%.*]] = sub nsw i32 [[TMP19]], 0
-// CHECK8-NEXT: [[DIV23:%.*]] = sdiv i32 [[SUB22]], 1
-// CHECK8-NEXT: [[MUL24:%.*]] = mul nsw i32 1, [[DIV23]]
-// CHECK8-NEXT: [[CONV25:%.*]] = sext i32 [[MUL24]] to i64
-// CHECK8-NEXT: [[DIV26:%.*]] = sdiv i64 [[TMP18]], [[CONV25]]
-// CHECK8-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK8-NEXT: [[SUB27:%.*]] = sub nsw i32 [[TMP20]], 0
-// CHECK8-NEXT: [[DIV28:%.*]] = sdiv i32 [[SUB27]], 1
-// CHECK8-NEXT: [[MUL29:%.*]] = mul nsw i32 1, [[DIV28]]
-// CHECK8-NEXT: [[CONV30:%.*]] = sext i32 [[MUL29]] to i64
-// CHECK8-NEXT: [[MUL31:%.*]] = mul nsw i64 [[DIV26]], [[CONV30]]
-// CHECK8-NEXT: [[SUB32:%.*]] = sub nsw i64 [[TMP17]], [[MUL31]]
-// CHECK8-NEXT: [[MUL33:%.*]] = mul nsw i64 [[SUB32]], 1
-// CHECK8-NEXT: [[ADD34:%.*]] = add nsw i64 0, [[MUL33]]
-// CHECK8-NEXT: [[CONV35:%.*]] = trunc i64 [[ADD34]] to i32
-// CHECK8-NEXT: store i32 [[CONV35]], i32* [[J12]], align 4
-// CHECK8-NEXT: [[TMP21:%.*]] = load i32, i32* [[I11]], align 4
-// CHECK8-NEXT: [[TMP22:%.*]] = load i32, i32* [[J12]], align 4
-// CHECK8-NEXT: [[ADD36:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
-// CHECK8-NEXT: [[TMP23:%.*]] = load i32, i32* [[I11]], align 4
-// CHECK8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [10 x i32]], [10 x [10 x i32]]* [[TMP0]], i32 0, i32 [[TMP23]]
-// CHECK8-NEXT: [[TMP24:%.*]] = load i32, i32* [[J12]], align 4
-// CHECK8-NEXT: [[ARRAYIDX37:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP24]]
-// CHECK8-NEXT: store i32 [[ADD36]], i32* [[ARRAYIDX37]], align 4
-// CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK8: omp.body.continue:
-// CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK8: omp.inner.for.inc:
-// CHECK8-NEXT: [[TMP25:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK8-NEXT: [[TMP26:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8
-// CHECK8-NEXT: [[ADD38:%.*]] = add nsw i64 [[TMP25]], [[TMP26]]
-// CHECK8-NEXT: store i64 [[ADD38]], i64* [[DOTOMP_IV]], align 8
-// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK8: omp.inner.for.end:
-// CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK8: omp.loop.exit:
-// CHECK8-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK8-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4
-// CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP28]])
-// CHECK8-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK8: omp.precond.end:
-// CHECK8-NEXT: ret void
-// CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l74
-// CHECK8-SAME: (i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* [[V:%.*]]) #[[ATTR0]] {
-// CHECK8-NEXT: entry:
-// CHECK8-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK8-NEXT: [[V_ADDR:%.*]] = alloca i32*, align 4
-// CHECK8-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK8-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK8-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK8-NEXT: store i32* [[V]], i32** [[V_ADDR]], align 4
-// CHECK8-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK8-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK8-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK8-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK8: .execute:
-// CHECK8-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK8-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
-// CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK8-NEXT: [[TMP4:%.*]] = load i32*, i32** [[V_ADDR]], align 4
-// CHECK8-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK8-NEXT: call void @__omp_outlined__10(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP3]], [1000 x i32]* [[TMP0]], i32* [[TMP4]]) #[[ATTR3]]
-// CHECK8-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK8: .omp.deinit:
-// CHECK8-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK8-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK8: .exit:
-// CHECK8-NEXT: ret void
-// CHECK8-LABEL: define {{[^@]+}}@__omp_outlined__10
-// CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* [[V:%.*]]) #[[ATTR0]] {
-// CHECK8-NEXT: entry:
-// CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK8-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK8-NEXT: [[V_ADDR:%.*]] = alloca i32*, align 4
-// CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [5 x i8*], align 4
-// CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK8-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK8-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK8-NEXT: store i32* [[V]], i32** [[V_ADDR]], align 4
-// CHECK8-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK8-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK8-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK8-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK8-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK8-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK8-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK8-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK8-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK8-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK8: omp.precond.then:
-// CHECK8-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK8-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK8-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK8-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
-// CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK8-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
-// CHECK8-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK8: cond.true:
-// CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK8-NEXT: br label [[COND_END:%.*]]
-// CHECK8: cond.false:
-// CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: br label [[COND_END]]
-// CHECK8: cond.end:
-// CHECK8-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
-// CHECK8-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK8-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK8: omp.inner.for.cond:
-// CHECK8-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1
-// CHECK8-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]
-// CHECK8-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK8: omp.inner.for.body:
-// CHECK8-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK8-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: [[TMP16:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK8-NEXT: store i32 [[TMP16]], i32* [[N_CASTED]], align 4
-// CHECK8-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK8-NEXT: [[TMP18:%.*]] = load i32*, i32** [[V_ADDR]], align 4
-// CHECK8-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK8-NEXT: [[TMP20:%.*]] = inttoptr i32 [[TMP14]] to i8*
-// CHECK8-NEXT: store i8* [[TMP20]], i8** [[TMP19]], align 4
-// CHECK8-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK8-NEXT: [[TMP22:%.*]] = inttoptr i32 [[TMP15]] to i8*
-// CHECK8-NEXT: store i8* [[TMP22]], i8** [[TMP21]], align 4
-// CHECK8-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK8-NEXT: [[TMP24:%.*]] = inttoptr i32 [[TMP17]] to i8*
-// CHECK8-NEXT: store i8* [[TMP24]], i8** [[TMP23]], align 4
-// CHECK8-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
-// CHECK8-NEXT: [[TMP26:%.*]] = bitcast [1000 x i32]* [[TMP0]] to i8*
-// CHECK8-NEXT: store i8* [[TMP26]], i8** [[TMP25]], align 4
-// CHECK8-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 4
-// CHECK8-NEXT: [[TMP28:%.*]] = bitcast i32* [[TMP18]] to i8*
-// CHECK8-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 4
-// CHECK8-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK8-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4
-// CHECK8-NEXT: [[TMP31:%.*]] = bitcast [5 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK8-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP30]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i32]*, i32*)* @__omp_outlined__11 to i8*), i8* null, i8** [[TMP31]], i32 5)
-// CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK8: omp.inner.for.inc:
-// CHECK8-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK8-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP32]], [[TMP33]]
-// CHECK8-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK8-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK8-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP34]], [[TMP35]]
-// CHECK8-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK8-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK8-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP36]], [[TMP37]]
-// CHECK8-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK8-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP38]], [[TMP39]]
-// CHECK8-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]]
-// CHECK8: cond.true10:
-// CHECK8-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK8-NEXT: br label [[COND_END12:%.*]]
-// CHECK8: cond.false11:
-// CHECK8-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: br label [[COND_END12]]
-// CHECK8: cond.end12:
-// CHECK8-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP40]], [[COND_TRUE10]] ], [ [[TMP41]], [[COND_FALSE11]] ]
-// CHECK8-NEXT: store i32 [[COND13]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK8-NEXT: store i32 [[TMP42]], i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK8: omp.inner.for.end:
-// CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK8: omp.loop.exit:
-// CHECK8-NEXT: [[TMP43:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK8-NEXT: [[TMP44:%.*]] = load i32, i32* [[TMP43]], align 4
-// CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP44]])
-// CHECK8-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK8: omp.precond.end:
-// CHECK8-NEXT: ret void
-// CHECK8-LABEL: define {{[^@]+}}@__omp_outlined__11
-// CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* [[V:%.*]]) #[[ATTR0]] {
-// CHECK8-NEXT: entry:
-// CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK8-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK8-NEXT: [[V_ADDR:%.*]] = alloca i32*, align 4
-// CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK8-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK8-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK8-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK8-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK8-NEXT: store i32* [[V]], i32** [[V_ADDR]], align 4
-// CHECK8-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK8-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK8-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK8-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK8-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK8-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK8-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK8-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK8-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK8-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK8: omp.precond.then:
-// CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK8-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
-// CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK8-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
-// CHECK8-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
-// CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK8-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK8-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK8: omp.inner.for.cond:
-// CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK8-NEXT: [[CMP4:%.*]] = icmp ule i32 [[TMP10]], [[TMP11]]
-// CHECK8-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK8: omp.inner.for.body:
-// CHECK8-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
-// CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK8-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
-// CHECK8-NEXT: [[TMP13:%.*]] = load i32*, i32** [[V_ADDR]], align 4
-// CHECK8-NEXT: [[TMP14:%.*]] = load i32, i32* [[I3]], align 4
-// CHECK8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP13]], i32 [[TMP14]]
-// CHECK8-NEXT: [[TMP15:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
-// CHECK8-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4
-// CHECK8-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 [[TMP16]]
-// CHECK8-NEXT: store i32 [[TMP15]], i32* [[ARRAYIDX5]], align 4
-// CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK8: omp.body.continue:
-// CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK8: omp.inner.for.inc:
-// CHECK8-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK8-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
-// CHECK8-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK8: omp.inner.for.end:
-// CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK8: omp.loop.exit:
-// CHECK8-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK8-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4
-// CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]])
-// CHECK8-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK8: omp.precond.end:
-// CHECK8-NEXT: ret void
-// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l43
-// CHECK9-SAME: (i64 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i64 [[L:%.*]]) #[[ATTR0:[0-9]+]] {
-// CHECK9-NEXT: entry:
-// CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
-// CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
-// CHECK9-NEXT: [[L_ADDR:%.*]] = alloca i64, align 8
-// CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
-// CHECK9-NEXT: [[L_CASTED:%.*]] = alloca i64, align 8
-// CHECK9-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
-// CHECK9-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
-// CHECK9-NEXT: store i64 [[L]], i64* [[L_ADDR]], align 8
-// CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
-// CHECK9-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
-// CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[L_ADDR]] to i32*
-// CHECK9-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK9-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK9-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK9: .execute:
-// CHECK9-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]])
-// CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK9-NEXT: [[CONV2:%.*]] = bitcast i64* [[N_CASTED]] to i32*
-// CHECK9-NEXT: store i32 [[TMP2]], i32* [[CONV2]], align 4
-// CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
-// CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV1]], align 8
-// CHECK9-NEXT: [[CONV3:%.*]] = bitcast i64* [[L_CASTED]] to i32*
-// CHECK9-NEXT: store i32 [[TMP4]], i32* [[CONV3]], align 4
-// CHECK9-NEXT: [[TMP5:%.*]] = load i64, i64* [[L_CASTED]], align 8
-// CHECK9-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK9-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i64 [[TMP3]], [1000 x i32]* [[TMP0]], i64 [[TMP5]]) #[[ATTR3:[0-9]+]]
-// CHECK9-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK9: .omp.deinit:
-// CHECK9-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK9-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK9: .exit:
-// CHECK9-NEXT: ret void
-// CHECK9-LABEL: define {{[^@]+}}@__omp_outlined__
-// CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i64 [[L:%.*]]) #[[ATTR0]] {
-// CHECK9-NEXT: entry:
-// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
-// CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
-// CHECK9-NEXT: [[L_ADDR:%.*]] = alloca i64, align 8
-// CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[I5:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
-// CHECK9-NEXT: [[L_CASTED:%.*]] = alloca i64, align 8
-// CHECK9-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [5 x i8*], align 8
-// CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
-// CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
-// CHECK9-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
-// CHECK9-NEXT: store i64 [[L]], i64* [[L_ADDR]], align 8
-// CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
-// CHECK9-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
-// CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[L_ADDR]] to i32*
-// CHECK9-NEXT: [[TMP1:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared", align 2
-// CHECK9-NEXT: [[TMP2:%.*]] = load i64, i64* @"_openmp_static_kernel$size", align 8
-// CHECK9-NEXT: call void @__kmpc_get_team_static_memory(i16 1, i8* addrspacecast (i8 addrspace(3)* getelementptr inbounds (%"union._shared_openmp_static_memory_type_$_", %"union._shared_openmp_static_memory_type_$_" addrspace(3)* @"_openmp_shared_static_glob_rd_$_", i32 0, i32 0, i32 0) to i8*), i64 [[TMP2]], i16 [[TMP1]], i8** addrspacecast (i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr" to i8**))
-// CHECK9-NEXT: [[TMP3:%.*]] = load i8*, i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr", align 8
-// CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds i8, i8* [[TMP3]], i64 0
-// CHECK9-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to %struct._globalized_locals_ty*
-// CHECK9-NEXT: [[L2:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY:%.*]], %struct._globalized_locals_ty* [[TMP5]], i32 0, i32 0
-// CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0
-// CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK9-NEXT: [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK9-NEXT: store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_3]], align 4
-// CHECK9-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]]
-// CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK9: omp.precond.then:
-// CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
-// CHECK9-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK9-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
-// CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 128)
-// CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
-// CHECK9-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]]
-// CHECK9-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK9: cond.true:
-// CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
-// CHECK9-NEXT: br label [[COND_END:%.*]]
-// CHECK9: cond.false:
-// CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: br label [[COND_END]]
-// CHECK9: cond.end:
-// CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ]
-// CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK9-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK9: omp.inner.for.cond:
-// CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
-// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], 1
-// CHECK9-NEXT: [[CMP7:%.*]] = icmp slt i32 [[TMP17]], [[ADD]]
-// CHECK9-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK9: omp.inner.for.body:
-// CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK9-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64
-// CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: [[TMP22:%.*]] = zext i32 [[TMP21]] to i64
-// CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK9-NEXT: [[CONV8:%.*]] = bitcast i64* [[N_CASTED]] to i32*
-// CHECK9-NEXT: store i32 [[TMP23]], i32* [[CONV8]], align 4
-// CHECK9-NEXT: [[TMP24:%.*]] = load i64, i64* [[N_CASTED]], align 8
-// CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[CONV1]], align 8
-// CHECK9-NEXT: [[CONV9:%.*]] = bitcast i64* [[L_CASTED]] to i32*
-// CHECK9-NEXT: store i32 [[TMP25]], i32* [[CONV9]], align 4
-// CHECK9-NEXT: [[TMP26:%.*]] = load i64, i64* [[L_CASTED]], align 8
-// CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
-// CHECK9-NEXT: [[TMP28:%.*]] = inttoptr i64 [[TMP20]] to i8*
-// CHECK9-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 8
-// CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
-// CHECK9-NEXT: [[TMP30:%.*]] = inttoptr i64 [[TMP22]] to i8*
-// CHECK9-NEXT: store i8* [[TMP30]], i8** [[TMP29]], align 8
-// CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
-// CHECK9-NEXT: [[TMP32:%.*]] = inttoptr i64 [[TMP24]] to i8*
-// CHECK9-NEXT: store i8* [[TMP32]], i8** [[TMP31]], align 8
-// CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 3
-// CHECK9-NEXT: [[TMP34:%.*]] = bitcast [1000 x i32]* [[TMP0]] to i8*
-// CHECK9-NEXT: store i8* [[TMP34]], i8** [[TMP33]], align 8
-// CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 4
-// CHECK9-NEXT: [[TMP36:%.*]] = inttoptr i64 [[TMP26]] to i8*
-// CHECK9-NEXT: store i8* [[TMP36]], i8** [[TMP35]], align 8
-// CHECK9-NEXT: [[TMP37:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK9-NEXT: [[TMP38:%.*]] = load i32, i32* [[TMP37]], align 4
-// CHECK9-NEXT: [[TMP39:%.*]] = bitcast [5 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK9-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP38]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, i64, [1000 x i32]*, i64)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP39]], i64 5)
-// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK9: omp.inner.for.inc:
-// CHECK9-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK9-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP40]], [[TMP41]]
-// CHECK9-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK9-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK9-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP42]], [[TMP43]]
-// CHECK9-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK9-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK9-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP44]], [[TMP45]]
-// CHECK9-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
-// CHECK9-NEXT: [[CMP13:%.*]] = icmp sgt i32 [[TMP46]], [[TMP47]]
-// CHECK9-NEXT: br i1 [[CMP13]], label [[COND_TRUE14:%.*]], label [[COND_FALSE15:%.*]]
-// CHECK9: cond.true14:
-// CHECK9-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
-// CHECK9-NEXT: br label [[COND_END16:%.*]]
-// CHECK9: cond.false15:
-// CHECK9-NEXT: [[TMP49:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: br label [[COND_END16]]
-// CHECK9: cond.end16:
-// CHECK9-NEXT: [[COND17:%.*]] = phi i32 [ [[TMP48]], [[COND_TRUE14]] ], [ [[TMP49]], [[COND_FALSE15]] ]
-// CHECK9-NEXT: store i32 [[COND17]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK9-NEXT: store i32 [[TMP50]], i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK9: omp.inner.for.end:
-// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK9: omp.loop.exit:
-// CHECK9-NEXT: [[TMP51:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK9-NEXT: [[TMP52:%.*]] = load i32, i32* [[TMP51]], align 4
-// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP52]])
-// CHECK9-NEXT: [[TMP53:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK9-NEXT: [[TMP54:%.*]] = icmp ne i32 [[TMP53]], 0
-// CHECK9-NEXT: br i1 [[TMP54]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
-// CHECK9: .omp.lastprivate.then:
-// CHECK9-NEXT: [[TMP55:%.*]] = load i32, i32* [[CONV1]], align 8
-// CHECK9-NEXT: store i32 [[TMP55]], i32* [[CONV1]], align 8
-// CHECK9-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
-// CHECK9: .omp.lastprivate.done:
-// CHECK9-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK9: omp.precond.end:
-// CHECK9-NEXT: [[TMP56:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared", align 2
-// CHECK9-NEXT: call void @__kmpc_restore_team_static_memory(i16 1, i16 [[TMP56]])
-// CHECK9-NEXT: ret void
-// CHECK9-LABEL: define {{[^@]+}}@__omp_outlined__1
-// CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i64 [[L:%.*]]) #[[ATTR0]] {
-// CHECK9-NEXT: entry:
-// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
-// CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
-// CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
-// CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
-// CHECK9-NEXT: [[L_ADDR:%.*]] = alloca i64, align 8
-// CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[I6:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
-// CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
-// CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
-// CHECK9-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
-// CHECK9-NEXT: store i64 [[L]], i64* [[L_ADDR]], align 8
-// CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
-// CHECK9-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
-// CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[L_ADDR]] to i32*
-// CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK9-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK9-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK9-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK9-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK9: omp.precond.then:
-// CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
-// CHECK9-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
-// CHECK9-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP5]] to i32
-// CHECK9-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK9-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP6]] to i32
-// CHECK9-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4
-// CHECK9-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4
-// CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK9-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 32)
-// CHECK9-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
-// CHECK9: omp.dispatch.cond:
-// CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK9-NEXT: [[CONV7:%.*]] = sext i32 [[TMP9]] to i64
-// CHECK9-NEXT: [[TMP10:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK9-NEXT: [[CMP8:%.*]] = icmp ugt i64 [[CONV7]], [[TMP10]]
-// CHECK9-NEXT: br i1 [[CMP8]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK9: cond.true:
-// CHECK9-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK9-NEXT: br label [[COND_END:%.*]]
-// CHECK9: cond.false:
-// CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK9-NEXT: [[CONV9:%.*]] = sext i32 [[TMP12]] to i64
-// CHECK9-NEXT: br label [[COND_END]]
-// CHECK9: cond.end:
-// CHECK9-NEXT: [[COND:%.*]] = phi i64 [ [[TMP11]], [[COND_TRUE]] ], [ [[CONV9]], [[COND_FALSE]] ]
-// CHECK9-NEXT: [[CONV10:%.*]] = trunc i64 [[COND]] to i32
-// CHECK9-NEXT: store i32 [[CONV10]], i32* [[DOTOMP_UB]], align 4
-// CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK9-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK9-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
-// CHECK9-NEXT: br i1 [[CMP11]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
-// CHECK9: omp.dispatch.body:
-// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK9: omp.inner.for.cond:
-// CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK9-NEXT: [[CMP12:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
-// CHECK9-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK9: omp.inner.for.body:
-// CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
-// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK9-NEXT: store i32 [[ADD]], i32* [[I6]], align 4
-// CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[I6]], align 4
-// CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
-// CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
-// CHECK9-NEXT: store i32 1, i32* [[ARRAYIDX]], align 4
-// CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[I6]], align 4
-// CHECK9-NEXT: store i32 [[TMP20]], i32* [[CONV1]], align 8
-// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK9: omp.body.continue:
-// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK9: omp.inner.for.inc:
-// CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP21]], 1
-// CHECK9-NEXT: store i32 [[ADD13]], i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK9: omp.inner.for.end:
-// CHECK9-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
-// CHECK9: omp.dispatch.inc:
-// CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK9-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
-// CHECK9-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_LB]], align 4
-// CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK9-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
-// CHECK9-NEXT: store i32 [[ADD15]], i32* [[DOTOMP_UB]], align 4
-// CHECK9-NEXT: br label [[OMP_DISPATCH_COND]]
-// CHECK9: omp.dispatch.end:
-// CHECK9-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
-// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP27]])
-// CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK9-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
-// CHECK9-NEXT: br i1 [[TMP29]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
-// CHECK9: .omp.lastprivate.then:
-// CHECK9-NEXT: [[TMP30:%.*]] = load i32, i32* [[CONV1]], align 8
-// CHECK9-NEXT: store i32 [[TMP30]], i32* [[CONV1]], align 8
-// CHECK9-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
-// CHECK9: .omp.lastprivate.done:
-// CHECK9-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK9: omp.precond.end:
-// CHECK9-NEXT: ret void
-// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l49
-// CHECK9-SAME: (i64 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
-// CHECK9-NEXT: entry:
-// CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
-// CHECK9-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 8
-// CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
-// CHECK9-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
-// CHECK9-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 8
-// CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
-// CHECK9-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 8
-// CHECK9-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK9-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK9-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK9: .execute:
-// CHECK9-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
-// CHECK9-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
-// CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
-// CHECK9-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK9-NEXT: call void @__omp_outlined__2(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i64 [[TMP3]], [1000 x i16]* [[TMP0]]) #[[ATTR3]]
-// CHECK9-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK9: .omp.deinit:
-// CHECK9-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK9-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK9: .exit:
-// CHECK9-NEXT: ret void
-// CHECK9-LABEL: define {{[^@]+}}@__omp_outlined__2
-// CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
-// CHECK9-NEXT: entry:
-// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
-// CHECK9-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 8
-// CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
-// CHECK9-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 8
-// CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
-// CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
-// CHECK9-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 8
-// CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
-// CHECK9-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 8
-// CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK9-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK9-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK9: omp.precond.then:
-// CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK9-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK9-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
-// CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
-// CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK9: cond.true:
-// CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK9-NEXT: br label [[COND_END:%.*]]
-// CHECK9: cond.false:
-// CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: br label [[COND_END]]
-// CHECK9: cond.end:
-// CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
-// CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK9-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK9: omp.inner.for.cond:
-// CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1
-// CHECK9-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]
-// CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK9: omp.inner.for.body:
-// CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK9-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i64
-// CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
-// CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK9-NEXT: [[CONV6:%.*]] = bitcast i64* [[N_CASTED]] to i32*
-// CHECK9-NEXT: store i32 [[TMP18]], i32* [[CONV6]], align 4
-// CHECK9-NEXT: [[TMP19:%.*]] = load i64, i64* [[N_CASTED]], align 8
-// CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
-// CHECK9-NEXT: [[TMP21:%.*]] = inttoptr i64 [[TMP15]] to i8*
-// CHECK9-NEXT: store i8* [[TMP21]], i8** [[TMP20]], align 8
-// CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
-// CHECK9-NEXT: [[TMP23:%.*]] = inttoptr i64 [[TMP17]] to i8*
-// CHECK9-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 8
-// CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
-// CHECK9-NEXT: [[TMP25:%.*]] = inttoptr i64 [[TMP19]] to i8*
-// CHECK9-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 8
-// CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 3
-// CHECK9-NEXT: [[TMP27:%.*]] = bitcast [1000 x i16]* [[TMP0]] to i8*
-// CHECK9-NEXT: store i8* [[TMP27]], i8** [[TMP26]], align 8
-// CHECK9-NEXT: [[TMP28:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK9-NEXT: [[TMP29:%.*]] = load i32, i32* [[TMP28]], align 4
-// CHECK9-NEXT: [[TMP30:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK9-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP29]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, i64, [1000 x i16]*)* @__omp_outlined__3 to i8*), i8* null, i8** [[TMP30]], i64 4)
-// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK9: omp.inner.for.inc:
-// CHECK9-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK9-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP31]], [[TMP32]]
-// CHECK9-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK9-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK9-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP33]], [[TMP34]]
-// CHECK9-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK9-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK9-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP35]], [[TMP36]]
-// CHECK9-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK9-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP37]], [[TMP38]]
-// CHECK9-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
-// CHECK9: cond.true11:
-// CHECK9-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK9-NEXT: br label [[COND_END13:%.*]]
-// CHECK9: cond.false12:
-// CHECK9-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: br label [[COND_END13]]
-// CHECK9: cond.end13:
-// CHECK9-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP39]], [[COND_TRUE11]] ], [ [[TMP40]], [[COND_FALSE12]] ]
-// CHECK9-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK9-NEXT: store i32 [[TMP41]], i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK9: omp.inner.for.end:
-// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK9: omp.loop.exit:
-// CHECK9-NEXT: [[TMP42:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK9-NEXT: [[TMP43:%.*]] = load i32, i32* [[TMP42]], align 4
-// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP43]])
-// CHECK9-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK9: omp.precond.end:
-// CHECK9-NEXT: ret void
-// CHECK9-LABEL: define {{[^@]+}}@__omp_outlined__3
-// CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
-// CHECK9-NEXT: entry:
-// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
-// CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
-// CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
-// CHECK9-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 8
-// CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[I5:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
-// CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
-// CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
-// CHECK9-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 8
-// CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
-// CHECK9-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 8
-// CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK9-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK9-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK9: omp.precond.then:
-// CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
-// CHECK9-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
-// CHECK9-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP5]] to i32
-// CHECK9-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK9-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP6]] to i32
-// CHECK9-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4
-// CHECK9-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4
-// CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK9-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK9-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK9: omp.inner.for.cond:
-// CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: [[CONV6:%.*]] = sext i32 [[TMP10]] to i64
-// CHECK9-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK9-NEXT: [[CMP7:%.*]] = icmp ule i64 [[CONV6]], [[TMP11]]
-// CHECK9-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK9: omp.inner.for.body:
-// CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
-// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK9-NEXT: store i32 [[ADD]], i32* [[I5]], align 4
-// CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[I5]], align 4
-// CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
-// CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i16], [1000 x i16]* [[TMP0]], i64 0, i64 [[IDXPROM]]
-// CHECK9-NEXT: [[TMP14:%.*]] = load i16, i16* [[ARRAYIDX]], align 2
-// CHECK9-NEXT: [[CONV8:%.*]] = sext i16 [[TMP14]] to i32
-// CHECK9-NEXT: [[ADD9:%.*]] = add nsw i32 [[CONV8]], 1
-// CHECK9-NEXT: [[CONV10:%.*]] = trunc i32 [[ADD9]] to i16
-// CHECK9-NEXT: store i16 [[CONV10]], i16* [[ARRAYIDX]], align 2
-// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK9: omp.body.continue:
-// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK9: omp.inner.for.inc:
-// CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK9-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
-// CHECK9-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK9: omp.inner.for.end:
-// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK9: omp.loop.exit:
-// CHECK9-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
-// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]])
-// CHECK9-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK9: omp.precond.end:
-// CHECK9-NEXT: ret void
-// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l54
-// CHECK9-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
-// CHECK9-NEXT: entry:
-// CHECK9-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8
-// CHECK9-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK9-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8
-// CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8
-// CHECK9-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK9-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK9-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK9: .execute:
-// CHECK9-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK9-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK9-NEXT: call void @__omp_outlined__4(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x i32]* [[TMP0]]) #[[ATTR3]]
-// CHECK9-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK9: .omp.deinit:
-// CHECK9-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK9-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK9: .exit:
-// CHECK9-NEXT: ret void
-// CHECK9-LABEL: define {{[^@]+}}@__omp_outlined__4
-// CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
-// CHECK9-NEXT: entry:
-// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK9-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8
-// CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [3 x i8*], align 8
-// CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
-// CHECK9-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8
-// CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8
-// CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK9-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK9-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
-// CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
-// CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK9: cond.true:
-// CHECK9-NEXT: br label [[COND_END:%.*]]
-// CHECK9: cond.false:
-// CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: br label [[COND_END]]
-// CHECK9: cond.end:
-// CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
-// CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK9: omp.inner.for.cond:
-// CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP6]], 10
-// CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK9: omp.inner.for.body:
-// CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
-// CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
-// CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
-// CHECK9-NEXT: [[TMP12:%.*]] = inttoptr i64 [[TMP8]] to i8*
-// CHECK9-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 8
-// CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
-// CHECK9-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP10]] to i8*
-// CHECK9-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 8
-// CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
-// CHECK9-NEXT: [[TMP16:%.*]] = bitcast [10 x i32]* [[TMP0]] to i8*
-// CHECK9-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 8
-// CHECK9-NEXT: [[TMP17:%.*]] = bitcast [3 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK9-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @__omp_outlined__5 to i8*), i8* null, i8** [[TMP17]], i64 3)
-// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK9: omp.inner.for.inc:
-// CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
-// CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK9-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
-// CHECK9-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
-// CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP24]], 9
-// CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
-// CHECK9: cond.true5:
-// CHECK9-NEXT: br label [[COND_END7:%.*]]
-// CHECK9: cond.false6:
-// CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: br label [[COND_END7]]
-// CHECK9: cond.end7:
-// CHECK9-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP25]], [[COND_FALSE6]] ]
-// CHECK9-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK9-NEXT: store i32 [[TMP26]], i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK9: omp.inner.for.end:
-// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK9: omp.loop.exit:
-// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
-// CHECK9-NEXT: ret void
-// CHECK9-LABEL: define {{[^@]+}}@__omp_outlined__5
-// CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
-// CHECK9-NEXT: entry:
-// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
-// CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
-// CHECK9-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8
-// CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
-// CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
-// CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK9-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8
-// CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8
-// CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK9-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
-// CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
-// CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
-// CHECK9-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
-// CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
-// CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
-// CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK9-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
-// CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK9: omp.inner.for.cond:
-// CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: [[CONV2:%.*]] = sext i32 [[TMP6]] to i64
-// CHECK9-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK9-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV2]], [[TMP7]]
-// CHECK9-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK9: omp.inner.for.body:
-// CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
-// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4
-// CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
-// CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64
-// CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
-// CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
-// CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
-// CHECK9-NEXT: store i32 [[ADD3]], i32* [[ARRAYIDX]], align 4
-// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK9: omp.body.continue:
-// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK9: omp.inner.for.inc:
-// CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK9-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
-// CHECK9-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK9: omp.inner.for.end:
-// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK9: omp.loop.exit:
-// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
-// CHECK9-NEXT: ret void
-// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l59
-// CHECK9-SAME: ([10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i64 [[F:%.*]]) #[[ATTR0]] {
-// CHECK9-NEXT: entry:
-// CHECK9-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 8
-// CHECK9-NEXT: [[F_ADDR:%.*]] = alloca i64, align 8
-// CHECK9-NEXT: [[F_CASTED:%.*]] = alloca i64, align 8
-// CHECK9-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK9-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 8
-// CHECK9-NEXT: store i64 [[F]], i64* [[F_ADDR]], align 8
-// CHECK9-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 8
-// CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[F_ADDR]] to i32*
-// CHECK9-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK9-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK9-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK9: .execute:
-// CHECK9-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[F_CASTED]] to i32*
-// CHECK9-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
-// CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[F_CASTED]], align 8
-// CHECK9-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK9-NEXT: call void @__omp_outlined__6(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x [10 x i32]]* [[TMP0]], i64 [[TMP3]]) #[[ATTR3]]
-// CHECK9-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK9: .omp.deinit:
-// CHECK9-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK9-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK9: .exit:
-// CHECK9-NEXT: ret void
-// CHECK9-LABEL: define {{[^@]+}}@__omp_outlined__6
-// CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i64 [[F:%.*]]) #[[ATTR0]] {
-// CHECK9-NEXT: entry:
-// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK9-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 8
-// CHECK9-NEXT: [[F_ADDR:%.*]] = alloca i64, align 8
-// CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[K:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[J:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[F_CASTED:%.*]] = alloca i64, align 8
-// CHECK9-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 8
-// CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
-// CHECK9-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 8
-// CHECK9-NEXT: store i64 [[F]], i64* [[F_ADDR]], align 8
-// CHECK9-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 8
-// CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[F_ADDR]] to i32*
-// CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK9-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
-// CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
-// CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK9: cond.true:
-// CHECK9-NEXT: br label [[COND_END:%.*]]
-// CHECK9: cond.false:
-// CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: br label [[COND_END]]
-// CHECK9: cond.end:
-// CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
-// CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK9: omp.inner.for.cond:
-// CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP6]], 100
-// CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK9: omp.inner.for.body:
-// CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
-// CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
-// CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK9-NEXT: [[CONV3:%.*]] = bitcast i64* [[F_CASTED]] to i32*
-// CHECK9-NEXT: store i32 [[TMP11]], i32* [[CONV3]], align 4
-// CHECK9-NEXT: [[TMP12:%.*]] = load i64, i64* [[F_CASTED]], align 8
-// CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
-// CHECK9-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP8]] to i8*
-// CHECK9-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 8
-// CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
-// CHECK9-NEXT: [[TMP16:%.*]] = inttoptr i64 [[TMP10]] to i8*
-// CHECK9-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 8
-// CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
-// CHECK9-NEXT: [[TMP18:%.*]] = bitcast [10 x [10 x i32]]* [[TMP0]] to i8*
-// CHECK9-NEXT: store i8* [[TMP18]], i8** [[TMP17]], align 8
-// CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 3
-// CHECK9-NEXT: [[TMP20:%.*]] = inttoptr i64 [[TMP12]] to i8*
-// CHECK9-NEXT: store i8* [[TMP20]], i8** [[TMP19]], align 8
-// CHECK9-NEXT: [[TMP21:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK9-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, [10 x [10 x i32]]*, i64)* @__omp_outlined__7 to i8*), i8* null, i8** [[TMP21]], i64 4)
-// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK9: omp.inner.for.inc:
-// CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
-// CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK9-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
-// CHECK9-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK9-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP26]], [[TMP27]]
-// CHECK9-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP28]], 99
-// CHECK9-NEXT: br i1 [[CMP6]], label [[COND_TRUE7:%.*]], label [[COND_FALSE8:%.*]]
-// CHECK9: cond.true7:
-// CHECK9-NEXT: br label [[COND_END9:%.*]]
-// CHECK9: cond.false8:
-// CHECK9-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: br label [[COND_END9]]
-// CHECK9: cond.end9:
-// CHECK9-NEXT: [[COND10:%.*]] = phi i32 [ 99, [[COND_TRUE7]] ], [ [[TMP29]], [[COND_FALSE8]] ]
-// CHECK9-NEXT: store i32 [[COND10]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK9-NEXT: store i32 [[TMP30]], i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK9: omp.inner.for.end:
-// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK9: omp.loop.exit:
-// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
-// CHECK9-NEXT: ret void
-// CHECK9-LABEL: define {{[^@]+}}@__omp_outlined__7
-// CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i64 [[F:%.*]]) #[[ATTR0]] {
-// CHECK9-NEXT: entry:
-// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
-// CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
-// CHECK9-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 8
-// CHECK9-NEXT: [[F_ADDR:%.*]] = alloca i64, align 8
-// CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[K:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[J:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
-// CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
-// CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK9-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 8
-// CHECK9-NEXT: store i64 [[F]], i64* [[F_ADDR]], align 8
-// CHECK9-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 8
-// CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[F_ADDR]] to i32*
-// CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
-// CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
-// CHECK9-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32
-// CHECK9-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK9-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP2]] to i32
-// CHECK9-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_LB]], align 4
-// CHECK9-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4
-// CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK9-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
-// CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK9: omp.inner.for.cond:
-// CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: [[CONV4:%.*]] = sext i32 [[TMP6]] to i64
-// CHECK9-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK9-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV4]], [[TMP7]]
-// CHECK9-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK9: omp.inner.for.body:
-// CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP8]], 10
-// CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
-// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4
-// CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: [[DIV5:%.*]] = sdiv i32 [[TMP10]], 10
-// CHECK9-NEXT: [[MUL6:%.*]] = mul nsw i32 [[DIV5]], 10
-// CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL6]]
-// CHECK9-NEXT: [[MUL7:%.*]] = mul nsw i32 [[SUB]], 1
-// CHECK9-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL7]]
-// CHECK9-NEXT: store i32 [[ADD8]], i32* [[J]], align 4
-// CHECK9-NEXT: store i32 10, i32* [[K]], align 4
-// CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
-// CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[J]], align 4
-// CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK9-NEXT: [[MUL9:%.*]] = mul nsw i32 [[TMP12]], [[TMP13]]
-// CHECK9-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP11]], [[MUL9]]
-// CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[K]], align 4
-// CHECK9-NEXT: [[ADD11:%.*]] = add nsw i32 [[ADD10]], [[TMP14]]
-// CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4
-// CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64
-// CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [10 x i32]], [10 x [10 x i32]]* [[TMP0]], i64 0, i64 [[IDXPROM]]
-// CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[J]], align 4
-// CHECK9-NEXT: [[IDXPROM12:%.*]] = sext i32 [[TMP16]] to i64
-// CHECK9-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[ARRAYIDX]], i64 0, i64 [[IDXPROM12]]
-// CHECK9-NEXT: store i32 [[ADD11]], i32* [[ARRAYIDX13]], align 4
-// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK9: omp.body.continue:
-// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK9: omp.inner.for.inc:
-// CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK9-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
-// CHECK9-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK9: omp.inner.for.end:
-// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK9: omp.loop.exit:
-// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
-// CHECK9-NEXT: ret void
-// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l67
-// CHECK9-SAME: (i64 [[N:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]]) #[[ATTR0]] {
-// CHECK9-NEXT: entry:
-// CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
-// CHECK9-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 8
-// CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
-// CHECK9-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
-// CHECK9-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 8
-// CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
-// CHECK9-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 8
-// CHECK9-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK9-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK9-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK9: .execute:
-// CHECK9-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
-// CHECK9-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
-// CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
-// CHECK9-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK9-NEXT: call void @__omp_outlined__8(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i64 [[TMP3]], [10 x [10 x i32]]* [[TMP0]]) #[[ATTR3]]
-// CHECK9-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK9: .omp.deinit:
-// CHECK9-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK9-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK9: .exit:
-// CHECK9-NEXT: ret void
-// CHECK9-LABEL: define {{[^@]+}}@__omp_outlined__8
-// CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]]) #[[ATTR0]] {
-// CHECK9-NEXT: entry:
-// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
-// CHECK9-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 8
-// CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
-// CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8
-// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[J:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i64, align 8
-// CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i64, align 8
-// CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
-// CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[I10:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[J11:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
-// CHECK9-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 8
-// CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
-// CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
-// CHECK9-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 8
-// CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
-// CHECK9-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 8
-// CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK9-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK9-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
-// CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK9-NEXT: [[CONV4:%.*]] = sext i32 [[DIV]] to i64
-// CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK9-NEXT: [[SUB5:%.*]] = sub nsw i32 [[TMP4]], 0
-// CHECK9-NEXT: [[DIV6:%.*]] = sdiv i32 [[SUB5]], 1
-// CHECK9-NEXT: [[CONV7:%.*]] = sext i32 [[DIV6]] to i64
-// CHECK9-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV4]], [[CONV7]]
-// CHECK9-NEXT: [[SUB8:%.*]] = sub nsw i64 [[MUL]], 1
-// CHECK9-NEXT: store i64 [[SUB8]], i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK9-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK9-NEXT: store i32 0, i32* [[J]], align 4
-// CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
-// CHECK9-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK9: land.lhs.true:
-// CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK9-NEXT: [[CMP9:%.*]] = icmp slt i32 0, [[TMP6]]
-// CHECK9-NEXT: br i1 [[CMP9]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
-// CHECK9: omp.precond.then:
-// CHECK9-NEXT: store i64 0, i64* [[DOTOMP_COMB_LB]], align 8
-// CHECK9-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK9-NEXT: store i64 [[TMP7]], i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK9-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8
-// CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK9-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK9-NEXT: [[CONV12:%.*]] = zext i32 [[NVPTX_NUM_THREADS]] to i64
-// CHECK9-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
-// CHECK9-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_COMB_LB]], i64* [[DOTOMP_COMB_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 [[CONV12]])
-// CHECK9-NEXT: [[TMP10:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK9-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK9-NEXT: [[CMP13:%.*]] = icmp sgt i64 [[TMP10]], [[TMP11]]
-// CHECK9-NEXT: br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK9: cond.true:
-// CHECK9-NEXT: [[TMP12:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK9-NEXT: br label [[COND_END:%.*]]
-// CHECK9: cond.false:
-// CHECK9-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK9-NEXT: br label [[COND_END]]
-// CHECK9: cond.end:
-// CHECK9-NEXT: [[COND:%.*]] = phi i64 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
-// CHECK9-NEXT: store i64 [[COND]], i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK9-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
-// CHECK9-NEXT: store i64 [[TMP14]], i64* [[DOTOMP_IV]], align 8
-// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK9: omp.inner.for.cond:
-// CHECK9-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK9-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK9-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP16]], 1
-// CHECK9-NEXT: [[CMP14:%.*]] = icmp slt i64 [[TMP15]], [[ADD]]
-// CHECK9-NEXT: br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK9: omp.inner.for.body:
-// CHECK9-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
-// CHECK9-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK9-NEXT: [[CONV15:%.*]] = bitcast i64* [[N_CASTED]] to i32*
-// CHECK9-NEXT: store i32 [[TMP19]], i32* [[CONV15]], align 4
-// CHECK9-NEXT: [[TMP20:%.*]] = load i64, i64* [[N_CASTED]], align 8
-// CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
-// CHECK9-NEXT: [[TMP22:%.*]] = inttoptr i64 [[TMP17]] to i8*
-// CHECK9-NEXT: store i8* [[TMP22]], i8** [[TMP21]], align 8
-// CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
-// CHECK9-NEXT: [[TMP24:%.*]] = inttoptr i64 [[TMP18]] to i8*
-// CHECK9-NEXT: store i8* [[TMP24]], i8** [[TMP23]], align 8
-// CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
-// CHECK9-NEXT: [[TMP26:%.*]] = inttoptr i64 [[TMP20]] to i8*
-// CHECK9-NEXT: store i8* [[TMP26]], i8** [[TMP25]], align 8
-// CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 3
-// CHECK9-NEXT: [[TMP28:%.*]] = bitcast [10 x [10 x i32]]* [[TMP0]] to i8*
-// CHECK9-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 8
-// CHECK9-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK9-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4
-// CHECK9-NEXT: [[TMP31:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK9-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP30]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, i64, [10 x [10 x i32]]*)* @__omp_outlined__9 to i8*), i8* null, i8** [[TMP31]], i64 4)
-// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK9: omp.inner.for.inc:
-// CHECK9-NEXT: [[TMP32:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK9-NEXT: [[TMP33:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8
-// CHECK9-NEXT: [[ADD16:%.*]] = add nsw i64 [[TMP32]], [[TMP33]]
-// CHECK9-NEXT: store i64 [[ADD16]], i64* [[DOTOMP_IV]], align 8
-// CHECK9-NEXT: [[TMP34:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
-// CHECK9-NEXT: [[TMP35:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8
-// CHECK9-NEXT: [[ADD17:%.*]] = add nsw i64 [[TMP34]], [[TMP35]]
-// CHECK9-NEXT: store i64 [[ADD17]], i64* [[DOTOMP_COMB_LB]], align 8
-// CHECK9-NEXT: [[TMP36:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK9-NEXT: [[TMP37:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8
-// CHECK9-NEXT: [[ADD18:%.*]] = add nsw i64 [[TMP36]], [[TMP37]]
-// CHECK9-NEXT: store i64 [[ADD18]], i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK9-NEXT: [[TMP38:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK9-NEXT: [[TMP39:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK9-NEXT: [[CMP19:%.*]] = icmp sgt i64 [[TMP38]], [[TMP39]]
-// CHECK9-NEXT: br i1 [[CMP19]], label [[COND_TRUE20:%.*]], label [[COND_FALSE21:%.*]]
-// CHECK9: cond.true20:
-// CHECK9-NEXT: [[TMP40:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK9-NEXT: br label [[COND_END22:%.*]]
-// CHECK9: cond.false21:
-// CHECK9-NEXT: [[TMP41:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK9-NEXT: br label [[COND_END22]]
-// CHECK9: cond.end22:
-// CHECK9-NEXT: [[COND23:%.*]] = phi i64 [ [[TMP40]], [[COND_TRUE20]] ], [ [[TMP41]], [[COND_FALSE21]] ]
-// CHECK9-NEXT: store i64 [[COND23]], i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK9-NEXT: [[TMP42:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
-// CHECK9-NEXT: store i64 [[TMP42]], i64* [[DOTOMP_IV]], align 8
-// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK9: omp.inner.for.end:
-// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK9: omp.loop.exit:
-// CHECK9-NEXT: [[TMP43:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK9-NEXT: [[TMP44:%.*]] = load i32, i32* [[TMP43]], align 4
-// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP44]])
-// CHECK9-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK9: omp.precond.end:
-// CHECK9-NEXT: ret void
-// CHECK9-LABEL: define {{[^@]+}}@__omp_outlined__9
-// CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[N:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]]) #[[ATTR0]] {
-// CHECK9-NEXT: entry:
-// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
-// CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
-// CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
-// CHECK9-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 8
-// CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
-// CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8
-// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[J:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8
-// CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8
-// CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
-// CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[I10:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[J11:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
-// CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
-// CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
-// CHECK9-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 8
-// CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
-// CHECK9-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 8
-// CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK9-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK9-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
-// CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK9-NEXT: [[CONV4:%.*]] = sext i32 [[DIV]] to i64
-// CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK9-NEXT: [[SUB5:%.*]] = sub nsw i32 [[TMP4]], 0
-// CHECK9-NEXT: [[DIV6:%.*]] = sdiv i32 [[SUB5]], 1
-// CHECK9-NEXT: [[CONV7:%.*]] = sext i32 [[DIV6]] to i64
-// CHECK9-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV4]], [[CONV7]]
-// CHECK9-NEXT: [[SUB8:%.*]] = sub nsw i64 [[MUL]], 1
-// CHECK9-NEXT: store i64 [[SUB8]], i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK9-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK9-NEXT: store i32 0, i32* [[J]], align 4
-// CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
-// CHECK9-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK9: land.lhs.true:
-// CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK9-NEXT: [[CMP9:%.*]] = icmp slt i32 0, [[TMP6]]
-// CHECK9-NEXT: br i1 [[CMP9]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
-// CHECK9: omp.precond.then:
-// CHECK9-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8
-// CHECK9-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK9-NEXT: store i64 [[TMP7]], i64* [[DOTOMP_UB]], align 8
-// CHECK9-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
-// CHECK9-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK9-NEXT: store i64 [[TMP8]], i64* [[DOTOMP_LB]], align 8
-// CHECK9-NEXT: store i64 [[TMP9]], i64* [[DOTOMP_UB]], align 8
-// CHECK9-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8
-// CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK9-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
-// CHECK9-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 33, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_LB]], i64* [[DOTOMP_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1)
-// CHECK9-NEXT: [[TMP12:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8
-// CHECK9-NEXT: store i64 [[TMP12]], i64* [[DOTOMP_IV]], align 8
-// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK9: omp.inner.for.cond:
-// CHECK9-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK9-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK9-NEXT: [[CMP12:%.*]] = icmp ule i64 [[TMP13]], [[TMP14]]
-// CHECK9-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK9: omp.inner.for.body:
-// CHECK9-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK9-NEXT: [[SUB13:%.*]] = sub nsw i32 [[TMP16]], 0
-// CHECK9-NEXT: [[DIV14:%.*]] = sdiv i32 [[SUB13]], 1
-// CHECK9-NEXT: [[MUL15:%.*]] = mul nsw i32 1, [[DIV14]]
-// CHECK9-NEXT: [[CONV16:%.*]] = sext i32 [[MUL15]] to i64
-// CHECK9-NEXT: [[DIV17:%.*]] = sdiv i64 [[TMP15]], [[CONV16]]
-// CHECK9-NEXT: [[MUL18:%.*]] = mul nsw i64 [[DIV17]], 1
-// CHECK9-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL18]]
-// CHECK9-NEXT: [[CONV19:%.*]] = trunc i64 [[ADD]] to i32
-// CHECK9-NEXT: store i32 [[CONV19]], i32* [[I10]], align 4
-// CHECK9-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK9-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK9-NEXT: [[SUB20:%.*]] = sub nsw i32 [[TMP19]], 0
-// CHECK9-NEXT: [[DIV21:%.*]] = sdiv i32 [[SUB20]], 1
-// CHECK9-NEXT: [[MUL22:%.*]] = mul nsw i32 1, [[DIV21]]
-// CHECK9-NEXT: [[CONV23:%.*]] = sext i32 [[MUL22]] to i64
-// CHECK9-NEXT: [[DIV24:%.*]] = sdiv i64 [[TMP18]], [[CONV23]]
-// CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK9-NEXT: [[SUB25:%.*]] = sub nsw i32 [[TMP20]], 0
-// CHECK9-NEXT: [[DIV26:%.*]] = sdiv i32 [[SUB25]], 1
-// CHECK9-NEXT: [[MUL27:%.*]] = mul nsw i32 1, [[DIV26]]
-// CHECK9-NEXT: [[CONV28:%.*]] = sext i32 [[MUL27]] to i64
-// CHECK9-NEXT: [[MUL29:%.*]] = mul nsw i64 [[DIV24]], [[CONV28]]
-// CHECK9-NEXT: [[SUB30:%.*]] = sub nsw i64 [[TMP17]], [[MUL29]]
-// CHECK9-NEXT: [[MUL31:%.*]] = mul nsw i64 [[SUB30]], 1
-// CHECK9-NEXT: [[ADD32:%.*]] = add nsw i64 0, [[MUL31]]
-// CHECK9-NEXT: [[CONV33:%.*]] = trunc i64 [[ADD32]] to i32
-// CHECK9-NEXT: store i32 [[CONV33]], i32* [[J11]], align 4
-// CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[I10]], align 4
-// CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[J11]], align 4
-// CHECK9-NEXT: [[ADD34:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
-// CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[I10]], align 4
-// CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP23]] to i64
-// CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [10 x i32]], [10 x [10 x i32]]* [[TMP0]], i64 0, i64 [[IDXPROM]]
-// CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[J11]], align 4
-// CHECK9-NEXT: [[IDXPROM35:%.*]] = sext i32 [[TMP24]] to i64
-// CHECK9-NEXT: [[ARRAYIDX36:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[ARRAYIDX]], i64 0, i64 [[IDXPROM35]]
-// CHECK9-NEXT: store i32 [[ADD34]], i32* [[ARRAYIDX36]], align 4
-// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK9: omp.body.continue:
-// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK9: omp.inner.for.inc:
-// CHECK9-NEXT: [[TMP25:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK9-NEXT: [[TMP26:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8
-// CHECK9-NEXT: [[ADD37:%.*]] = add nsw i64 [[TMP25]], [[TMP26]]
-// CHECK9-NEXT: store i64 [[ADD37]], i64* [[DOTOMP_IV]], align 8
-// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK9: omp.inner.for.end:
-// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK9: omp.loop.exit:
-// CHECK9-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4
-// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP28]])
-// CHECK9-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK9: omp.precond.end:
-// CHECK9-NEXT: ret void
-// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l74
-// CHECK9-SAME: (i64 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* [[V:%.*]]) #[[ATTR0]] {
-// CHECK9-NEXT: entry:
-// CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
-// CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
-// CHECK9-NEXT: [[V_ADDR:%.*]] = alloca i32*, align 8
-// CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
-// CHECK9-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
-// CHECK9-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
-// CHECK9-NEXT: store i32* [[V]], i32** [[V_ADDR]], align 8
-// CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
-// CHECK9-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
-// CHECK9-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK9-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK9-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK9: .execute:
-// CHECK9-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
-// CHECK9-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
-// CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
-// CHECK9-NEXT: [[TMP4:%.*]] = load i32*, i32** [[V_ADDR]], align 8
-// CHECK9-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK9-NEXT: call void @__omp_outlined__10(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i64 [[TMP3]], [1000 x i32]* [[TMP0]], i32* [[TMP4]]) #[[ATTR3]]
-// CHECK9-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK9: .omp.deinit:
-// CHECK9-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK9-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK9: .exit:
-// CHECK9-NEXT: ret void
-// CHECK9-LABEL: define {{[^@]+}}@__omp_outlined__10
-// CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* [[V:%.*]]) #[[ATTR0]] {
-// CHECK9-NEXT: entry:
-// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
-// CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
-// CHECK9-NEXT: [[V_ADDR:%.*]] = alloca i32*, align 8
-// CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
-// CHECK9-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [5 x i8*], align 8
-// CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
-// CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
-// CHECK9-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
-// CHECK9-NEXT: store i32* [[V]], i32** [[V_ADDR]], align 8
-// CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
-// CHECK9-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
-// CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK9-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK9-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK9: omp.precond.then:
-// CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK9-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK9-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
-// CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
-// CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK9: cond.true:
-// CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK9-NEXT: br label [[COND_END:%.*]]
-// CHECK9: cond.false:
-// CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: br label [[COND_END]]
-// CHECK9: cond.end:
-// CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
-// CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK9-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK9: omp.inner.for.cond:
-// CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1
-// CHECK9-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]
-// CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK9: omp.inner.for.body:
-// CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK9-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i64
-// CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
-// CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK9-NEXT: [[CONV6:%.*]] = bitcast i64* [[N_CASTED]] to i32*
-// CHECK9-NEXT: store i32 [[TMP18]], i32* [[CONV6]], align 4
-// CHECK9-NEXT: [[TMP19:%.*]] = load i64, i64* [[N_CASTED]], align 8
-// CHECK9-NEXT: [[TMP20:%.*]] = load i32*, i32** [[V_ADDR]], align 8
-// CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
-// CHECK9-NEXT: [[TMP22:%.*]] = inttoptr i64 [[TMP15]] to i8*
-// CHECK9-NEXT: store i8* [[TMP22]], i8** [[TMP21]], align 8
-// CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
-// CHECK9-NEXT: [[TMP24:%.*]] = inttoptr i64 [[TMP17]] to i8*
-// CHECK9-NEXT: store i8* [[TMP24]], i8** [[TMP23]], align 8
-// CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
-// CHECK9-NEXT: [[TMP26:%.*]] = inttoptr i64 [[TMP19]] to i8*
-// CHECK9-NEXT: store i8* [[TMP26]], i8** [[TMP25]], align 8
-// CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 3
-// CHECK9-NEXT: [[TMP28:%.*]] = bitcast [1000 x i32]* [[TMP0]] to i8*
-// CHECK9-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 8
-// CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 4
-// CHECK9-NEXT: [[TMP30:%.*]] = bitcast i32* [[TMP20]] to i8*
-// CHECK9-NEXT: store i8* [[TMP30]], i8** [[TMP29]], align 8
-// CHECK9-NEXT: [[TMP31:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK9-NEXT: [[TMP32:%.*]] = load i32, i32* [[TMP31]], align 4
-// CHECK9-NEXT: [[TMP33:%.*]] = bitcast [5 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK9-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP32]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, i64, [1000 x i32]*, i32*)* @__omp_outlined__11 to i8*), i8* null, i8** [[TMP33]], i64 5)
-// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK9: omp.inner.for.inc:
-// CHECK9-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK9-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP34]], [[TMP35]]
-// CHECK9-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK9-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK9-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP36]], [[TMP37]]
-// CHECK9-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK9-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK9-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP38]], [[TMP39]]
-// CHECK9-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK9-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP40]], [[TMP41]]
-// CHECK9-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
-// CHECK9: cond.true11:
-// CHECK9-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK9-NEXT: br label [[COND_END13:%.*]]
-// CHECK9: cond.false12:
-// CHECK9-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: br label [[COND_END13]]
-// CHECK9: cond.end13:
-// CHECK9-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP42]], [[COND_TRUE11]] ], [ [[TMP43]], [[COND_FALSE12]] ]
-// CHECK9-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK9-NEXT: store i32 [[TMP44]], i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK9: omp.inner.for.end:
-// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK9: omp.loop.exit:
-// CHECK9-NEXT: [[TMP45:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK9-NEXT: [[TMP46:%.*]] = load i32, i32* [[TMP45]], align 4
-// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP46]])
-// CHECK9-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK9: omp.precond.end:
-// CHECK9-NEXT: ret void
-// CHECK9-LABEL: define {{[^@]+}}@__omp_outlined__11
-// CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* [[V:%.*]]) #[[ATTR0]] {
-// CHECK9-NEXT: entry:
-// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
-// CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
-// CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
-// CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
-// CHECK9-NEXT: [[V_ADDR:%.*]] = alloca i32*, align 8
-// CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[I5:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
-// CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
-// CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
-// CHECK9-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
-// CHECK9-NEXT: store i32* [[V]], i32** [[V_ADDR]], align 8
-// CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
-// CHECK9-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
-// CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK9-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK9-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK9: omp.precond.then:
-// CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
-// CHECK9-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
-// CHECK9-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP5]] to i32
-// CHECK9-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK9-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP6]] to i32
-// CHECK9-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4
-// CHECK9-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4
-// CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK9-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK9-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK9: omp.inner.for.cond:
-// CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: [[CONV6:%.*]] = sext i32 [[TMP10]] to i64
-// CHECK9-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK9-NEXT: [[CMP7:%.*]] = icmp ule i64 [[CONV6]], [[TMP11]]
-// CHECK9-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK9: omp.inner.for.body:
-// CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
-// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK9-NEXT: store i32 [[ADD]], i32* [[I5]], align 4
-// CHECK9-NEXT: [[TMP13:%.*]] = load i32*, i32** [[V_ADDR]], align 8
-// CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[I5]], align 4
-// CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP14]] to i64
-// CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP13]], i64 [[IDXPROM]]
-// CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
-// CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[I5]], align 4
-// CHECK9-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP16]] to i64
-// CHECK9-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM8]]
-// CHECK9-NEXT: store i32 [[TMP15]], i32* [[ARRAYIDX9]], align 4
-// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK9: omp.body.continue:
-// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK9: omp.inner.for.inc:
-// CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK9-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
-// CHECK9-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK9: omp.inner.for.end:
-// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK9: omp.loop.exit:
-// CHECK9-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4
-// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]])
-// CHECK9-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK9: omp.precond.end:
-// CHECK9-NEXT: ret void
-// CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l43
-// CHECK10-SAME: (i64 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i64 [[L:%.*]]) #[[ATTR0:[0-9]+]] {
-// CHECK10-NEXT: entry:
-// CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
-// CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
-// CHECK10-NEXT: [[L_ADDR:%.*]] = alloca i64, align 8
-// CHECK10-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
-// CHECK10-NEXT: [[L_CASTED:%.*]] = alloca i64, align 8
-// CHECK10-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
-// CHECK10-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
-// CHECK10-NEXT: store i64 [[L]], i64* [[L_ADDR]], align 8
-// CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
-// CHECK10-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
-// CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[L_ADDR]] to i32*
-// CHECK10-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK10-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK10-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK10: .execute:
-// CHECK10-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]])
-// CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK10-NEXT: [[CONV2:%.*]] = bitcast i64* [[N_CASTED]] to i32*
-// CHECK10-NEXT: store i32 [[TMP2]], i32* [[CONV2]], align 4
-// CHECK10-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
-// CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV1]], align 8
-// CHECK10-NEXT: [[CONV3:%.*]] = bitcast i64* [[L_CASTED]] to i32*
-// CHECK10-NEXT: store i32 [[TMP4]], i32* [[CONV3]], align 4
-// CHECK10-NEXT: [[TMP5:%.*]] = load i64, i64* [[L_CASTED]], align 8
-// CHECK10-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK10-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i64 [[TMP3]], [1000 x i32]* [[TMP0]], i64 [[TMP5]]) #[[ATTR3:[0-9]+]]
-// CHECK10-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK10: .omp.deinit:
-// CHECK10-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK10-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK10: .exit:
-// CHECK10-NEXT: ret void
-// CHECK10-LABEL: define {{[^@]+}}@__omp_outlined__
-// CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i64 [[L:%.*]]) #[[ATTR0]] {
-// CHECK10-NEXT: entry:
-// CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
-// CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
-// CHECK10-NEXT: [[L_ADDR:%.*]] = alloca i64, align 8
-// CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[I5:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
-// CHECK10-NEXT: [[L_CASTED:%.*]] = alloca i64, align 8
-// CHECK10-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [5 x i8*], align 8
-// CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
-// CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
-// CHECK10-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
-// CHECK10-NEXT: store i64 [[L]], i64* [[L_ADDR]], align 8
-// CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
-// CHECK10-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
-// CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[L_ADDR]] to i32*
-// CHECK10-NEXT: [[TMP1:%.*]] = call i8* @__kmpc_data_sharing_push_stack(i64 4, i16 1)
-// CHECK10-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to %struct._globalized_locals_ty*
-// CHECK10-NEXT: [[L2:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY:%.*]], %struct._globalized_locals_ty* [[TMP2]], i32 0, i32 0
-// CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK10-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
-// CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK10-NEXT: [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK10-NEXT: store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_3]], align 4
-// CHECK10-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
-// CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK10: omp.precond.then:
-// CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
-// CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK10-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 128)
-// CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
-// CHECK10-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
-// CHECK10-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK10: cond.true:
-// CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
-// CHECK10-NEXT: br label [[COND_END:%.*]]
-// CHECK10: cond.false:
-// CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: br label [[COND_END]]
-// CHECK10: cond.end:
-// CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
-// CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK10-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK10: omp.inner.for.cond:
-// CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
-// CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], 1
-// CHECK10-NEXT: [[CMP7:%.*]] = icmp slt i32 [[TMP14]], [[ADD]]
-// CHECK10-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK10: omp.inner.for.body:
-// CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK10-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
-// CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
-// CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK10-NEXT: [[CONV8:%.*]] = bitcast i64* [[N_CASTED]] to i32*
-// CHECK10-NEXT: store i32 [[TMP20]], i32* [[CONV8]], align 4
-// CHECK10-NEXT: [[TMP21:%.*]] = load i64, i64* [[N_CASTED]], align 8
-// CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[CONV1]], align 8
-// CHECK10-NEXT: [[CONV9:%.*]] = bitcast i64* [[L_CASTED]] to i32*
-// CHECK10-NEXT: store i32 [[TMP22]], i32* [[CONV9]], align 4
-// CHECK10-NEXT: [[TMP23:%.*]] = load i64, i64* [[L_CASTED]], align 8
-// CHECK10-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
-// CHECK10-NEXT: [[TMP25:%.*]] = inttoptr i64 [[TMP17]] to i8*
-// CHECK10-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 8
-// CHECK10-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
-// CHECK10-NEXT: [[TMP27:%.*]] = inttoptr i64 [[TMP19]] to i8*
-// CHECK10-NEXT: store i8* [[TMP27]], i8** [[TMP26]], align 8
-// CHECK10-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
-// CHECK10-NEXT: [[TMP29:%.*]] = inttoptr i64 [[TMP21]] to i8*
-// CHECK10-NEXT: store i8* [[TMP29]], i8** [[TMP28]], align 8
-// CHECK10-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 3
-// CHECK10-NEXT: [[TMP31:%.*]] = bitcast [1000 x i32]* [[TMP0]] to i8*
-// CHECK10-NEXT: store i8* [[TMP31]], i8** [[TMP30]], align 8
-// CHECK10-NEXT: [[TMP32:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 4
-// CHECK10-NEXT: [[TMP33:%.*]] = inttoptr i64 [[TMP23]] to i8*
-// CHECK10-NEXT: store i8* [[TMP33]], i8** [[TMP32]], align 8
-// CHECK10-NEXT: [[TMP34:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK10-NEXT: [[TMP35:%.*]] = load i32, i32* [[TMP34]], align 4
-// CHECK10-NEXT: [[TMP36:%.*]] = bitcast [5 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK10-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP35]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, i64, [1000 x i32]*, i64)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP36]], i64 5)
-// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK10: omp.inner.for.inc:
-// CHECK10-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK10-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP37]], [[TMP38]]
-// CHECK10-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK10-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK10-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP39]], [[TMP40]]
-// CHECK10-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK10-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK10-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP41]], [[TMP42]]
-// CHECK10-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
-// CHECK10-NEXT: [[CMP13:%.*]] = icmp sgt i32 [[TMP43]], [[TMP44]]
-// CHECK10-NEXT: br i1 [[CMP13]], label [[COND_TRUE14:%.*]], label [[COND_FALSE15:%.*]]
-// CHECK10: cond.true14:
-// CHECK10-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
-// CHECK10-NEXT: br label [[COND_END16:%.*]]
-// CHECK10: cond.false15:
-// CHECK10-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: br label [[COND_END16]]
-// CHECK10: cond.end16:
-// CHECK10-NEXT: [[COND17:%.*]] = phi i32 [ [[TMP45]], [[COND_TRUE14]] ], [ [[TMP46]], [[COND_FALSE15]] ]
-// CHECK10-NEXT: store i32 [[COND17]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK10-NEXT: store i32 [[TMP47]], i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK10: omp.inner.for.end:
-// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK10: omp.loop.exit:
-// CHECK10-NEXT: [[TMP48:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK10-NEXT: [[TMP49:%.*]] = load i32, i32* [[TMP48]], align 4
-// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP49]])
-// CHECK10-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK10-NEXT: [[TMP51:%.*]] = icmp ne i32 [[TMP50]], 0
-// CHECK10-NEXT: br i1 [[TMP51]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
-// CHECK10: .omp.lastprivate.then:
-// CHECK10-NEXT: [[TMP52:%.*]] = load i32, i32* [[CONV1]], align 8
-// CHECK10-NEXT: store i32 [[TMP52]], i32* [[CONV1]], align 8
-// CHECK10-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
-// CHECK10: .omp.lastprivate.done:
-// CHECK10-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK10: omp.precond.end:
-// CHECK10-NEXT: call void @__kmpc_data_sharing_pop_stack(i8* [[TMP1]])
-// CHECK10-NEXT: ret void
-// CHECK10-LABEL: define {{[^@]+}}@__omp_outlined__1
-// CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i64 [[L:%.*]]) #[[ATTR0]] {
-// CHECK10-NEXT: entry:
-// CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
-// CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
-// CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
-// CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
-// CHECK10-NEXT: [[L_ADDR:%.*]] = alloca i64, align 8
-// CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[I6:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
-// CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
-// CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
-// CHECK10-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
-// CHECK10-NEXT: store i64 [[L]], i64* [[L_ADDR]], align 8
-// CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
-// CHECK10-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
-// CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[L_ADDR]] to i32*
-// CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK10-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK10-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK10-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK10-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK10: omp.precond.then:
-// CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
-// CHECK10-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
-// CHECK10-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP5]] to i32
-// CHECK10-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK10-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP6]] to i32
-// CHECK10-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4
-// CHECK10-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4
-// CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK10-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 32)
-// CHECK10-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
-// CHECK10: omp.dispatch.cond:
-// CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK10-NEXT: [[CONV7:%.*]] = sext i32 [[TMP9]] to i64
-// CHECK10-NEXT: [[TMP10:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK10-NEXT: [[CMP8:%.*]] = icmp ugt i64 [[CONV7]], [[TMP10]]
-// CHECK10-NEXT: br i1 [[CMP8]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK10: cond.true:
-// CHECK10-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK10-NEXT: br label [[COND_END:%.*]]
-// CHECK10: cond.false:
-// CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK10-NEXT: [[CONV9:%.*]] = sext i32 [[TMP12]] to i64
-// CHECK10-NEXT: br label [[COND_END]]
-// CHECK10: cond.end:
-// CHECK10-NEXT: [[COND:%.*]] = phi i64 [ [[TMP11]], [[COND_TRUE]] ], [ [[CONV9]], [[COND_FALSE]] ]
-// CHECK10-NEXT: [[CONV10:%.*]] = trunc i64 [[COND]] to i32
-// CHECK10-NEXT: store i32 [[CONV10]], i32* [[DOTOMP_UB]], align 4
-// CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK10-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK10-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
-// CHECK10-NEXT: br i1 [[CMP11]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
-// CHECK10: omp.dispatch.body:
-// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK10: omp.inner.for.cond:
-// CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK10-NEXT: [[CMP12:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
-// CHECK10-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK10: omp.inner.for.body:
-// CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
-// CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK10-NEXT: store i32 [[ADD]], i32* [[I6]], align 4
-// CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[I6]], align 4
-// CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
-// CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
-// CHECK10-NEXT: store i32 1, i32* [[ARRAYIDX]], align 4
-// CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[I6]], align 4
-// CHECK10-NEXT: store i32 [[TMP20]], i32* [[CONV1]], align 8
-// CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK10: omp.body.continue:
-// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK10: omp.inner.for.inc:
-// CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP21]], 1
-// CHECK10-NEXT: store i32 [[ADD13]], i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK10: omp.inner.for.end:
-// CHECK10-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
-// CHECK10: omp.dispatch.inc:
-// CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK10-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
-// CHECK10-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_LB]], align 4
-// CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK10-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK10-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
-// CHECK10-NEXT: store i32 [[ADD15]], i32* [[DOTOMP_UB]], align 4
-// CHECK10-NEXT: br label [[OMP_DISPATCH_COND]]
-// CHECK10: omp.dispatch.end:
-// CHECK10-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK10-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
-// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP27]])
-// CHECK10-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK10-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
-// CHECK10-NEXT: br i1 [[TMP29]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
-// CHECK10: .omp.lastprivate.then:
-// CHECK10-NEXT: [[TMP30:%.*]] = load i32, i32* [[CONV1]], align 8
-// CHECK10-NEXT: store i32 [[TMP30]], i32* [[CONV1]], align 8
-// CHECK10-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
-// CHECK10: .omp.lastprivate.done:
-// CHECK10-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK10: omp.precond.end:
-// CHECK10-NEXT: ret void
-// CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l49
-// CHECK10-SAME: (i64 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
-// CHECK10-NEXT: entry:
-// CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
-// CHECK10-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 8
-// CHECK10-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
-// CHECK10-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
-// CHECK10-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 8
-// CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
-// CHECK10-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 8
-// CHECK10-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK10-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK10-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK10: .execute:
-// CHECK10-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
-// CHECK10-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
-// CHECK10-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
-// CHECK10-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK10-NEXT: call void @__omp_outlined__2(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i64 [[TMP3]], [1000 x i16]* [[TMP0]]) #[[ATTR3]]
-// CHECK10-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK10: .omp.deinit:
-// CHECK10-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK10-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK10: .exit:
-// CHECK10-NEXT: ret void
-// CHECK10-LABEL: define {{[^@]+}}@__omp_outlined__2
-// CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
-// CHECK10-NEXT: entry:
-// CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
-// CHECK10-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 8
-// CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
-// CHECK10-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 8
-// CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
-// CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
-// CHECK10-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 8
-// CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
-// CHECK10-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 8
-// CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK10-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK10-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK10: omp.precond.then:
-// CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK10-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK10-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
-// CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK10-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
-// CHECK10-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK10: cond.true:
-// CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK10-NEXT: br label [[COND_END:%.*]]
-// CHECK10: cond.false:
-// CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: br label [[COND_END]]
-// CHECK10: cond.end:
-// CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
-// CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK10-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK10: omp.inner.for.cond:
-// CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1
-// CHECK10-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]
-// CHECK10-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK10: omp.inner.for.body:
-// CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK10-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i64
-// CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
-// CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK10-NEXT: [[CONV6:%.*]] = bitcast i64* [[N_CASTED]] to i32*
-// CHECK10-NEXT: store i32 [[TMP18]], i32* [[CONV6]], align 4
-// CHECK10-NEXT: [[TMP19:%.*]] = load i64, i64* [[N_CASTED]], align 8
-// CHECK10-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
-// CHECK10-NEXT: [[TMP21:%.*]] = inttoptr i64 [[TMP15]] to i8*
-// CHECK10-NEXT: store i8* [[TMP21]], i8** [[TMP20]], align 8
-// CHECK10-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
-// CHECK10-NEXT: [[TMP23:%.*]] = inttoptr i64 [[TMP17]] to i8*
-// CHECK10-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 8
-// CHECK10-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
-// CHECK10-NEXT: [[TMP25:%.*]] = inttoptr i64 [[TMP19]] to i8*
-// CHECK10-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 8
-// CHECK10-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 3
-// CHECK10-NEXT: [[TMP27:%.*]] = bitcast [1000 x i16]* [[TMP0]] to i8*
-// CHECK10-NEXT: store i8* [[TMP27]], i8** [[TMP26]], align 8
-// CHECK10-NEXT: [[TMP28:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK10-NEXT: [[TMP29:%.*]] = load i32, i32* [[TMP28]], align 4
-// CHECK10-NEXT: [[TMP30:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK10-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP29]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, i64, [1000 x i16]*)* @__omp_outlined__3 to i8*), i8* null, i8** [[TMP30]], i64 4)
-// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK10: omp.inner.for.inc:
-// CHECK10-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK10-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP31]], [[TMP32]]
-// CHECK10-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK10-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK10-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP33]], [[TMP34]]
-// CHECK10-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK10-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK10-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP35]], [[TMP36]]
-// CHECK10-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK10-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP37]], [[TMP38]]
-// CHECK10-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
-// CHECK10: cond.true11:
-// CHECK10-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK10-NEXT: br label [[COND_END13:%.*]]
-// CHECK10: cond.false12:
-// CHECK10-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: br label [[COND_END13]]
-// CHECK10: cond.end13:
-// CHECK10-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP39]], [[COND_TRUE11]] ], [ [[TMP40]], [[COND_FALSE12]] ]
-// CHECK10-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK10-NEXT: store i32 [[TMP41]], i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK10: omp.inner.for.end:
-// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK10: omp.loop.exit:
-// CHECK10-NEXT: [[TMP42:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK10-NEXT: [[TMP43:%.*]] = load i32, i32* [[TMP42]], align 4
-// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP43]])
-// CHECK10-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK10: omp.precond.end:
-// CHECK10-NEXT: ret void
-// CHECK10-LABEL: define {{[^@]+}}@__omp_outlined__3
-// CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
-// CHECK10-NEXT: entry:
-// CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
-// CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
-// CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
-// CHECK10-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 8
-// CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[I5:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
-// CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
-// CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
-// CHECK10-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 8
-// CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
-// CHECK10-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 8
-// CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK10-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK10-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK10: omp.precond.then:
-// CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
-// CHECK10-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
-// CHECK10-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP5]] to i32
-// CHECK10-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK10-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP6]] to i32
-// CHECK10-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4
-// CHECK10-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4
-// CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK10-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK10-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK10: omp.inner.for.cond:
-// CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: [[CONV6:%.*]] = sext i32 [[TMP10]] to i64
-// CHECK10-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK10-NEXT: [[CMP7:%.*]] = icmp ule i64 [[CONV6]], [[TMP11]]
-// CHECK10-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK10: omp.inner.for.body:
-// CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
-// CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK10-NEXT: store i32 [[ADD]], i32* [[I5]], align 4
-// CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[I5]], align 4
-// CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
-// CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i16], [1000 x i16]* [[TMP0]], i64 0, i64 [[IDXPROM]]
-// CHECK10-NEXT: [[TMP14:%.*]] = load i16, i16* [[ARRAYIDX]], align 2
-// CHECK10-NEXT: [[CONV8:%.*]] = sext i16 [[TMP14]] to i32
-// CHECK10-NEXT: [[ADD9:%.*]] = add nsw i32 [[CONV8]], 1
-// CHECK10-NEXT: [[CONV10:%.*]] = trunc i32 [[ADD9]] to i16
-// CHECK10-NEXT: store i16 [[CONV10]], i16* [[ARRAYIDX]], align 2
-// CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK10: omp.body.continue:
-// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK10: omp.inner.for.inc:
-// CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK10-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
-// CHECK10-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK10: omp.inner.for.end:
-// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK10: omp.loop.exit:
-// CHECK10-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
-// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]])
-// CHECK10-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK10: omp.precond.end:
-// CHECK10-NEXT: ret void
-// CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l54
-// CHECK10-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
-// CHECK10-NEXT: entry:
-// CHECK10-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8
-// CHECK10-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK10-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8
-// CHECK10-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8
-// CHECK10-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK10-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK10-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK10: .execute:
-// CHECK10-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK10-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK10-NEXT: call void @__omp_outlined__4(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x i32]* [[TMP0]]) #[[ATTR3]]
-// CHECK10-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK10: .omp.deinit:
-// CHECK10-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK10-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK10: .exit:
-// CHECK10-NEXT: ret void
-// CHECK10-LABEL: define {{[^@]+}}@__omp_outlined__4
-// CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
-// CHECK10-NEXT: entry:
-// CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK10-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8
-// CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [3 x i8*], align 8
-// CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
-// CHECK10-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8
-// CHECK10-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8
-// CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK10-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK10-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
-// CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
-// CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK10: cond.true:
-// CHECK10-NEXT: br label [[COND_END:%.*]]
-// CHECK10: cond.false:
-// CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: br label [[COND_END]]
-// CHECK10: cond.end:
-// CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
-// CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK10: omp.inner.for.cond:
-// CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP6]], 10
-// CHECK10-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK10: omp.inner.for.body:
-// CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK10-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
-// CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
-// CHECK10-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
-// CHECK10-NEXT: [[TMP12:%.*]] = inttoptr i64 [[TMP8]] to i8*
-// CHECK10-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 8
-// CHECK10-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
-// CHECK10-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP10]] to i8*
-// CHECK10-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 8
-// CHECK10-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
-// CHECK10-NEXT: [[TMP16:%.*]] = bitcast [10 x i32]* [[TMP0]] to i8*
-// CHECK10-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 8
-// CHECK10-NEXT: [[TMP17:%.*]] = bitcast [3 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK10-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @__omp_outlined__5 to i8*), i8* null, i8** [[TMP17]], i64 3)
-// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK10: omp.inner.for.inc:
-// CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
-// CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK10-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
-// CHECK10-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
-// CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP24]], 9
-// CHECK10-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
-// CHECK10: cond.true5:
-// CHECK10-NEXT: br label [[COND_END7:%.*]]
-// CHECK10: cond.false6:
-// CHECK10-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: br label [[COND_END7]]
-// CHECK10: cond.end7:
-// CHECK10-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP25]], [[COND_FALSE6]] ]
-// CHECK10-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK10-NEXT: store i32 [[TMP26]], i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK10: omp.inner.for.end:
-// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK10: omp.loop.exit:
-// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
-// CHECK10-NEXT: ret void
-// CHECK10-LABEL: define {{[^@]+}}@__omp_outlined__5
-// CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
-// CHECK10-NEXT: entry:
-// CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
-// CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
-// CHECK10-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8
-// CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
-// CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
-// CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK10-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8
-// CHECK10-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8
-// CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK10-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
-// CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
-// CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
-// CHECK10-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK10-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
-// CHECK10-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
-// CHECK10-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
-// CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK10-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
-// CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK10: omp.inner.for.cond:
-// CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: [[CONV2:%.*]] = sext i32 [[TMP6]] to i64
-// CHECK10-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK10-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV2]], [[TMP7]]
-// CHECK10-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK10: omp.inner.for.body:
-// CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
-// CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4
-// CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
-// CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64
-// CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
-// CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
-// CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
-// CHECK10-NEXT: store i32 [[ADD3]], i32* [[ARRAYIDX]], align 4
-// CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK10: omp.body.continue:
-// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK10: omp.inner.for.inc:
-// CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK10-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
-// CHECK10-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK10: omp.inner.for.end:
-// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK10: omp.loop.exit:
-// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
-// CHECK10-NEXT: ret void
-// CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l59
-// CHECK10-SAME: ([10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i64 [[F:%.*]]) #[[ATTR0]] {
-// CHECK10-NEXT: entry:
-// CHECK10-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 8
-// CHECK10-NEXT: [[F_ADDR:%.*]] = alloca i64, align 8
-// CHECK10-NEXT: [[F_CASTED:%.*]] = alloca i64, align 8
-// CHECK10-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK10-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 8
-// CHECK10-NEXT: store i64 [[F]], i64* [[F_ADDR]], align 8
-// CHECK10-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 8
-// CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[F_ADDR]] to i32*
-// CHECK10-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK10-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK10-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK10: .execute:
-// CHECK10-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[F_CASTED]] to i32*
-// CHECK10-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
-// CHECK10-NEXT: [[TMP3:%.*]] = load i64, i64* [[F_CASTED]], align 8
-// CHECK10-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK10-NEXT: call void @__omp_outlined__6(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x [10 x i32]]* [[TMP0]], i64 [[TMP3]]) #[[ATTR3]]
-// CHECK10-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK10: .omp.deinit:
-// CHECK10-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK10-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK10: .exit:
-// CHECK10-NEXT: ret void
-// CHECK10-LABEL: define {{[^@]+}}@__omp_outlined__6
-// CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i64 [[F:%.*]]) #[[ATTR0]] {
-// CHECK10-NEXT: entry:
-// CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK10-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 8
-// CHECK10-NEXT: [[F_ADDR:%.*]] = alloca i64, align 8
-// CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[K:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[J:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[F_CASTED:%.*]] = alloca i64, align 8
-// CHECK10-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 8
-// CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
-// CHECK10-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 8
-// CHECK10-NEXT: store i64 [[F]], i64* [[F_ADDR]], align 8
-// CHECK10-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 8
-// CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[F_ADDR]] to i32*
-// CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK10-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK10-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
-// CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
-// CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK10: cond.true:
-// CHECK10-NEXT: br label [[COND_END:%.*]]
-// CHECK10: cond.false:
-// CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: br label [[COND_END]]
-// CHECK10: cond.end:
-// CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
-// CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK10: omp.inner.for.cond:
-// CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP6]], 100
-// CHECK10-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK10: omp.inner.for.body:
-// CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK10-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
-// CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
-// CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK10-NEXT: [[CONV3:%.*]] = bitcast i64* [[F_CASTED]] to i32*
-// CHECK10-NEXT: store i32 [[TMP11]], i32* [[CONV3]], align 4
-// CHECK10-NEXT: [[TMP12:%.*]] = load i64, i64* [[F_CASTED]], align 8
-// CHECK10-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
-// CHECK10-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP8]] to i8*
-// CHECK10-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 8
-// CHECK10-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
-// CHECK10-NEXT: [[TMP16:%.*]] = inttoptr i64 [[TMP10]] to i8*
-// CHECK10-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 8
-// CHECK10-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
-// CHECK10-NEXT: [[TMP18:%.*]] = bitcast [10 x [10 x i32]]* [[TMP0]] to i8*
-// CHECK10-NEXT: store i8* [[TMP18]], i8** [[TMP17]], align 8
-// CHECK10-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 3
-// CHECK10-NEXT: [[TMP20:%.*]] = inttoptr i64 [[TMP12]] to i8*
-// CHECK10-NEXT: store i8* [[TMP20]], i8** [[TMP19]], align 8
-// CHECK10-NEXT: [[TMP21:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK10-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, [10 x [10 x i32]]*, i64)* @__omp_outlined__7 to i8*), i8* null, i8** [[TMP21]], i64 4)
-// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK10: omp.inner.for.inc:
-// CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
-// CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK10-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK10-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
-// CHECK10-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK10-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK10-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP26]], [[TMP27]]
-// CHECK10-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP28]], 99
-// CHECK10-NEXT: br i1 [[CMP6]], label [[COND_TRUE7:%.*]], label [[COND_FALSE8:%.*]]
-// CHECK10: cond.true7:
-// CHECK10-NEXT: br label [[COND_END9:%.*]]
-// CHECK10: cond.false8:
-// CHECK10-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: br label [[COND_END9]]
-// CHECK10: cond.end9:
-// CHECK10-NEXT: [[COND10:%.*]] = phi i32 [ 99, [[COND_TRUE7]] ], [ [[TMP29]], [[COND_FALSE8]] ]
-// CHECK10-NEXT: store i32 [[COND10]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK10-NEXT: store i32 [[TMP30]], i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK10: omp.inner.for.end:
-// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK10: omp.loop.exit:
-// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
-// CHECK10-NEXT: ret void
-// CHECK10-LABEL: define {{[^@]+}}@__omp_outlined__7
-// CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i64 [[F:%.*]]) #[[ATTR0]] {
-// CHECK10-NEXT: entry:
-// CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
-// CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
-// CHECK10-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 8
-// CHECK10-NEXT: [[F_ADDR:%.*]] = alloca i64, align 8
-// CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[K:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[J:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
-// CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
-// CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK10-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 8
-// CHECK10-NEXT: store i64 [[F]], i64* [[F_ADDR]], align 8
-// CHECK10-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 8
-// CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[F_ADDR]] to i32*
-// CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK10-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
-// CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
-// CHECK10-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32
-// CHECK10-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK10-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP2]] to i32
-// CHECK10-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_LB]], align 4
-// CHECK10-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4
-// CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK10-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
-// CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK10: omp.inner.for.cond:
-// CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: [[CONV4:%.*]] = sext i32 [[TMP6]] to i64
-// CHECK10-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK10-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV4]], [[TMP7]]
-// CHECK10-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK10: omp.inner.for.body:
-// CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP8]], 10
-// CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
-// CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4
-// CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: [[DIV5:%.*]] = sdiv i32 [[TMP10]], 10
-// CHECK10-NEXT: [[MUL6:%.*]] = mul nsw i32 [[DIV5]], 10
-// CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL6]]
-// CHECK10-NEXT: [[MUL7:%.*]] = mul nsw i32 [[SUB]], 1
-// CHECK10-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL7]]
-// CHECK10-NEXT: store i32 [[ADD8]], i32* [[J]], align 4
-// CHECK10-NEXT: store i32 10, i32* [[K]], align 4
-// CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
-// CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[J]], align 4
-// CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK10-NEXT: [[MUL9:%.*]] = mul nsw i32 [[TMP12]], [[TMP13]]
-// CHECK10-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP11]], [[MUL9]]
-// CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[K]], align 4
-// CHECK10-NEXT: [[ADD11:%.*]] = add nsw i32 [[ADD10]], [[TMP14]]
-// CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4
-// CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64
-// CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [10 x i32]], [10 x [10 x i32]]* [[TMP0]], i64 0, i64 [[IDXPROM]]
-// CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[J]], align 4
-// CHECK10-NEXT: [[IDXPROM12:%.*]] = sext i32 [[TMP16]] to i64
-// CHECK10-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[ARRAYIDX]], i64 0, i64 [[IDXPROM12]]
-// CHECK10-NEXT: store i32 [[ADD11]], i32* [[ARRAYIDX13]], align 4
-// CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK10: omp.body.continue:
-// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK10: omp.inner.for.inc:
-// CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK10-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
-// CHECK10-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK10: omp.inner.for.end:
-// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK10: omp.loop.exit:
-// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
-// CHECK10-NEXT: ret void
-// CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l67
-// CHECK10-SAME: (i64 [[N:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]]) #[[ATTR0]] {
-// CHECK10-NEXT: entry:
-// CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
-// CHECK10-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 8
-// CHECK10-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
-// CHECK10-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
-// CHECK10-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 8
-// CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
-// CHECK10-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 8
-// CHECK10-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK10-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK10-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK10: .execute:
-// CHECK10-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
-// CHECK10-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
-// CHECK10-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
-// CHECK10-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK10-NEXT: call void @__omp_outlined__8(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i64 [[TMP3]], [10 x [10 x i32]]* [[TMP0]]) #[[ATTR3]]
-// CHECK10-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK10: .omp.deinit:
-// CHECK10-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK10-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK10: .exit:
-// CHECK10-NEXT: ret void
-// CHECK10-LABEL: define {{[^@]+}}@__omp_outlined__8
-// CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]]) #[[ATTR0]] {
-// CHECK10-NEXT: entry:
-// CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
-// CHECK10-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 8
-// CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
-// CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8
-// CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[J:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i64, align 8
-// CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i64, align 8
-// CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
-// CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[I10:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[J11:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
-// CHECK10-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 8
-// CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
-// CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
-// CHECK10-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 8
-// CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
-// CHECK10-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 8
-// CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK10-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK10-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
-// CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK10-NEXT: [[CONV4:%.*]] = sext i32 [[DIV]] to i64
-// CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK10-NEXT: [[SUB5:%.*]] = sub nsw i32 [[TMP4]], 0
-// CHECK10-NEXT: [[DIV6:%.*]] = sdiv i32 [[SUB5]], 1
-// CHECK10-NEXT: [[CONV7:%.*]] = sext i32 [[DIV6]] to i64
-// CHECK10-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV4]], [[CONV7]]
-// CHECK10-NEXT: [[SUB8:%.*]] = sub nsw i64 [[MUL]], 1
-// CHECK10-NEXT: store i64 [[SUB8]], i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK10-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK10-NEXT: store i32 0, i32* [[J]], align 4
-// CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
-// CHECK10-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK10: land.lhs.true:
-// CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK10-NEXT: [[CMP9:%.*]] = icmp slt i32 0, [[TMP6]]
-// CHECK10-NEXT: br i1 [[CMP9]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
-// CHECK10: omp.precond.then:
-// CHECK10-NEXT: store i64 0, i64* [[DOTOMP_COMB_LB]], align 8
-// CHECK10-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK10-NEXT: store i64 [[TMP7]], i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK10-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8
-// CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK10-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK10-NEXT: [[CONV12:%.*]] = zext i32 [[NVPTX_NUM_THREADS]] to i64
-// CHECK10-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
-// CHECK10-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_COMB_LB]], i64* [[DOTOMP_COMB_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 [[CONV12]])
-// CHECK10-NEXT: [[TMP10:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK10-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK10-NEXT: [[CMP13:%.*]] = icmp sgt i64 [[TMP10]], [[TMP11]]
-// CHECK10-NEXT: br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK10: cond.true:
-// CHECK10-NEXT: [[TMP12:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK10-NEXT: br label [[COND_END:%.*]]
-// CHECK10: cond.false:
-// CHECK10-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK10-NEXT: br label [[COND_END]]
-// CHECK10: cond.end:
-// CHECK10-NEXT: [[COND:%.*]] = phi i64 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
-// CHECK10-NEXT: store i64 [[COND]], i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK10-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
-// CHECK10-NEXT: store i64 [[TMP14]], i64* [[DOTOMP_IV]], align 8
-// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK10: omp.inner.for.cond:
-// CHECK10-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK10-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK10-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP16]], 1
-// CHECK10-NEXT: [[CMP14:%.*]] = icmp slt i64 [[TMP15]], [[ADD]]
-// CHECK10-NEXT: br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK10: omp.inner.for.body:
-// CHECK10-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
-// CHECK10-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK10-NEXT: [[CONV15:%.*]] = bitcast i64* [[N_CASTED]] to i32*
-// CHECK10-NEXT: store i32 [[TMP19]], i32* [[CONV15]], align 4
-// CHECK10-NEXT: [[TMP20:%.*]] = load i64, i64* [[N_CASTED]], align 8
-// CHECK10-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
-// CHECK10-NEXT: [[TMP22:%.*]] = inttoptr i64 [[TMP17]] to i8*
-// CHECK10-NEXT: store i8* [[TMP22]], i8** [[TMP21]], align 8
-// CHECK10-NEXT: [[TMP23:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
-// CHECK10-NEXT: [[TMP24:%.*]] = inttoptr i64 [[TMP18]] to i8*
-// CHECK10-NEXT: store i8* [[TMP24]], i8** [[TMP23]], align 8
-// CHECK10-NEXT: [[TMP25:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
-// CHECK10-NEXT: [[TMP26:%.*]] = inttoptr i64 [[TMP20]] to i8*
-// CHECK10-NEXT: store i8* [[TMP26]], i8** [[TMP25]], align 8
-// CHECK10-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 3
-// CHECK10-NEXT: [[TMP28:%.*]] = bitcast [10 x [10 x i32]]* [[TMP0]] to i8*
-// CHECK10-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 8
-// CHECK10-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK10-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4
-// CHECK10-NEXT: [[TMP31:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK10-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP30]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, i64, [10 x [10 x i32]]*)* @__omp_outlined__9 to i8*), i8* null, i8** [[TMP31]], i64 4)
-// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK10: omp.inner.for.inc:
-// CHECK10-NEXT: [[TMP32:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK10-NEXT: [[TMP33:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8
-// CHECK10-NEXT: [[ADD16:%.*]] = add nsw i64 [[TMP32]], [[TMP33]]
-// CHECK10-NEXT: store i64 [[ADD16]], i64* [[DOTOMP_IV]], align 8
-// CHECK10-NEXT: [[TMP34:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
-// CHECK10-NEXT: [[TMP35:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8
-// CHECK10-NEXT: [[ADD17:%.*]] = add nsw i64 [[TMP34]], [[TMP35]]
-// CHECK10-NEXT: store i64 [[ADD17]], i64* [[DOTOMP_COMB_LB]], align 8
-// CHECK10-NEXT: [[TMP36:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK10-NEXT: [[TMP37:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8
-// CHECK10-NEXT: [[ADD18:%.*]] = add nsw i64 [[TMP36]], [[TMP37]]
-// CHECK10-NEXT: store i64 [[ADD18]], i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK10-NEXT: [[TMP38:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK10-NEXT: [[TMP39:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK10-NEXT: [[CMP19:%.*]] = icmp sgt i64 [[TMP38]], [[TMP39]]
-// CHECK10-NEXT: br i1 [[CMP19]], label [[COND_TRUE20:%.*]], label [[COND_FALSE21:%.*]]
-// CHECK10: cond.true20:
-// CHECK10-NEXT: [[TMP40:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK10-NEXT: br label [[COND_END22:%.*]]
-// CHECK10: cond.false21:
-// CHECK10-NEXT: [[TMP41:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK10-NEXT: br label [[COND_END22]]
-// CHECK10: cond.end22:
-// CHECK10-NEXT: [[COND23:%.*]] = phi i64 [ [[TMP40]], [[COND_TRUE20]] ], [ [[TMP41]], [[COND_FALSE21]] ]
-// CHECK10-NEXT: store i64 [[COND23]], i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK10-NEXT: [[TMP42:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
-// CHECK10-NEXT: store i64 [[TMP42]], i64* [[DOTOMP_IV]], align 8
-// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK10: omp.inner.for.end:
-// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK10: omp.loop.exit:
-// CHECK10-NEXT: [[TMP43:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK10-NEXT: [[TMP44:%.*]] = load i32, i32* [[TMP43]], align 4
-// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP44]])
-// CHECK10-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK10: omp.precond.end:
-// CHECK10-NEXT: ret void
-// CHECK10-LABEL: define {{[^@]+}}@__omp_outlined__9
-// CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[N:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]]) #[[ATTR0]] {
-// CHECK10-NEXT: entry:
-// CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
-// CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
-// CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
-// CHECK10-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 8
-// CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
-// CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8
-// CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[J:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8
-// CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8
-// CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
-// CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[I10:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[J11:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
-// CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
-// CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
-// CHECK10-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 8
-// CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
-// CHECK10-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 8
-// CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK10-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK10-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
-// CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK10-NEXT: [[CONV4:%.*]] = sext i32 [[DIV]] to i64
-// CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK10-NEXT: [[SUB5:%.*]] = sub nsw i32 [[TMP4]], 0
-// CHECK10-NEXT: [[DIV6:%.*]] = sdiv i32 [[SUB5]], 1
-// CHECK10-NEXT: [[CONV7:%.*]] = sext i32 [[DIV6]] to i64
-// CHECK10-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV4]], [[CONV7]]
-// CHECK10-NEXT: [[SUB8:%.*]] = sub nsw i64 [[MUL]], 1
-// CHECK10-NEXT: store i64 [[SUB8]], i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK10-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK10-NEXT: store i32 0, i32* [[J]], align 4
-// CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
-// CHECK10-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK10: land.lhs.true:
-// CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK10-NEXT: [[CMP9:%.*]] = icmp slt i32 0, [[TMP6]]
-// CHECK10-NEXT: br i1 [[CMP9]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
-// CHECK10: omp.precond.then:
-// CHECK10-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8
-// CHECK10-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK10-NEXT: store i64 [[TMP7]], i64* [[DOTOMP_UB]], align 8
-// CHECK10-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
-// CHECK10-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK10-NEXT: store i64 [[TMP8]], i64* [[DOTOMP_LB]], align 8
-// CHECK10-NEXT: store i64 [[TMP9]], i64* [[DOTOMP_UB]], align 8
-// CHECK10-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8
-// CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK10-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
-// CHECK10-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 33, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_LB]], i64* [[DOTOMP_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1)
-// CHECK10-NEXT: [[TMP12:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8
-// CHECK10-NEXT: store i64 [[TMP12]], i64* [[DOTOMP_IV]], align 8
-// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK10: omp.inner.for.cond:
-// CHECK10-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK10-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK10-NEXT: [[CMP12:%.*]] = icmp ule i64 [[TMP13]], [[TMP14]]
-// CHECK10-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK10: omp.inner.for.body:
-// CHECK10-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK10-NEXT: [[SUB13:%.*]] = sub nsw i32 [[TMP16]], 0
-// CHECK10-NEXT: [[DIV14:%.*]] = sdiv i32 [[SUB13]], 1
-// CHECK10-NEXT: [[MUL15:%.*]] = mul nsw i32 1, [[DIV14]]
-// CHECK10-NEXT: [[CONV16:%.*]] = sext i32 [[MUL15]] to i64
-// CHECK10-NEXT: [[DIV17:%.*]] = sdiv i64 [[TMP15]], [[CONV16]]
-// CHECK10-NEXT: [[MUL18:%.*]] = mul nsw i64 [[DIV17]], 1
-// CHECK10-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL18]]
-// CHECK10-NEXT: [[CONV19:%.*]] = trunc i64 [[ADD]] to i32
-// CHECK10-NEXT: store i32 [[CONV19]], i32* [[I10]], align 4
-// CHECK10-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK10-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK10-NEXT: [[SUB20:%.*]] = sub nsw i32 [[TMP19]], 0
-// CHECK10-NEXT: [[DIV21:%.*]] = sdiv i32 [[SUB20]], 1
-// CHECK10-NEXT: [[MUL22:%.*]] = mul nsw i32 1, [[DIV21]]
-// CHECK10-NEXT: [[CONV23:%.*]] = sext i32 [[MUL22]] to i64
-// CHECK10-NEXT: [[DIV24:%.*]] = sdiv i64 [[TMP18]], [[CONV23]]
-// CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK10-NEXT: [[SUB25:%.*]] = sub nsw i32 [[TMP20]], 0
-// CHECK10-NEXT: [[DIV26:%.*]] = sdiv i32 [[SUB25]], 1
-// CHECK10-NEXT: [[MUL27:%.*]] = mul nsw i32 1, [[DIV26]]
-// CHECK10-NEXT: [[CONV28:%.*]] = sext i32 [[MUL27]] to i64
-// CHECK10-NEXT: [[MUL29:%.*]] = mul nsw i64 [[DIV24]], [[CONV28]]
-// CHECK10-NEXT: [[SUB30:%.*]] = sub nsw i64 [[TMP17]], [[MUL29]]
-// CHECK10-NEXT: [[MUL31:%.*]] = mul nsw i64 [[SUB30]], 1
-// CHECK10-NEXT: [[ADD32:%.*]] = add nsw i64 0, [[MUL31]]
-// CHECK10-NEXT: [[CONV33:%.*]] = trunc i64 [[ADD32]] to i32
-// CHECK10-NEXT: store i32 [[CONV33]], i32* [[J11]], align 4
-// CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[I10]], align 4
-// CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[J11]], align 4
-// CHECK10-NEXT: [[ADD34:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
-// CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[I10]], align 4
-// CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP23]] to i64
-// CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [10 x i32]], [10 x [10 x i32]]* [[TMP0]], i64 0, i64 [[IDXPROM]]
-// CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[J11]], align 4
-// CHECK10-NEXT: [[IDXPROM35:%.*]] = sext i32 [[TMP24]] to i64
-// CHECK10-NEXT: [[ARRAYIDX36:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[ARRAYIDX]], i64 0, i64 [[IDXPROM35]]
-// CHECK10-NEXT: store i32 [[ADD34]], i32* [[ARRAYIDX36]], align 4
-// CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK10: omp.body.continue:
-// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK10: omp.inner.for.inc:
-// CHECK10-NEXT: [[TMP25:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK10-NEXT: [[TMP26:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8
-// CHECK10-NEXT: [[ADD37:%.*]] = add nsw i64 [[TMP25]], [[TMP26]]
-// CHECK10-NEXT: store i64 [[ADD37]], i64* [[DOTOMP_IV]], align 8
-// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK10: omp.inner.for.end:
-// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK10: omp.loop.exit:
-// CHECK10-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK10-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4
-// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP28]])
-// CHECK10-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK10: omp.precond.end:
-// CHECK10-NEXT: ret void
-// CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l74
-// CHECK10-SAME: (i64 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* [[V:%.*]]) #[[ATTR0]] {
-// CHECK10-NEXT: entry:
-// CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
-// CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
-// CHECK10-NEXT: [[V_ADDR:%.*]] = alloca i32*, align 8
-// CHECK10-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
-// CHECK10-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
-// CHECK10-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
-// CHECK10-NEXT: store i32* [[V]], i32** [[V_ADDR]], align 8
-// CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
-// CHECK10-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
-// CHECK10-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK10-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK10-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK10: .execute:
-// CHECK10-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
-// CHECK10-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
-// CHECK10-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
-// CHECK10-NEXT: [[TMP4:%.*]] = load i32*, i32** [[V_ADDR]], align 8
-// CHECK10-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK10-NEXT: call void @__omp_outlined__10(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i64 [[TMP3]], [1000 x i32]* [[TMP0]], i32* [[TMP4]]) #[[ATTR3]]
-// CHECK10-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK10: .omp.deinit:
-// CHECK10-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK10-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK10: .exit:
-// CHECK10-NEXT: ret void
-// CHECK10-LABEL: define {{[^@]+}}@__omp_outlined__10
-// CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* [[V:%.*]]) #[[ATTR0]] {
-// CHECK10-NEXT: entry:
-// CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
-// CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
-// CHECK10-NEXT: [[V_ADDR:%.*]] = alloca i32*, align 8
-// CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
-// CHECK10-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [5 x i8*], align 8
-// CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
-// CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
-// CHECK10-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
-// CHECK10-NEXT: store i32* [[V]], i32** [[V_ADDR]], align 8
-// CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
-// CHECK10-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
-// CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK10-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK10-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK10: omp.precond.then:
-// CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK10-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK10-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
-// CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK10-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
-// CHECK10-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK10: cond.true:
-// CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK10-NEXT: br label [[COND_END:%.*]]
-// CHECK10: cond.false:
-// CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: br label [[COND_END]]
-// CHECK10: cond.end:
-// CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
-// CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK10-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK10: omp.inner.for.cond:
-// CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1
-// CHECK10-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]
-// CHECK10-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK10: omp.inner.for.body:
-// CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK10-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i64
-// CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
-// CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK10-NEXT: [[CONV6:%.*]] = bitcast i64* [[N_CASTED]] to i32*
-// CHECK10-NEXT: store i32 [[TMP18]], i32* [[CONV6]], align 4
-// CHECK10-NEXT: [[TMP19:%.*]] = load i64, i64* [[N_CASTED]], align 8
-// CHECK10-NEXT: [[TMP20:%.*]] = load i32*, i32** [[V_ADDR]], align 8
-// CHECK10-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
-// CHECK10-NEXT: [[TMP22:%.*]] = inttoptr i64 [[TMP15]] to i8*
-// CHECK10-NEXT: store i8* [[TMP22]], i8** [[TMP21]], align 8
-// CHECK10-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
-// CHECK10-NEXT: [[TMP24:%.*]] = inttoptr i64 [[TMP17]] to i8*
-// CHECK10-NEXT: store i8* [[TMP24]], i8** [[TMP23]], align 8
-// CHECK10-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
-// CHECK10-NEXT: [[TMP26:%.*]] = inttoptr i64 [[TMP19]] to i8*
-// CHECK10-NEXT: store i8* [[TMP26]], i8** [[TMP25]], align 8
-// CHECK10-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 3
-// CHECK10-NEXT: [[TMP28:%.*]] = bitcast [1000 x i32]* [[TMP0]] to i8*
-// CHECK10-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 8
-// CHECK10-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 4
-// CHECK10-NEXT: [[TMP30:%.*]] = bitcast i32* [[TMP20]] to i8*
-// CHECK10-NEXT: store i8* [[TMP30]], i8** [[TMP29]], align 8
-// CHECK10-NEXT: [[TMP31:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK10-NEXT: [[TMP32:%.*]] = load i32, i32* [[TMP31]], align 4
-// CHECK10-NEXT: [[TMP33:%.*]] = bitcast [5 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK10-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP32]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, i64, [1000 x i32]*, i32*)* @__omp_outlined__11 to i8*), i8* null, i8** [[TMP33]], i64 5)
-// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK10: omp.inner.for.inc:
-// CHECK10-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK10-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP34]], [[TMP35]]
-// CHECK10-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK10-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK10-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP36]], [[TMP37]]
-// CHECK10-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK10-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK10-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP38]], [[TMP39]]
-// CHECK10-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK10-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP40]], [[TMP41]]
-// CHECK10-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
-// CHECK10: cond.true11:
-// CHECK10-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK10-NEXT: br label [[COND_END13:%.*]]
-// CHECK10: cond.false12:
-// CHECK10-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: br label [[COND_END13]]
-// CHECK10: cond.end13:
-// CHECK10-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP42]], [[COND_TRUE11]] ], [ [[TMP43]], [[COND_FALSE12]] ]
-// CHECK10-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK10-NEXT: store i32 [[TMP44]], i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK10: omp.inner.for.end:
-// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK10: omp.loop.exit:
-// CHECK10-NEXT: [[TMP45:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK10-NEXT: [[TMP46:%.*]] = load i32, i32* [[TMP45]], align 4
-// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP46]])
-// CHECK10-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK10: omp.precond.end:
-// CHECK10-NEXT: ret void
-// CHECK10-LABEL: define {{[^@]+}}@__omp_outlined__11
-// CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* [[V:%.*]]) #[[ATTR0]] {
-// CHECK10-NEXT: entry:
-// CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
-// CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
-// CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
-// CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
-// CHECK10-NEXT: [[V_ADDR:%.*]] = alloca i32*, align 8
-// CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[I5:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
-// CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
-// CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
-// CHECK10-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
-// CHECK10-NEXT: store i32* [[V]], i32** [[V_ADDR]], align 8
-// CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
-// CHECK10-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
-// CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK10-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK10-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK10: omp.precond.then:
-// CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
-// CHECK10-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
-// CHECK10-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP5]] to i32
-// CHECK10-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK10-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP6]] to i32
-// CHECK10-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4
-// CHECK10-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4
-// CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK10-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK10-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK10: omp.inner.for.cond:
-// CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: [[CONV6:%.*]] = sext i32 [[TMP10]] to i64
-// CHECK10-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK10-NEXT: [[CMP7:%.*]] = icmp ule i64 [[CONV6]], [[TMP11]]
-// CHECK10-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK10: omp.inner.for.body:
-// CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
-// CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK10-NEXT: store i32 [[ADD]], i32* [[I5]], align 4
-// CHECK10-NEXT: [[TMP13:%.*]] = load i32*, i32** [[V_ADDR]], align 8
-// CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[I5]], align 4
-// CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP14]] to i64
-// CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP13]], i64 [[IDXPROM]]
-// CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
-// CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[I5]], align 4
-// CHECK10-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP16]] to i64
-// CHECK10-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM8]]
-// CHECK10-NEXT: store i32 [[TMP15]], i32* [[ARRAYIDX9]], align 4
-// CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK10: omp.body.continue:
-// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK10: omp.inner.for.inc:
-// CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK10-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
-// CHECK10-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK10: omp.inner.for.end:
-// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK10: omp.loop.exit:
-// CHECK10-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4
-// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]])
-// CHECK10-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK10: omp.precond.end:
-// CHECK10-NEXT: ret void
-// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l43
-// CHECK11-SAME: (i64 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i64 [[L:%.*]]) #[[ATTR0:[0-9]+]] {
-// CHECK11-NEXT: entry:
-// CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
-// CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
-// CHECK11-NEXT: [[L_ADDR:%.*]] = alloca i64, align 8
-// CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
-// CHECK11-NEXT: [[L_CASTED:%.*]] = alloca i64, align 8
-// CHECK11-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK11-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
-// CHECK11-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
-// CHECK11-NEXT: store i64 [[L]], i64* [[L_ADDR]], align 8
-// CHECK11-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
-// CHECK11-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
-// CHECK11-NEXT: [[CONV1:%.*]] = bitcast i64* [[L_ADDR]] to i32*
-// CHECK11-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK11-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK11-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK11: .execute:
-// CHECK11-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]])
-// CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK11-NEXT: [[CONV2:%.*]] = bitcast i64* [[N_CASTED]] to i32*
-// CHECK11-NEXT: store i32 [[TMP2]], i32* [[CONV2]], align 4
-// CHECK11-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
-// CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV1]], align 8
-// CHECK11-NEXT: [[CONV3:%.*]] = bitcast i64* [[L_CASTED]] to i32*
-// CHECK11-NEXT: store i32 [[TMP4]], i32* [[CONV3]], align 4
-// CHECK11-NEXT: [[TMP5:%.*]] = load i64, i64* [[L_CASTED]], align 8
-// CHECK11-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK11-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i64 [[TMP3]], [1000 x i32]* [[TMP0]], i64 [[TMP5]]) #[[ATTR3:[0-9]+]]
-// CHECK11-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK11: .omp.deinit:
-// CHECK11-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK11-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK11: .exit:
-// CHECK11-NEXT: ret void
-// CHECK11-LABEL: define {{[^@]+}}@__omp_outlined__
-// CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i64 [[L:%.*]]) #[[ATTR0]] {
-// CHECK11-NEXT: entry:
-// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
-// CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
-// CHECK11-NEXT: [[L_ADDR:%.*]] = alloca i64, align 8
-// CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[I5:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
-// CHECK11-NEXT: [[L_CASTED:%.*]] = alloca i64, align 8
-// CHECK11-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [5 x i8*], align 8
-// CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
-// CHECK11-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
-// CHECK11-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
-// CHECK11-NEXT: store i64 [[L]], i64* [[L_ADDR]], align 8
-// CHECK11-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
-// CHECK11-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
-// CHECK11-NEXT: [[CONV1:%.*]] = bitcast i64* [[L_ADDR]] to i32*
-// CHECK11-NEXT: [[TMP1:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared", align 2
-// CHECK11-NEXT: [[TMP2:%.*]] = load i64, i64* @"_openmp_static_kernel$size", align 8
-// CHECK11-NEXT: call void @__kmpc_get_team_static_memory(i16 1, i8* addrspacecast (i8 addrspace(3)* getelementptr inbounds (%"union._shared_openmp_static_memory_type_$_", %"union._shared_openmp_static_memory_type_$_" addrspace(3)* @"_openmp_shared_static_glob_rd_$_", i32 0, i32 0, i32 0) to i8*), i64 [[TMP2]], i16 [[TMP1]], i8** addrspacecast (i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr" to i8**))
-// CHECK11-NEXT: [[TMP3:%.*]] = load i8*, i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr", align 8
-// CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds i8, i8* [[TMP3]], i64 0
-// CHECK11-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to %struct._globalized_locals_ty*
-// CHECK11-NEXT: [[L2:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY:%.*]], %struct._globalized_locals_ty* [[TMP5]], i32 0, i32 0
-// CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0
-// CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK11-NEXT: [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK11-NEXT: store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_3]], align 4
-// CHECK11-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]]
-// CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK11: omp.precond.then:
-// CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
-// CHECK11-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK11-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
-// CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 128)
-// CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
-// CHECK11-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]]
-// CHECK11-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK11: cond.true:
-// CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
-// CHECK11-NEXT: br label [[COND_END:%.*]]
-// CHECK11: cond.false:
-// CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: br label [[COND_END]]
-// CHECK11: cond.end:
-// CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ]
-// CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK11-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK11: omp.inner.for.cond:
-// CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
-// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], 1
-// CHECK11-NEXT: [[CMP7:%.*]] = icmp slt i32 [[TMP17]], [[ADD]]
-// CHECK11-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK11: omp.inner.for.body:
-// CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK11-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64
-// CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[TMP22:%.*]] = zext i32 [[TMP21]] to i64
-// CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK11-NEXT: [[CONV8:%.*]] = bitcast i64* [[N_CASTED]] to i32*
-// CHECK11-NEXT: store i32 [[TMP23]], i32* [[CONV8]], align 4
-// CHECK11-NEXT: [[TMP24:%.*]] = load i64, i64* [[N_CASTED]], align 8
-// CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[CONV1]], align 8
-// CHECK11-NEXT: [[CONV9:%.*]] = bitcast i64* [[L_CASTED]] to i32*
-// CHECK11-NEXT: store i32 [[TMP25]], i32* [[CONV9]], align 4
-// CHECK11-NEXT: [[TMP26:%.*]] = load i64, i64* [[L_CASTED]], align 8
-// CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
-// CHECK11-NEXT: [[TMP28:%.*]] = inttoptr i64 [[TMP20]] to i8*
-// CHECK11-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 8
-// CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
-// CHECK11-NEXT: [[TMP30:%.*]] = inttoptr i64 [[TMP22]] to i8*
-// CHECK11-NEXT: store i8* [[TMP30]], i8** [[TMP29]], align 8
-// CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
-// CHECK11-NEXT: [[TMP32:%.*]] = inttoptr i64 [[TMP24]] to i8*
-// CHECK11-NEXT: store i8* [[TMP32]], i8** [[TMP31]], align 8
-// CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 3
-// CHECK11-NEXT: [[TMP34:%.*]] = bitcast [1000 x i32]* [[TMP0]] to i8*
-// CHECK11-NEXT: store i8* [[TMP34]], i8** [[TMP33]], align 8
-// CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 4
-// CHECK11-NEXT: [[TMP36:%.*]] = inttoptr i64 [[TMP26]] to i8*
-// CHECK11-NEXT: store i8* [[TMP36]], i8** [[TMP35]], align 8
-// CHECK11-NEXT: [[TMP37:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK11-NEXT: [[TMP38:%.*]] = load i32, i32* [[TMP37]], align 4
-// CHECK11-NEXT: [[TMP39:%.*]] = bitcast [5 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK11-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP38]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, i64, [1000 x i32]*, i64)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP39]], i64 5)
-// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK11: omp.inner.for.inc:
-// CHECK11-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK11-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP40]], [[TMP41]]
-// CHECK11-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK11-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK11-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP42]], [[TMP43]]
-// CHECK11-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK11-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK11-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP44]], [[TMP45]]
-// CHECK11-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
-// CHECK11-NEXT: [[CMP13:%.*]] = icmp sgt i32 [[TMP46]], [[TMP47]]
-// CHECK11-NEXT: br i1 [[CMP13]], label [[COND_TRUE14:%.*]], label [[COND_FALSE15:%.*]]
-// CHECK11: cond.true14:
-// CHECK11-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
-// CHECK11-NEXT: br label [[COND_END16:%.*]]
-// CHECK11: cond.false15:
-// CHECK11-NEXT: [[TMP49:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: br label [[COND_END16]]
-// CHECK11: cond.end16:
-// CHECK11-NEXT: [[COND17:%.*]] = phi i32 [ [[TMP48]], [[COND_TRUE14]] ], [ [[TMP49]], [[COND_FALSE15]] ]
-// CHECK11-NEXT: store i32 [[COND17]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK11-NEXT: store i32 [[TMP50]], i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK11: omp.inner.for.end:
-// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK11: omp.loop.exit:
-// CHECK11-NEXT: [[TMP51:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK11-NEXT: [[TMP52:%.*]] = load i32, i32* [[TMP51]], align 4
-// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP52]])
-// CHECK11-NEXT: [[TMP53:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK11-NEXT: [[TMP54:%.*]] = icmp ne i32 [[TMP53]], 0
-// CHECK11-NEXT: br i1 [[TMP54]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
-// CHECK11: .omp.lastprivate.then:
-// CHECK11-NEXT: [[TMP55:%.*]] = load i32, i32* [[CONV1]], align 8
-// CHECK11-NEXT: store i32 [[TMP55]], i32* [[CONV1]], align 8
-// CHECK11-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
-// CHECK11: .omp.lastprivate.done:
-// CHECK11-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK11: omp.precond.end:
-// CHECK11-NEXT: [[TMP56:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared", align 2
-// CHECK11-NEXT: call void @__kmpc_restore_team_static_memory(i16 1, i16 [[TMP56]])
-// CHECK11-NEXT: ret void
-// CHECK11-LABEL: define {{[^@]+}}@__omp_outlined__1
-// CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i64 [[L:%.*]]) #[[ATTR0]] {
-// CHECK11-NEXT: entry:
-// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
-// CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
-// CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
-// CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
-// CHECK11-NEXT: [[L_ADDR:%.*]] = alloca i64, align 8
-// CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[I6:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
-// CHECK11-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
-// CHECK11-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK11-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
-// CHECK11-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
-// CHECK11-NEXT: store i64 [[L]], i64* [[L_ADDR]], align 8
-// CHECK11-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
-// CHECK11-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
-// CHECK11-NEXT: [[CONV1:%.*]] = bitcast i64* [[L_ADDR]] to i32*
-// CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK11-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK11-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK11-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK11-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK11: omp.precond.then:
-// CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
-// CHECK11-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
-// CHECK11-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP5]] to i32
-// CHECK11-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK11-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP6]] to i32
-// CHECK11-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4
-// CHECK11-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4
-// CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK11-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 32)
-// CHECK11-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
-// CHECK11: omp.dispatch.cond:
-// CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK11-NEXT: [[CONV7:%.*]] = sext i32 [[TMP9]] to i64
-// CHECK11-NEXT: [[TMP10:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK11-NEXT: [[CMP8:%.*]] = icmp ugt i64 [[CONV7]], [[TMP10]]
-// CHECK11-NEXT: br i1 [[CMP8]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK11: cond.true:
-// CHECK11-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK11-NEXT: br label [[COND_END:%.*]]
-// CHECK11: cond.false:
-// CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK11-NEXT: [[CONV9:%.*]] = sext i32 [[TMP12]] to i64
-// CHECK11-NEXT: br label [[COND_END]]
-// CHECK11: cond.end:
-// CHECK11-NEXT: [[COND:%.*]] = phi i64 [ [[TMP11]], [[COND_TRUE]] ], [ [[CONV9]], [[COND_FALSE]] ]
-// CHECK11-NEXT: [[CONV10:%.*]] = trunc i64 [[COND]] to i32
-// CHECK11-NEXT: store i32 [[CONV10]], i32* [[DOTOMP_UB]], align 4
-// CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK11-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK11-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
-// CHECK11-NEXT: br i1 [[CMP11]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
-// CHECK11: omp.dispatch.body:
-// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK11: omp.inner.for.cond:
-// CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK11-NEXT: [[CMP12:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
-// CHECK11-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK11: omp.inner.for.body:
-// CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
-// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK11-NEXT: store i32 [[ADD]], i32* [[I6]], align 4
-// CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[I6]], align 4
-// CHECK11-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
-// CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
-// CHECK11-NEXT: store i32 1, i32* [[ARRAYIDX]], align 4
-// CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[I6]], align 4
-// CHECK11-NEXT: store i32 [[TMP20]], i32* [[CONV1]], align 8
-// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK11: omp.body.continue:
-// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK11: omp.inner.for.inc:
-// CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP21]], 1
-// CHECK11-NEXT: store i32 [[ADD13]], i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK11: omp.inner.for.end:
-// CHECK11-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
-// CHECK11: omp.dispatch.inc:
-// CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK11-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
-// CHECK11-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_LB]], align 4
-// CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK11-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
-// CHECK11-NEXT: store i32 [[ADD15]], i32* [[DOTOMP_UB]], align 4
-// CHECK11-NEXT: br label [[OMP_DISPATCH_COND]]
-// CHECK11: omp.dispatch.end:
-// CHECK11-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
-// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP27]])
-// CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK11-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
-// CHECK11-NEXT: br i1 [[TMP29]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
-// CHECK11: .omp.lastprivate.then:
-// CHECK11-NEXT: [[TMP30:%.*]] = load i32, i32* [[CONV1]], align 8
-// CHECK11-NEXT: store i32 [[TMP30]], i32* [[CONV1]], align 8
-// CHECK11-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
-// CHECK11: .omp.lastprivate.done:
-// CHECK11-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK11: omp.precond.end:
-// CHECK11-NEXT: ret void
-// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l49
-// CHECK11-SAME: (i64 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
-// CHECK11-NEXT: entry:
-// CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
-// CHECK11-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 8
-// CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
-// CHECK11-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK11-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
-// CHECK11-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 8
-// CHECK11-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
-// CHECK11-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 8
-// CHECK11-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK11-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK11-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK11: .execute:
-// CHECK11-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK11-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
-// CHECK11-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
-// CHECK11-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
-// CHECK11-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK11-NEXT: call void @__omp_outlined__2(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i64 [[TMP3]], [1000 x i16]* [[TMP0]]) #[[ATTR3]]
-// CHECK11-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK11: .omp.deinit:
-// CHECK11-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK11-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK11: .exit:
-// CHECK11-NEXT: ret void
-// CHECK11-LABEL: define {{[^@]+}}@__omp_outlined__2
-// CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
-// CHECK11-NEXT: entry:
-// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
-// CHECK11-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 8
-// CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
-// CHECK11-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 8
-// CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
-// CHECK11-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
-// CHECK11-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 8
-// CHECK11-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
-// CHECK11-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 8
-// CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK11-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK11-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK11: omp.precond.then:
-// CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK11-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK11-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
-// CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
-// CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK11: cond.true:
-// CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK11-NEXT: br label [[COND_END:%.*]]
-// CHECK11: cond.false:
-// CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: br label [[COND_END]]
-// CHECK11: cond.end:
-// CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
-// CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK11-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK11: omp.inner.for.cond:
-// CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1
-// CHECK11-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]
-// CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK11: omp.inner.for.body:
-// CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK11-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i64
-// CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
-// CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK11-NEXT: [[CONV6:%.*]] = bitcast i64* [[N_CASTED]] to i32*
-// CHECK11-NEXT: store i32 [[TMP18]], i32* [[CONV6]], align 4
-// CHECK11-NEXT: [[TMP19:%.*]] = load i64, i64* [[N_CASTED]], align 8
-// CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
-// CHECK11-NEXT: [[TMP21:%.*]] = inttoptr i64 [[TMP15]] to i8*
-// CHECK11-NEXT: store i8* [[TMP21]], i8** [[TMP20]], align 8
-// CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
-// CHECK11-NEXT: [[TMP23:%.*]] = inttoptr i64 [[TMP17]] to i8*
-// CHECK11-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 8
-// CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
-// CHECK11-NEXT: [[TMP25:%.*]] = inttoptr i64 [[TMP19]] to i8*
-// CHECK11-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 8
-// CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 3
-// CHECK11-NEXT: [[TMP27:%.*]] = bitcast [1000 x i16]* [[TMP0]] to i8*
-// CHECK11-NEXT: store i8* [[TMP27]], i8** [[TMP26]], align 8
-// CHECK11-NEXT: [[TMP28:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK11-NEXT: [[TMP29:%.*]] = load i32, i32* [[TMP28]], align 4
-// CHECK11-NEXT: [[TMP30:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK11-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP29]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, i64, [1000 x i16]*)* @__omp_outlined__3 to i8*), i8* null, i8** [[TMP30]], i64 4)
-// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK11: omp.inner.for.inc:
-// CHECK11-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK11-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP31]], [[TMP32]]
-// CHECK11-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK11-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP33]], [[TMP34]]
-// CHECK11-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK11-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP35]], [[TMP36]]
-// CHECK11-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK11-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP37]], [[TMP38]]
-// CHECK11-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
-// CHECK11: cond.true11:
-// CHECK11-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK11-NEXT: br label [[COND_END13:%.*]]
-// CHECK11: cond.false12:
-// CHECK11-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: br label [[COND_END13]]
-// CHECK11: cond.end13:
-// CHECK11-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP39]], [[COND_TRUE11]] ], [ [[TMP40]], [[COND_FALSE12]] ]
-// CHECK11-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK11-NEXT: store i32 [[TMP41]], i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK11: omp.inner.for.end:
-// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK11: omp.loop.exit:
-// CHECK11-NEXT: [[TMP42:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK11-NEXT: [[TMP43:%.*]] = load i32, i32* [[TMP42]], align 4
-// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP43]])
-// CHECK11-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK11: omp.precond.end:
-// CHECK11-NEXT: ret void
-// CHECK11-LABEL: define {{[^@]+}}@__omp_outlined__3
-// CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
-// CHECK11-NEXT: entry:
-// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
-// CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
-// CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
-// CHECK11-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 8
-// CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[I5:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
-// CHECK11-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
-// CHECK11-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK11-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
-// CHECK11-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 8
-// CHECK11-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
-// CHECK11-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 8
-// CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK11-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK11-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK11: omp.precond.then:
-// CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
-// CHECK11-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
-// CHECK11-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP5]] to i32
-// CHECK11-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK11-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP6]] to i32
-// CHECK11-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4
-// CHECK11-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4
-// CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK11-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK11-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK11: omp.inner.for.cond:
-// CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[CONV6:%.*]] = sext i32 [[TMP10]] to i64
-// CHECK11-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK11-NEXT: [[CMP7:%.*]] = icmp ule i64 [[CONV6]], [[TMP11]]
-// CHECK11-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK11: omp.inner.for.body:
-// CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
-// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK11-NEXT: store i32 [[ADD]], i32* [[I5]], align 4
-// CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[I5]], align 4
-// CHECK11-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
-// CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i16], [1000 x i16]* [[TMP0]], i64 0, i64 [[IDXPROM]]
-// CHECK11-NEXT: [[TMP14:%.*]] = load i16, i16* [[ARRAYIDX]], align 2
-// CHECK11-NEXT: [[CONV8:%.*]] = sext i16 [[TMP14]] to i32
-// CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[CONV8]], 1
-// CHECK11-NEXT: [[CONV10:%.*]] = trunc i32 [[ADD9]] to i16
-// CHECK11-NEXT: store i16 [[CONV10]], i16* [[ARRAYIDX]], align 2
-// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK11: omp.body.continue:
-// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK11: omp.inner.for.inc:
-// CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK11-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
-// CHECK11-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK11: omp.inner.for.end:
-// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK11: omp.loop.exit:
-// CHECK11-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
-// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]])
-// CHECK11-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK11: omp.precond.end:
-// CHECK11-NEXT: ret void
-// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l54
-// CHECK11-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
-// CHECK11-NEXT: entry:
-// CHECK11-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8
-// CHECK11-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK11-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8
-// CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8
-// CHECK11-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK11-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK11-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK11: .execute:
-// CHECK11-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK11-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK11-NEXT: call void @__omp_outlined__4(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x i32]* [[TMP0]]) #[[ATTR3]]
-// CHECK11-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK11: .omp.deinit:
-// CHECK11-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK11-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK11: .exit:
-// CHECK11-NEXT: ret void
-// CHECK11-LABEL: define {{[^@]+}}@__omp_outlined__4
-// CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
-// CHECK11-NEXT: entry:
-// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK11-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8
-// CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [3 x i8*], align 8
-// CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
-// CHECK11-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8
-// CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8
-// CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK11-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK11-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
-// CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
-// CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK11: cond.true:
-// CHECK11-NEXT: br label [[COND_END:%.*]]
-// CHECK11: cond.false:
-// CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: br label [[COND_END]]
-// CHECK11: cond.end:
-// CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
-// CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK11: omp.inner.for.cond:
-// CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP6]], 10
-// CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK11: omp.inner.for.body:
-// CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK11-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
-// CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
-// CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
-// CHECK11-NEXT: [[TMP12:%.*]] = inttoptr i64 [[TMP8]] to i8*
-// CHECK11-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 8
-// CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
-// CHECK11-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP10]] to i8*
-// CHECK11-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 8
-// CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
-// CHECK11-NEXT: [[TMP16:%.*]] = bitcast [10 x i32]* [[TMP0]] to i8*
-// CHECK11-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 8
-// CHECK11-NEXT: [[TMP17:%.*]] = bitcast [3 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK11-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @__omp_outlined__5 to i8*), i8* null, i8** [[TMP17]], i64 3)
-// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK11: omp.inner.for.inc:
-// CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
-// CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK11-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
-// CHECK11-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
-// CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP24]], 9
-// CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
-// CHECK11: cond.true5:
-// CHECK11-NEXT: br label [[COND_END7:%.*]]
-// CHECK11: cond.false6:
-// CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: br label [[COND_END7]]
-// CHECK11: cond.end7:
-// CHECK11-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP25]], [[COND_FALSE6]] ]
-// CHECK11-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK11-NEXT: store i32 [[TMP26]], i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK11: omp.inner.for.end:
-// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK11: omp.loop.exit:
-// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
-// CHECK11-NEXT: ret void
-// CHECK11-LABEL: define {{[^@]+}}@__omp_outlined__5
-// CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
-// CHECK11-NEXT: entry:
-// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
-// CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
-// CHECK11-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8
-// CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
-// CHECK11-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
-// CHECK11-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK11-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8
-// CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8
-// CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK11-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
-// CHECK11-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
-// CHECK11-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
-// CHECK11-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK11-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
-// CHECK11-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
-// CHECK11-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
-// CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK11-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
-// CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK11: omp.inner.for.cond:
-// CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[CONV2:%.*]] = sext i32 [[TMP6]] to i64
-// CHECK11-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK11-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV2]], [[TMP7]]
-// CHECK11-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK11: omp.inner.for.body:
-// CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
-// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4
-// CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
-// CHECK11-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64
-// CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
-// CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
-// CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
-// CHECK11-NEXT: store i32 [[ADD3]], i32* [[ARRAYIDX]], align 4
-// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK11: omp.body.continue:
-// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK11: omp.inner.for.inc:
-// CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK11-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
-// CHECK11-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK11: omp.inner.for.end:
-// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK11: omp.loop.exit:
-// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
-// CHECK11-NEXT: ret void
-// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l59
-// CHECK11-SAME: ([10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i64 [[F:%.*]]) #[[ATTR0]] {
-// CHECK11-NEXT: entry:
-// CHECK11-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 8
-// CHECK11-NEXT: [[F_ADDR:%.*]] = alloca i64, align 8
-// CHECK11-NEXT: [[F_CASTED:%.*]] = alloca i64, align 8
-// CHECK11-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK11-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 8
-// CHECK11-NEXT: store i64 [[F]], i64* [[F_ADDR]], align 8
-// CHECK11-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 8
-// CHECK11-NEXT: [[CONV:%.*]] = bitcast i64* [[F_ADDR]] to i32*
-// CHECK11-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK11-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK11-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK11: .execute:
-// CHECK11-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK11-NEXT: [[CONV1:%.*]] = bitcast i64* [[F_CASTED]] to i32*
-// CHECK11-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
-// CHECK11-NEXT: [[TMP3:%.*]] = load i64, i64* [[F_CASTED]], align 8
-// CHECK11-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK11-NEXT: call void @__omp_outlined__6(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x [10 x i32]]* [[TMP0]], i64 [[TMP3]]) #[[ATTR3]]
-// CHECK11-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK11: .omp.deinit:
-// CHECK11-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK11-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK11: .exit:
-// CHECK11-NEXT: ret void
-// CHECK11-LABEL: define {{[^@]+}}@__omp_outlined__6
-// CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i64 [[F:%.*]]) #[[ATTR0]] {
-// CHECK11-NEXT: entry:
-// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK11-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 8
-// CHECK11-NEXT: [[F_ADDR:%.*]] = alloca i64, align 8
-// CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[K:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[J:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[F_CASTED:%.*]] = alloca i64, align 8
-// CHECK11-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 8
-// CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
-// CHECK11-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 8
-// CHECK11-NEXT: store i64 [[F]], i64* [[F_ADDR]], align 8
-// CHECK11-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 8
-// CHECK11-NEXT: [[CONV:%.*]] = bitcast i64* [[F_ADDR]] to i32*
-// CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK11-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK11-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
-// CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
-// CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK11: cond.true:
-// CHECK11-NEXT: br label [[COND_END:%.*]]
-// CHECK11: cond.false:
-// CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: br label [[COND_END]]
-// CHECK11: cond.end:
-// CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
-// CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK11: omp.inner.for.cond:
-// CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP6]], 100
-// CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK11: omp.inner.for.body:
-// CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK11-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
-// CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
-// CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK11-NEXT: [[CONV3:%.*]] = bitcast i64* [[F_CASTED]] to i32*
-// CHECK11-NEXT: store i32 [[TMP11]], i32* [[CONV3]], align 4
-// CHECK11-NEXT: [[TMP12:%.*]] = load i64, i64* [[F_CASTED]], align 8
-// CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
-// CHECK11-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP8]] to i8*
-// CHECK11-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 8
-// CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
-// CHECK11-NEXT: [[TMP16:%.*]] = inttoptr i64 [[TMP10]] to i8*
-// CHECK11-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 8
-// CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
-// CHECK11-NEXT: [[TMP18:%.*]] = bitcast [10 x [10 x i32]]* [[TMP0]] to i8*
-// CHECK11-NEXT: store i8* [[TMP18]], i8** [[TMP17]], align 8
-// CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 3
-// CHECK11-NEXT: [[TMP20:%.*]] = inttoptr i64 [[TMP12]] to i8*
-// CHECK11-NEXT: store i8* [[TMP20]], i8** [[TMP19]], align 8
-// CHECK11-NEXT: [[TMP21:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK11-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, [10 x [10 x i32]]*, i64)* @__omp_outlined__7 to i8*), i8* null, i8** [[TMP21]], i64 4)
-// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK11: omp.inner.for.inc:
-// CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
-// CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK11-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
-// CHECK11-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK11-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP26]], [[TMP27]]
-// CHECK11-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP28]], 99
-// CHECK11-NEXT: br i1 [[CMP6]], label [[COND_TRUE7:%.*]], label [[COND_FALSE8:%.*]]
-// CHECK11: cond.true7:
-// CHECK11-NEXT: br label [[COND_END9:%.*]]
-// CHECK11: cond.false8:
-// CHECK11-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: br label [[COND_END9]]
-// CHECK11: cond.end9:
-// CHECK11-NEXT: [[COND10:%.*]] = phi i32 [ 99, [[COND_TRUE7]] ], [ [[TMP29]], [[COND_FALSE8]] ]
-// CHECK11-NEXT: store i32 [[COND10]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK11-NEXT: store i32 [[TMP30]], i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK11: omp.inner.for.end:
-// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK11: omp.loop.exit:
-// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
-// CHECK11-NEXT: ret void
-// CHECK11-LABEL: define {{[^@]+}}@__omp_outlined__7
-// CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i64 [[F:%.*]]) #[[ATTR0]] {
-// CHECK11-NEXT: entry:
-// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
-// CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
-// CHECK11-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 8
-// CHECK11-NEXT: [[F_ADDR:%.*]] = alloca i64, align 8
-// CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[K:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[J:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
-// CHECK11-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
-// CHECK11-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK11-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 8
-// CHECK11-NEXT: store i64 [[F]], i64* [[F_ADDR]], align 8
-// CHECK11-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 8
-// CHECK11-NEXT: [[CONV:%.*]] = bitcast i64* [[F_ADDR]] to i32*
-// CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK11-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
-// CHECK11-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
-// CHECK11-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32
-// CHECK11-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK11-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP2]] to i32
-// CHECK11-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_LB]], align 4
-// CHECK11-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4
-// CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK11-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
-// CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK11: omp.inner.for.cond:
-// CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[CONV4:%.*]] = sext i32 [[TMP6]] to i64
-// CHECK11-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK11-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV4]], [[TMP7]]
-// CHECK11-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK11: omp.inner.for.body:
-// CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP8]], 10
-// CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
-// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4
-// CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[DIV5:%.*]] = sdiv i32 [[TMP10]], 10
-// CHECK11-NEXT: [[MUL6:%.*]] = mul nsw i32 [[DIV5]], 10
-// CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL6]]
-// CHECK11-NEXT: [[MUL7:%.*]] = mul nsw i32 [[SUB]], 1
-// CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL7]]
-// CHECK11-NEXT: store i32 [[ADD8]], i32* [[J]], align 4
-// CHECK11-NEXT: store i32 10, i32* [[K]], align 4
-// CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
-// CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[J]], align 4
-// CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK11-NEXT: [[MUL9:%.*]] = mul nsw i32 [[TMP12]], [[TMP13]]
-// CHECK11-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP11]], [[MUL9]]
-// CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[K]], align 4
-// CHECK11-NEXT: [[ADD11:%.*]] = add nsw i32 [[ADD10]], [[TMP14]]
-// CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4
-// CHECK11-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64
-// CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [10 x i32]], [10 x [10 x i32]]* [[TMP0]], i64 0, i64 [[IDXPROM]]
-// CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[J]], align 4
-// CHECK11-NEXT: [[IDXPROM12:%.*]] = sext i32 [[TMP16]] to i64
-// CHECK11-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[ARRAYIDX]], i64 0, i64 [[IDXPROM12]]
-// CHECK11-NEXT: store i32 [[ADD11]], i32* [[ARRAYIDX13]], align 4
-// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK11: omp.body.continue:
-// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK11: omp.inner.for.inc:
-// CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK11-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
-// CHECK11-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK11: omp.inner.for.end:
-// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK11: omp.loop.exit:
-// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
-// CHECK11-NEXT: ret void
-// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l67
-// CHECK11-SAME: (i64 [[N:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]]) #[[ATTR0]] {
-// CHECK11-NEXT: entry:
-// CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
-// CHECK11-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 8
-// CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
-// CHECK11-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK11-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
-// CHECK11-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 8
-// CHECK11-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
-// CHECK11-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 8
-// CHECK11-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK11-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK11-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK11: .execute:
-// CHECK11-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK11-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
-// CHECK11-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
-// CHECK11-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
-// CHECK11-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK11-NEXT: call void @__omp_outlined__8(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i64 [[TMP3]], [10 x [10 x i32]]* [[TMP0]]) #[[ATTR3]]
-// CHECK11-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK11: .omp.deinit:
-// CHECK11-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK11-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK11: .exit:
-// CHECK11-NEXT: ret void
-// CHECK11-LABEL: define {{[^@]+}}@__omp_outlined__8
-// CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]]) #[[ATTR0]] {
-// CHECK11-NEXT: entry:
-// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
-// CHECK11-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 8
-// CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[J:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[I8:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[J9:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
-// CHECK11-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 8
-// CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
-// CHECK11-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
-// CHECK11-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 8
-// CHECK11-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
-// CHECK11-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 8
-// CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK11-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK11-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
-// CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK11-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP4]], 0
-// CHECK11-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1
-// CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], [[DIV5]]
-// CHECK11-NEXT: [[SUB6:%.*]] = sub nsw i32 [[MUL]], 1
-// CHECK11-NEXT: store i32 [[SUB6]], i32* [[DOTCAPTURE_EXPR_3]], align 4
-// CHECK11-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK11-NEXT: store i32 0, i32* [[J]], align 4
-// CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
-// CHECK11-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK11: land.lhs.true:
-// CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK11-NEXT: [[CMP7:%.*]] = icmp slt i32 0, [[TMP6]]
-// CHECK11-NEXT: br i1 [[CMP7]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
-// CHECK11: omp.precond.then:
-// CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
-// CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK11-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK11-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
-// CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
-// CHECK11-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
-// CHECK11-NEXT: br i1 [[CMP10]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK11: cond.true:
-// CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
-// CHECK11-NEXT: br label [[COND_END:%.*]]
-// CHECK11: cond.false:
-// CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: br label [[COND_END]]
-// CHECK11: cond.end:
-// CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
-// CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK11-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK11: omp.inner.for.cond:
-// CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
-// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], 1
-// CHECK11-NEXT: [[CMP11:%.*]] = icmp slt i32 [[TMP15]], [[ADD]]
-// CHECK11-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK11: omp.inner.for.body:
-// CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK11-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
-// CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64
-// CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK11-NEXT: [[CONV12:%.*]] = bitcast i64* [[N_CASTED]] to i32*
-// CHECK11-NEXT: store i32 [[TMP21]], i32* [[CONV12]], align 4
-// CHECK11-NEXT: [[TMP22:%.*]] = load i64, i64* [[N_CASTED]], align 8
-// CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
-// CHECK11-NEXT: [[TMP24:%.*]] = inttoptr i64 [[TMP18]] to i8*
-// CHECK11-NEXT: store i8* [[TMP24]], i8** [[TMP23]], align 8
-// CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
-// CHECK11-NEXT: [[TMP26:%.*]] = inttoptr i64 [[TMP20]] to i8*
-// CHECK11-NEXT: store i8* [[TMP26]], i8** [[TMP25]], align 8
-// CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
-// CHECK11-NEXT: [[TMP28:%.*]] = inttoptr i64 [[TMP22]] to i8*
-// CHECK11-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 8
-// CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 3
-// CHECK11-NEXT: [[TMP30:%.*]] = bitcast [10 x [10 x i32]]* [[TMP0]] to i8*
-// CHECK11-NEXT: store i8* [[TMP30]], i8** [[TMP29]], align 8
-// CHECK11-NEXT: [[TMP31:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK11-NEXT: [[TMP32:%.*]] = load i32, i32* [[TMP31]], align 4
-// CHECK11-NEXT: [[TMP33:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK11-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP32]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, i64, [10 x [10 x i32]]*)* @__omp_outlined__9 to i8*), i8* null, i8** [[TMP33]], i64 4)
-// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK11: omp.inner.for.inc:
-// CHECK11-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK11-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP34]], [[TMP35]]
-// CHECK11-NEXT: store i32 [[ADD13]], i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK11-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK11-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP36]], [[TMP37]]
-// CHECK11-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK11-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK11-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP38]], [[TMP39]]
-// CHECK11-NEXT: store i32 [[ADD15]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
-// CHECK11-NEXT: [[CMP16:%.*]] = icmp sgt i32 [[TMP40]], [[TMP41]]
-// CHECK11-NEXT: br i1 [[CMP16]], label [[COND_TRUE17:%.*]], label [[COND_FALSE18:%.*]]
-// CHECK11: cond.true17:
-// CHECK11-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
-// CHECK11-NEXT: br label [[COND_END19:%.*]]
-// CHECK11: cond.false18:
-// CHECK11-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: br label [[COND_END19]]
-// CHECK11: cond.end19:
-// CHECK11-NEXT: [[COND20:%.*]] = phi i32 [ [[TMP42]], [[COND_TRUE17]] ], [ [[TMP43]], [[COND_FALSE18]] ]
-// CHECK11-NEXT: store i32 [[COND20]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK11-NEXT: store i32 [[TMP44]], i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK11: omp.inner.for.end:
-// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK11: omp.loop.exit:
-// CHECK11-NEXT: [[TMP45:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK11-NEXT: [[TMP46:%.*]] = load i32, i32* [[TMP45]], align 4
-// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP46]])
-// CHECK11-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK11: omp.precond.end:
-// CHECK11-NEXT: ret void
-// CHECK11-LABEL: define {{[^@]+}}@__omp_outlined__9
-// CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[N:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]]) #[[ATTR0]] {
-// CHECK11-NEXT: entry:
-// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
-// CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
-// CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
-// CHECK11-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 8
-// CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[J:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[I10:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[J11:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
-// CHECK11-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
-// CHECK11-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK11-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
-// CHECK11-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 8
-// CHECK11-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
-// CHECK11-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 8
-// CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK11-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK11-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
-// CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK11-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP4]], 0
-// CHECK11-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1
-// CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], [[DIV5]]
-// CHECK11-NEXT: [[SUB6:%.*]] = sub nsw i32 [[MUL]], 1
-// CHECK11-NEXT: store i32 [[SUB6]], i32* [[DOTCAPTURE_EXPR_3]], align 4
-// CHECK11-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK11-NEXT: store i32 0, i32* [[J]], align 4
-// CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
-// CHECK11-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK11: land.lhs.true:
-// CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK11-NEXT: [[CMP7:%.*]] = icmp slt i32 0, [[TMP6]]
-// CHECK11-NEXT: br i1 [[CMP7]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
-// CHECK11: omp.precond.then:
-// CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
-// CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4
-// CHECK11-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
-// CHECK11-NEXT: [[CONV8:%.*]] = trunc i64 [[TMP8]] to i32
-// CHECK11-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK11-NEXT: [[CONV9:%.*]] = trunc i64 [[TMP9]] to i32
-// CHECK11-NEXT: store i32 [[CONV8]], i32* [[DOTOMP_LB]], align 4
-// CHECK11-NEXT: store i32 [[CONV9]], i32* [[DOTOMP_UB]], align 4
-// CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK11-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
-// CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK11-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK11: omp.inner.for.cond:
-// CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[CONV12:%.*]] = sext i32 [[TMP13]] to i64
-// CHECK11-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK11-NEXT: [[CMP13:%.*]] = icmp ule i64 [[CONV12]], [[TMP14]]
-// CHECK11-NEXT: br i1 [[CMP13]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK11: omp.inner.for.body:
-// CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK11-NEXT: [[SUB14:%.*]] = sub nsw i32 [[TMP16]], 0
-// CHECK11-NEXT: [[DIV15:%.*]] = sdiv i32 [[SUB14]], 1
-// CHECK11-NEXT: [[MUL16:%.*]] = mul nsw i32 1, [[DIV15]]
-// CHECK11-NEXT: [[DIV17:%.*]] = sdiv i32 [[TMP15]], [[MUL16]]
-// CHECK11-NEXT: [[MUL18:%.*]] = mul nsw i32 [[DIV17]], 1
-// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL18]]
-// CHECK11-NEXT: store i32 [[ADD]], i32* [[I10]], align 4
-// CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK11-NEXT: [[SUB19:%.*]] = sub nsw i32 [[TMP19]], 0
-// CHECK11-NEXT: [[DIV20:%.*]] = sdiv i32 [[SUB19]], 1
-// CHECK11-NEXT: [[MUL21:%.*]] = mul nsw i32 1, [[DIV20]]
-// CHECK11-NEXT: [[DIV22:%.*]] = sdiv i32 [[TMP18]], [[MUL21]]
-// CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK11-NEXT: [[SUB23:%.*]] = sub nsw i32 [[TMP20]], 0
-// CHECK11-NEXT: [[DIV24:%.*]] = sdiv i32 [[SUB23]], 1
-// CHECK11-NEXT: [[MUL25:%.*]] = mul nsw i32 1, [[DIV24]]
-// CHECK11-NEXT: [[MUL26:%.*]] = mul nsw i32 [[DIV22]], [[MUL25]]
-// CHECK11-NEXT: [[SUB27:%.*]] = sub nsw i32 [[TMP17]], [[MUL26]]
-// CHECK11-NEXT: [[MUL28:%.*]] = mul nsw i32 [[SUB27]], 1
-// CHECK11-NEXT: [[ADD29:%.*]] = add nsw i32 0, [[MUL28]]
-// CHECK11-NEXT: store i32 [[ADD29]], i32* [[J11]], align 4
-// CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[I10]], align 4
-// CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[J11]], align 4
-// CHECK11-NEXT: [[ADD30:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
-// CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[I10]], align 4
-// CHECK11-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP23]] to i64
-// CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [10 x i32]], [10 x [10 x i32]]* [[TMP0]], i64 0, i64 [[IDXPROM]]
-// CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[J11]], align 4
-// CHECK11-NEXT: [[IDXPROM31:%.*]] = sext i32 [[TMP24]] to i64
-// CHECK11-NEXT: [[ARRAYIDX32:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[ARRAYIDX]], i64 0, i64 [[IDXPROM31]]
-// CHECK11-NEXT: store i32 [[ADD30]], i32* [[ARRAYIDX32]], align 4
-// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK11: omp.body.continue:
-// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK11: omp.inner.for.inc:
-// CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK11-NEXT: [[ADD33:%.*]] = add nsw i32 [[TMP25]], [[TMP26]]
-// CHECK11-NEXT: store i32 [[ADD33]], i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK11: omp.inner.for.end:
-// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK11: omp.loop.exit:
-// CHECK11-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4
-// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP28]])
-// CHECK11-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK11: omp.precond.end:
-// CHECK11-NEXT: ret void
-// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l74
-// CHECK11-SAME: (i64 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* [[V:%.*]]) #[[ATTR0]] {
-// CHECK11-NEXT: entry:
-// CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
-// CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
-// CHECK11-NEXT: [[V_ADDR:%.*]] = alloca i32*, align 8
-// CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
-// CHECK11-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK11-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
-// CHECK11-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
-// CHECK11-NEXT: store i32* [[V]], i32** [[V_ADDR]], align 8
-// CHECK11-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
-// CHECK11-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
-// CHECK11-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK11-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK11-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK11: .execute:
-// CHECK11-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK11-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
-// CHECK11-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
-// CHECK11-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
-// CHECK11-NEXT: [[TMP4:%.*]] = load i32*, i32** [[V_ADDR]], align 8
-// CHECK11-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK11-NEXT: call void @__omp_outlined__10(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i64 [[TMP3]], [1000 x i32]* [[TMP0]], i32* [[TMP4]]) #[[ATTR3]]
-// CHECK11-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK11: .omp.deinit:
-// CHECK11-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK11-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK11: .exit:
-// CHECK11-NEXT: ret void
-// CHECK11-LABEL: define {{[^@]+}}@__omp_outlined__10
-// CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* [[V:%.*]]) #[[ATTR0]] {
-// CHECK11-NEXT: entry:
-// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
-// CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
-// CHECK11-NEXT: [[V_ADDR:%.*]] = alloca i32*, align 8
-// CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
-// CHECK11-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [5 x i8*], align 8
-// CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
-// CHECK11-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
-// CHECK11-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
-// CHECK11-NEXT: store i32* [[V]], i32** [[V_ADDR]], align 8
-// CHECK11-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
-// CHECK11-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
-// CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK11-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK11-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK11: omp.precond.then:
-// CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK11-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK11-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
-// CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
-// CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK11: cond.true:
-// CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK11-NEXT: br label [[COND_END:%.*]]
-// CHECK11: cond.false:
-// CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: br label [[COND_END]]
-// CHECK11: cond.end:
-// CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
-// CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK11-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK11: omp.inner.for.cond:
-// CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1
-// CHECK11-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]
-// CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK11: omp.inner.for.body:
-// CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK11-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i64
-// CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
-// CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK11-NEXT: [[CONV6:%.*]] = bitcast i64* [[N_CASTED]] to i32*
-// CHECK11-NEXT: store i32 [[TMP18]], i32* [[CONV6]], align 4
-// CHECK11-NEXT: [[TMP19:%.*]] = load i64, i64* [[N_CASTED]], align 8
-// CHECK11-NEXT: [[TMP20:%.*]] = load i32*, i32** [[V_ADDR]], align 8
-// CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
-// CHECK11-NEXT: [[TMP22:%.*]] = inttoptr i64 [[TMP15]] to i8*
-// CHECK11-NEXT: store i8* [[TMP22]], i8** [[TMP21]], align 8
-// CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
-// CHECK11-NEXT: [[TMP24:%.*]] = inttoptr i64 [[TMP17]] to i8*
-// CHECK11-NEXT: store i8* [[TMP24]], i8** [[TMP23]], align 8
-// CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
-// CHECK11-NEXT: [[TMP26:%.*]] = inttoptr i64 [[TMP19]] to i8*
-// CHECK11-NEXT: store i8* [[TMP26]], i8** [[TMP25]], align 8
-// CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 3
-// CHECK11-NEXT: [[TMP28:%.*]] = bitcast [1000 x i32]* [[TMP0]] to i8*
-// CHECK11-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 8
-// CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 4
-// CHECK11-NEXT: [[TMP30:%.*]] = bitcast i32* [[TMP20]] to i8*
-// CHECK11-NEXT: store i8* [[TMP30]], i8** [[TMP29]], align 8
-// CHECK11-NEXT: [[TMP31:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK11-NEXT: [[TMP32:%.*]] = load i32, i32* [[TMP31]], align 4
-// CHECK11-NEXT: [[TMP33:%.*]] = bitcast [5 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK11-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP32]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, i64, [1000 x i32]*, i32*)* @__omp_outlined__11 to i8*), i8* null, i8** [[TMP33]], i64 5)
-// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK11: omp.inner.for.inc:
-// CHECK11-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK11-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP34]], [[TMP35]]
-// CHECK11-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK11-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP36]], [[TMP37]]
-// CHECK11-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK11-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP38]], [[TMP39]]
-// CHECK11-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK11-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP40]], [[TMP41]]
-// CHECK11-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
-// CHECK11: cond.true11:
-// CHECK11-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK11-NEXT: br label [[COND_END13:%.*]]
-// CHECK11: cond.false12:
-// CHECK11-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: br label [[COND_END13]]
-// CHECK11: cond.end13:
-// CHECK11-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP42]], [[COND_TRUE11]] ], [ [[TMP43]], [[COND_FALSE12]] ]
-// CHECK11-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK11-NEXT: store i32 [[TMP44]], i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK11: omp.inner.for.end:
-// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK11: omp.loop.exit:
-// CHECK11-NEXT: [[TMP45:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK11-NEXT: [[TMP46:%.*]] = load i32, i32* [[TMP45]], align 4
-// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP46]])
-// CHECK11-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK11: omp.precond.end:
-// CHECK11-NEXT: ret void
-// CHECK11-LABEL: define {{[^@]+}}@__omp_outlined__11
-// CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* [[V:%.*]]) #[[ATTR0]] {
-// CHECK11-NEXT: entry:
-// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
-// CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
-// CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
-// CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
-// CHECK11-NEXT: [[V_ADDR:%.*]] = alloca i32*, align 8
-// CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[I5:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
-// CHECK11-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
-// CHECK11-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK11-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
-// CHECK11-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
-// CHECK11-NEXT: store i32* [[V]], i32** [[V_ADDR]], align 8
-// CHECK11-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
-// CHECK11-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
-// CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK11-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK11-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK11: omp.precond.then:
-// CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
-// CHECK11-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
-// CHECK11-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP5]] to i32
-// CHECK11-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK11-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP6]] to i32
-// CHECK11-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4
-// CHECK11-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4
-// CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK11-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK11-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK11: omp.inner.for.cond:
-// CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[CONV6:%.*]] = sext i32 [[TMP10]] to i64
-// CHECK11-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK11-NEXT: [[CMP7:%.*]] = icmp ule i64 [[CONV6]], [[TMP11]]
-// CHECK11-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK11: omp.inner.for.body:
-// CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
-// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK11-NEXT: store i32 [[ADD]], i32* [[I5]], align 4
-// CHECK11-NEXT: [[TMP13:%.*]] = load i32*, i32** [[V_ADDR]], align 8
-// CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[I5]], align 4
-// CHECK11-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP14]] to i64
-// CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP13]], i64 [[IDXPROM]]
-// CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
-// CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[I5]], align 4
-// CHECK11-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP16]] to i64
-// CHECK11-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM8]]
-// CHECK11-NEXT: store i32 [[TMP15]], i32* [[ARRAYIDX9]], align 4
-// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK11: omp.body.continue:
-// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK11: omp.inner.for.inc:
-// CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK11-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
-// CHECK11-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK11: omp.inner.for.end:
-// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK11: omp.loop.exit:
-// CHECK11-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4
-// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]])
-// CHECK11-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK11: omp.precond.end:
-// CHECK11-NEXT: ret void
-// CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l43
-// CHECK12-SAME: (i64 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i64 [[L:%.*]]) #[[ATTR0:[0-9]+]] {
-// CHECK12-NEXT: entry:
-// CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
-// CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
-// CHECK12-NEXT: [[L_ADDR:%.*]] = alloca i64, align 8
-// CHECK12-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
-// CHECK12-NEXT: [[L_CASTED:%.*]] = alloca i64, align 8
-// CHECK12-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK12-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
-// CHECK12-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
-// CHECK12-NEXT: store i64 [[L]], i64* [[L_ADDR]], align 8
-// CHECK12-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
-// CHECK12-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
-// CHECK12-NEXT: [[CONV1:%.*]] = bitcast i64* [[L_ADDR]] to i32*
-// CHECK12-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK12-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK12-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK12: .execute:
-// CHECK12-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]])
-// CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK12-NEXT: [[CONV2:%.*]] = bitcast i64* [[N_CASTED]] to i32*
-// CHECK12-NEXT: store i32 [[TMP2]], i32* [[CONV2]], align 4
-// CHECK12-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
-// CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV1]], align 8
-// CHECK12-NEXT: [[CONV3:%.*]] = bitcast i64* [[L_CASTED]] to i32*
-// CHECK12-NEXT: store i32 [[TMP4]], i32* [[CONV3]], align 4
-// CHECK12-NEXT: [[TMP5:%.*]] = load i64, i64* [[L_CASTED]], align 8
-// CHECK12-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK12-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i64 [[TMP3]], [1000 x i32]* [[TMP0]], i64 [[TMP5]]) #[[ATTR3:[0-9]+]]
-// CHECK12-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK12: .omp.deinit:
-// CHECK12-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK12-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK12: .exit:
-// CHECK12-NEXT: ret void
-// CHECK12-LABEL: define {{[^@]+}}@__omp_outlined__
-// CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i64 [[L:%.*]]) #[[ATTR0]] {
-// CHECK12-NEXT: entry:
-// CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
-// CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
-// CHECK12-NEXT: [[L_ADDR:%.*]] = alloca i64, align 8
-// CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[I5:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
-// CHECK12-NEXT: [[L_CASTED:%.*]] = alloca i64, align 8
-// CHECK12-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [5 x i8*], align 8
-// CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
-// CHECK12-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
-// CHECK12-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
-// CHECK12-NEXT: store i64 [[L]], i64* [[L_ADDR]], align 8
-// CHECK12-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
-// CHECK12-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
-// CHECK12-NEXT: [[CONV1:%.*]] = bitcast i64* [[L_ADDR]] to i32*
-// CHECK12-NEXT: [[TMP1:%.*]] = call i8* @__kmpc_data_sharing_push_stack(i64 4, i16 1)
-// CHECK12-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to %struct._globalized_locals_ty*
-// CHECK12-NEXT: [[L2:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY:%.*]], %struct._globalized_locals_ty* [[TMP2]], i32 0, i32 0
-// CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK12-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
-// CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK12-NEXT: [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK12-NEXT: store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_3]], align 4
-// CHECK12-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
-// CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK12: omp.precond.then:
-// CHECK12-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
-// CHECK12-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK12-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 128)
-// CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
-// CHECK12-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
-// CHECK12-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK12: cond.true:
-// CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
-// CHECK12-NEXT: br label [[COND_END:%.*]]
-// CHECK12: cond.false:
-// CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: br label [[COND_END]]
-// CHECK12: cond.end:
-// CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
-// CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK12-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK12: omp.inner.for.cond:
-// CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
-// CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], 1
-// CHECK12-NEXT: [[CMP7:%.*]] = icmp slt i32 [[TMP14]], [[ADD]]
-// CHECK12-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK12: omp.inner.for.body:
-// CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK12-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
-// CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
-// CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK12-NEXT: [[CONV8:%.*]] = bitcast i64* [[N_CASTED]] to i32*
-// CHECK12-NEXT: store i32 [[TMP20]], i32* [[CONV8]], align 4
-// CHECK12-NEXT: [[TMP21:%.*]] = load i64, i64* [[N_CASTED]], align 8
-// CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[CONV1]], align 8
-// CHECK12-NEXT: [[CONV9:%.*]] = bitcast i64* [[L_CASTED]] to i32*
-// CHECK12-NEXT: store i32 [[TMP22]], i32* [[CONV9]], align 4
-// CHECK12-NEXT: [[TMP23:%.*]] = load i64, i64* [[L_CASTED]], align 8
-// CHECK12-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
-// CHECK12-NEXT: [[TMP25:%.*]] = inttoptr i64 [[TMP17]] to i8*
-// CHECK12-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 8
-// CHECK12-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
-// CHECK12-NEXT: [[TMP27:%.*]] = inttoptr i64 [[TMP19]] to i8*
-// CHECK12-NEXT: store i8* [[TMP27]], i8** [[TMP26]], align 8
-// CHECK12-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
-// CHECK12-NEXT: [[TMP29:%.*]] = inttoptr i64 [[TMP21]] to i8*
-// CHECK12-NEXT: store i8* [[TMP29]], i8** [[TMP28]], align 8
-// CHECK12-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 3
-// CHECK12-NEXT: [[TMP31:%.*]] = bitcast [1000 x i32]* [[TMP0]] to i8*
-// CHECK12-NEXT: store i8* [[TMP31]], i8** [[TMP30]], align 8
-// CHECK12-NEXT: [[TMP32:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 4
-// CHECK12-NEXT: [[TMP33:%.*]] = inttoptr i64 [[TMP23]] to i8*
-// CHECK12-NEXT: store i8* [[TMP33]], i8** [[TMP32]], align 8
-// CHECK12-NEXT: [[TMP34:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK12-NEXT: [[TMP35:%.*]] = load i32, i32* [[TMP34]], align 4
-// CHECK12-NEXT: [[TMP36:%.*]] = bitcast [5 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK12-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP35]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, i64, [1000 x i32]*, i64)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP36]], i64 5)
-// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK12: omp.inner.for.inc:
-// CHECK12-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK12-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP37]], [[TMP38]]
-// CHECK12-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK12-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK12-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP39]], [[TMP40]]
-// CHECK12-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK12-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK12-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP41]], [[TMP42]]
-// CHECK12-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
-// CHECK12-NEXT: [[CMP13:%.*]] = icmp sgt i32 [[TMP43]], [[TMP44]]
-// CHECK12-NEXT: br i1 [[CMP13]], label [[COND_TRUE14:%.*]], label [[COND_FALSE15:%.*]]
-// CHECK12: cond.true14:
-// CHECK12-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
-// CHECK12-NEXT: br label [[COND_END16:%.*]]
-// CHECK12: cond.false15:
-// CHECK12-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: br label [[COND_END16]]
-// CHECK12: cond.end16:
-// CHECK12-NEXT: [[COND17:%.*]] = phi i32 [ [[TMP45]], [[COND_TRUE14]] ], [ [[TMP46]], [[COND_FALSE15]] ]
-// CHECK12-NEXT: store i32 [[COND17]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK12-NEXT: store i32 [[TMP47]], i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK12: omp.inner.for.end:
-// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK12: omp.loop.exit:
-// CHECK12-NEXT: [[TMP48:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK12-NEXT: [[TMP49:%.*]] = load i32, i32* [[TMP48]], align 4
-// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP49]])
-// CHECK12-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK12-NEXT: [[TMP51:%.*]] = icmp ne i32 [[TMP50]], 0
-// CHECK12-NEXT: br i1 [[TMP51]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
-// CHECK12: .omp.lastprivate.then:
-// CHECK12-NEXT: [[TMP52:%.*]] = load i32, i32* [[CONV1]], align 8
-// CHECK12-NEXT: store i32 [[TMP52]], i32* [[CONV1]], align 8
-// CHECK12-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
-// CHECK12: .omp.lastprivate.done:
-// CHECK12-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK12: omp.precond.end:
-// CHECK12-NEXT: call void @__kmpc_data_sharing_pop_stack(i8* [[TMP1]])
-// CHECK12-NEXT: ret void
-// CHECK12-LABEL: define {{[^@]+}}@__omp_outlined__1
-// CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i64 [[L:%.*]]) #[[ATTR0]] {
-// CHECK12-NEXT: entry:
-// CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
-// CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
-// CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
-// CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
-// CHECK12-NEXT: [[L_ADDR:%.*]] = alloca i64, align 8
-// CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[I6:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
-// CHECK12-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
-// CHECK12-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK12-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
-// CHECK12-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
-// CHECK12-NEXT: store i64 [[L]], i64* [[L_ADDR]], align 8
-// CHECK12-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
-// CHECK12-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
-// CHECK12-NEXT: [[CONV1:%.*]] = bitcast i64* [[L_ADDR]] to i32*
-// CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK12-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK12-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK12-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK12-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK12: omp.precond.then:
-// CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
-// CHECK12-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
-// CHECK12-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP5]] to i32
-// CHECK12-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK12-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP6]] to i32
-// CHECK12-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4
-// CHECK12-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4
-// CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK12-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 32)
-// CHECK12-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
-// CHECK12: omp.dispatch.cond:
-// CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK12-NEXT: [[CONV7:%.*]] = sext i32 [[TMP9]] to i64
-// CHECK12-NEXT: [[TMP10:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK12-NEXT: [[CMP8:%.*]] = icmp ugt i64 [[CONV7]], [[TMP10]]
-// CHECK12-NEXT: br i1 [[CMP8]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK12: cond.true:
-// CHECK12-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK12-NEXT: br label [[COND_END:%.*]]
-// CHECK12: cond.false:
-// CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK12-NEXT: [[CONV9:%.*]] = sext i32 [[TMP12]] to i64
-// CHECK12-NEXT: br label [[COND_END]]
-// CHECK12: cond.end:
-// CHECK12-NEXT: [[COND:%.*]] = phi i64 [ [[TMP11]], [[COND_TRUE]] ], [ [[CONV9]], [[COND_FALSE]] ]
-// CHECK12-NEXT: [[CONV10:%.*]] = trunc i64 [[COND]] to i32
-// CHECK12-NEXT: store i32 [[CONV10]], i32* [[DOTOMP_UB]], align 4
-// CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK12-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK12-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
-// CHECK12-NEXT: br i1 [[CMP11]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
-// CHECK12: omp.dispatch.body:
-// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK12: omp.inner.for.cond:
-// CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK12-NEXT: [[CMP12:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
-// CHECK12-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK12: omp.inner.for.body:
-// CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
-// CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK12-NEXT: store i32 [[ADD]], i32* [[I6]], align 4
-// CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[I6]], align 4
-// CHECK12-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
-// CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
-// CHECK12-NEXT: store i32 1, i32* [[ARRAYIDX]], align 4
-// CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[I6]], align 4
-// CHECK12-NEXT: store i32 [[TMP20]], i32* [[CONV1]], align 8
-// CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK12: omp.body.continue:
-// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK12: omp.inner.for.inc:
-// CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP21]], 1
-// CHECK12-NEXT: store i32 [[ADD13]], i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK12: omp.inner.for.end:
-// CHECK12-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
-// CHECK12: omp.dispatch.inc:
-// CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK12-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK12-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
-// CHECK12-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_LB]], align 4
-// CHECK12-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK12-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK12-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
-// CHECK12-NEXT: store i32 [[ADD15]], i32* [[DOTOMP_UB]], align 4
-// CHECK12-NEXT: br label [[OMP_DISPATCH_COND]]
-// CHECK12: omp.dispatch.end:
-// CHECK12-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK12-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
-// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP27]])
-// CHECK12-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK12-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
-// CHECK12-NEXT: br i1 [[TMP29]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
-// CHECK12: .omp.lastprivate.then:
-// CHECK12-NEXT: [[TMP30:%.*]] = load i32, i32* [[CONV1]], align 8
-// CHECK12-NEXT: store i32 [[TMP30]], i32* [[CONV1]], align 8
-// CHECK12-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
-// CHECK12: .omp.lastprivate.done:
-// CHECK12-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK12: omp.precond.end:
-// CHECK12-NEXT: ret void
-// CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l49
-// CHECK12-SAME: (i64 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
-// CHECK12-NEXT: entry:
-// CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
-// CHECK12-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 8
-// CHECK12-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
-// CHECK12-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK12-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
-// CHECK12-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 8
-// CHECK12-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
-// CHECK12-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 8
-// CHECK12-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK12-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK12-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK12: .execute:
-// CHECK12-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK12-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
-// CHECK12-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
-// CHECK12-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
-// CHECK12-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK12-NEXT: call void @__omp_outlined__2(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i64 [[TMP3]], [1000 x i16]* [[TMP0]]) #[[ATTR3]]
-// CHECK12-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK12: .omp.deinit:
-// CHECK12-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK12-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK12: .exit:
-// CHECK12-NEXT: ret void
-// CHECK12-LABEL: define {{[^@]+}}@__omp_outlined__2
-// CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
-// CHECK12-NEXT: entry:
-// CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
-// CHECK12-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 8
-// CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
-// CHECK12-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 8
-// CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
-// CHECK12-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
-// CHECK12-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 8
-// CHECK12-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
-// CHECK12-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 8
-// CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK12-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK12-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK12: omp.precond.then:
-// CHECK12-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK12-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK12-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
-// CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK12-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
-// CHECK12-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK12: cond.true:
-// CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK12-NEXT: br label [[COND_END:%.*]]
-// CHECK12: cond.false:
-// CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: br label [[COND_END]]
-// CHECK12: cond.end:
-// CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
-// CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK12-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK12: omp.inner.for.cond:
-// CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1
-// CHECK12-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]
-// CHECK12-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK12: omp.inner.for.body:
-// CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK12-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i64
-// CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
-// CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK12-NEXT: [[CONV6:%.*]] = bitcast i64* [[N_CASTED]] to i32*
-// CHECK12-NEXT: store i32 [[TMP18]], i32* [[CONV6]], align 4
-// CHECK12-NEXT: [[TMP19:%.*]] = load i64, i64* [[N_CASTED]], align 8
-// CHECK12-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
-// CHECK12-NEXT: [[TMP21:%.*]] = inttoptr i64 [[TMP15]] to i8*
-// CHECK12-NEXT: store i8* [[TMP21]], i8** [[TMP20]], align 8
-// CHECK12-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
-// CHECK12-NEXT: [[TMP23:%.*]] = inttoptr i64 [[TMP17]] to i8*
-// CHECK12-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 8
-// CHECK12-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
-// CHECK12-NEXT: [[TMP25:%.*]] = inttoptr i64 [[TMP19]] to i8*
-// CHECK12-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 8
-// CHECK12-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 3
-// CHECK12-NEXT: [[TMP27:%.*]] = bitcast [1000 x i16]* [[TMP0]] to i8*
-// CHECK12-NEXT: store i8* [[TMP27]], i8** [[TMP26]], align 8
-// CHECK12-NEXT: [[TMP28:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK12-NEXT: [[TMP29:%.*]] = load i32, i32* [[TMP28]], align 4
-// CHECK12-NEXT: [[TMP30:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK12-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP29]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, i64, [1000 x i16]*)* @__omp_outlined__3 to i8*), i8* null, i8** [[TMP30]], i64 4)
-// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK12: omp.inner.for.inc:
-// CHECK12-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK12-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP31]], [[TMP32]]
-// CHECK12-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK12-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK12-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP33]], [[TMP34]]
-// CHECK12-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK12-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK12-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP35]], [[TMP36]]
-// CHECK12-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK12-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP37]], [[TMP38]]
-// CHECK12-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
-// CHECK12: cond.true11:
-// CHECK12-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK12-NEXT: br label [[COND_END13:%.*]]
-// CHECK12: cond.false12:
-// CHECK12-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: br label [[COND_END13]]
-// CHECK12: cond.end13:
-// CHECK12-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP39]], [[COND_TRUE11]] ], [ [[TMP40]], [[COND_FALSE12]] ]
-// CHECK12-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK12-NEXT: store i32 [[TMP41]], i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK12: omp.inner.for.end:
-// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK12: omp.loop.exit:
-// CHECK12-NEXT: [[TMP42:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK12-NEXT: [[TMP43:%.*]] = load i32, i32* [[TMP42]], align 4
-// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP43]])
-// CHECK12-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK12: omp.precond.end:
-// CHECK12-NEXT: ret void
-// CHECK12-LABEL: define {{[^@]+}}@__omp_outlined__3
-// CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
-// CHECK12-NEXT: entry:
-// CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
-// CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
-// CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
-// CHECK12-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 8
-// CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[I5:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
-// CHECK12-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
-// CHECK12-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK12-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
-// CHECK12-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 8
-// CHECK12-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
-// CHECK12-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 8
-// CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK12-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK12-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK12: omp.precond.then:
-// CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
-// CHECK12-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
-// CHECK12-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP5]] to i32
-// CHECK12-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK12-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP6]] to i32
-// CHECK12-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4
-// CHECK12-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4
-// CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK12-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK12-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK12: omp.inner.for.cond:
-// CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[CONV6:%.*]] = sext i32 [[TMP10]] to i64
-// CHECK12-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK12-NEXT: [[CMP7:%.*]] = icmp ule i64 [[CONV6]], [[TMP11]]
-// CHECK12-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK12: omp.inner.for.body:
-// CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
-// CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK12-NEXT: store i32 [[ADD]], i32* [[I5]], align 4
-// CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[I5]], align 4
-// CHECK12-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
-// CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i16], [1000 x i16]* [[TMP0]], i64 0, i64 [[IDXPROM]]
-// CHECK12-NEXT: [[TMP14:%.*]] = load i16, i16* [[ARRAYIDX]], align 2
-// CHECK12-NEXT: [[CONV8:%.*]] = sext i16 [[TMP14]] to i32
-// CHECK12-NEXT: [[ADD9:%.*]] = add nsw i32 [[CONV8]], 1
-// CHECK12-NEXT: [[CONV10:%.*]] = trunc i32 [[ADD9]] to i16
-// CHECK12-NEXT: store i16 [[CONV10]], i16* [[ARRAYIDX]], align 2
-// CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK12: omp.body.continue:
-// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK12: omp.inner.for.inc:
-// CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK12-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
-// CHECK12-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK12: omp.inner.for.end:
-// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK12: omp.loop.exit:
-// CHECK12-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
-// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]])
-// CHECK12-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK12: omp.precond.end:
-// CHECK12-NEXT: ret void
-// CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l54
-// CHECK12-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
-// CHECK12-NEXT: entry:
-// CHECK12-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8
-// CHECK12-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK12-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8
-// CHECK12-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8
-// CHECK12-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK12-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK12-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK12: .execute:
-// CHECK12-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK12-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK12-NEXT: call void @__omp_outlined__4(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x i32]* [[TMP0]]) #[[ATTR3]]
-// CHECK12-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK12: .omp.deinit:
-// CHECK12-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK12-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK12: .exit:
-// CHECK12-NEXT: ret void
-// CHECK12-LABEL: define {{[^@]+}}@__omp_outlined__4
-// CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
-// CHECK12-NEXT: entry:
-// CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK12-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8
-// CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [3 x i8*], align 8
-// CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
-// CHECK12-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8
-// CHECK12-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8
-// CHECK12-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK12-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK12-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
-// CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
-// CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK12: cond.true:
-// CHECK12-NEXT: br label [[COND_END:%.*]]
-// CHECK12: cond.false:
-// CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: br label [[COND_END]]
-// CHECK12: cond.end:
-// CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
-// CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK12: omp.inner.for.cond:
-// CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP6]], 10
-// CHECK12-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK12: omp.inner.for.body:
-// CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK12-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
-// CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
-// CHECK12-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
-// CHECK12-NEXT: [[TMP12:%.*]] = inttoptr i64 [[TMP8]] to i8*
-// CHECK12-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 8
-// CHECK12-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
-// CHECK12-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP10]] to i8*
-// CHECK12-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 8
-// CHECK12-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
-// CHECK12-NEXT: [[TMP16:%.*]] = bitcast [10 x i32]* [[TMP0]] to i8*
-// CHECK12-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 8
-// CHECK12-NEXT: [[TMP17:%.*]] = bitcast [3 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK12-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @__omp_outlined__5 to i8*), i8* null, i8** [[TMP17]], i64 3)
-// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK12: omp.inner.for.inc:
-// CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
-// CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK12-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
-// CHECK12-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK12-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
-// CHECK12-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP24]], 9
-// CHECK12-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
-// CHECK12: cond.true5:
-// CHECK12-NEXT: br label [[COND_END7:%.*]]
-// CHECK12: cond.false6:
-// CHECK12-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: br label [[COND_END7]]
-// CHECK12: cond.end7:
-// CHECK12-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP25]], [[COND_FALSE6]] ]
-// CHECK12-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK12-NEXT: store i32 [[TMP26]], i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK12: omp.inner.for.end:
-// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK12: omp.loop.exit:
-// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
-// CHECK12-NEXT: ret void
-// CHECK12-LABEL: define {{[^@]+}}@__omp_outlined__5
-// CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
-// CHECK12-NEXT: entry:
-// CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
-// CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
-// CHECK12-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8
-// CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
-// CHECK12-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
-// CHECK12-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK12-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8
-// CHECK12-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8
-// CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK12-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
-// CHECK12-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
-// CHECK12-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
-// CHECK12-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK12-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
-// CHECK12-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
-// CHECK12-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
-// CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK12-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
-// CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK12: omp.inner.for.cond:
-// CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[CONV2:%.*]] = sext i32 [[TMP6]] to i64
-// CHECK12-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK12-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV2]], [[TMP7]]
-// CHECK12-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK12: omp.inner.for.body:
-// CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
-// CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4
-// CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
-// CHECK12-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64
-// CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
-// CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
-// CHECK12-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
-// CHECK12-NEXT: store i32 [[ADD3]], i32* [[ARRAYIDX]], align 4
-// CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK12: omp.body.continue:
-// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK12: omp.inner.for.inc:
-// CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK12-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
-// CHECK12-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK12: omp.inner.for.end:
-// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK12: omp.loop.exit:
-// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
-// CHECK12-NEXT: ret void
-// CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l59
-// CHECK12-SAME: ([10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i64 [[F:%.*]]) #[[ATTR0]] {
-// CHECK12-NEXT: entry:
-// CHECK12-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 8
-// CHECK12-NEXT: [[F_ADDR:%.*]] = alloca i64, align 8
-// CHECK12-NEXT: [[F_CASTED:%.*]] = alloca i64, align 8
-// CHECK12-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK12-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 8
-// CHECK12-NEXT: store i64 [[F]], i64* [[F_ADDR]], align 8
-// CHECK12-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 8
-// CHECK12-NEXT: [[CONV:%.*]] = bitcast i64* [[F_ADDR]] to i32*
-// CHECK12-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK12-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK12-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK12: .execute:
-// CHECK12-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK12-NEXT: [[CONV1:%.*]] = bitcast i64* [[F_CASTED]] to i32*
-// CHECK12-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
-// CHECK12-NEXT: [[TMP3:%.*]] = load i64, i64* [[F_CASTED]], align 8
-// CHECK12-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK12-NEXT: call void @__omp_outlined__6(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x [10 x i32]]* [[TMP0]], i64 [[TMP3]]) #[[ATTR3]]
-// CHECK12-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK12: .omp.deinit:
-// CHECK12-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK12-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK12: .exit:
-// CHECK12-NEXT: ret void
-// CHECK12-LABEL: define {{[^@]+}}@__omp_outlined__6
-// CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i64 [[F:%.*]]) #[[ATTR0]] {
-// CHECK12-NEXT: entry:
-// CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK12-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 8
-// CHECK12-NEXT: [[F_ADDR:%.*]] = alloca i64, align 8
-// CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[K:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[J:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[F_CASTED:%.*]] = alloca i64, align 8
-// CHECK12-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 8
-// CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
-// CHECK12-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 8
-// CHECK12-NEXT: store i64 [[F]], i64* [[F_ADDR]], align 8
-// CHECK12-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 8
-// CHECK12-NEXT: [[CONV:%.*]] = bitcast i64* [[F_ADDR]] to i32*
-// CHECK12-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK12-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK12-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
-// CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
-// CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK12: cond.true:
-// CHECK12-NEXT: br label [[COND_END:%.*]]
-// CHECK12: cond.false:
-// CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: br label [[COND_END]]
-// CHECK12: cond.end:
-// CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
-// CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK12: omp.inner.for.cond:
-// CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP6]], 100
-// CHECK12-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK12: omp.inner.for.body:
-// CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK12-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
-// CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
-// CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK12-NEXT: [[CONV3:%.*]] = bitcast i64* [[F_CASTED]] to i32*
-// CHECK12-NEXT: store i32 [[TMP11]], i32* [[CONV3]], align 4
-// CHECK12-NEXT: [[TMP12:%.*]] = load i64, i64* [[F_CASTED]], align 8
-// CHECK12-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
-// CHECK12-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP8]] to i8*
-// CHECK12-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 8
-// CHECK12-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
-// CHECK12-NEXT: [[TMP16:%.*]] = inttoptr i64 [[TMP10]] to i8*
-// CHECK12-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 8
-// CHECK12-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
-// CHECK12-NEXT: [[TMP18:%.*]] = bitcast [10 x [10 x i32]]* [[TMP0]] to i8*
-// CHECK12-NEXT: store i8* [[TMP18]], i8** [[TMP17]], align 8
-// CHECK12-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 3
-// CHECK12-NEXT: [[TMP20:%.*]] = inttoptr i64 [[TMP12]] to i8*
-// CHECK12-NEXT: store i8* [[TMP20]], i8** [[TMP19]], align 8
-// CHECK12-NEXT: [[TMP21:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK12-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, [10 x [10 x i32]]*, i64)* @__omp_outlined__7 to i8*), i8* null, i8** [[TMP21]], i64 4)
-// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK12: omp.inner.for.inc:
-// CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
-// CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK12-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK12-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
-// CHECK12-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK12-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK12-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP26]], [[TMP27]]
-// CHECK12-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP28]], 99
-// CHECK12-NEXT: br i1 [[CMP6]], label [[COND_TRUE7:%.*]], label [[COND_FALSE8:%.*]]
-// CHECK12: cond.true7:
-// CHECK12-NEXT: br label [[COND_END9:%.*]]
-// CHECK12: cond.false8:
-// CHECK12-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: br label [[COND_END9]]
-// CHECK12: cond.end9:
-// CHECK12-NEXT: [[COND10:%.*]] = phi i32 [ 99, [[COND_TRUE7]] ], [ [[TMP29]], [[COND_FALSE8]] ]
-// CHECK12-NEXT: store i32 [[COND10]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK12-NEXT: store i32 [[TMP30]], i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK12: omp.inner.for.end:
-// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK12: omp.loop.exit:
-// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
-// CHECK12-NEXT: ret void
-// CHECK12-LABEL: define {{[^@]+}}@__omp_outlined__7
-// CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i64 [[F:%.*]]) #[[ATTR0]] {
-// CHECK12-NEXT: entry:
-// CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
-// CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
-// CHECK12-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 8
-// CHECK12-NEXT: [[F_ADDR:%.*]] = alloca i64, align 8
-// CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[K:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[J:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
-// CHECK12-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
-// CHECK12-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK12-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 8
-// CHECK12-NEXT: store i64 [[F]], i64* [[F_ADDR]], align 8
-// CHECK12-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 8
-// CHECK12-NEXT: [[CONV:%.*]] = bitcast i64* [[F_ADDR]] to i32*
-// CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK12-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
-// CHECK12-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
-// CHECK12-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32
-// CHECK12-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK12-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP2]] to i32
-// CHECK12-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_LB]], align 4
-// CHECK12-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4
-// CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK12-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
-// CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK12: omp.inner.for.cond:
-// CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[CONV4:%.*]] = sext i32 [[TMP6]] to i64
-// CHECK12-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK12-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV4]], [[TMP7]]
-// CHECK12-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK12: omp.inner.for.body:
-// CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP8]], 10
-// CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
-// CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4
-// CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[DIV5:%.*]] = sdiv i32 [[TMP10]], 10
-// CHECK12-NEXT: [[MUL6:%.*]] = mul nsw i32 [[DIV5]], 10
-// CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL6]]
-// CHECK12-NEXT: [[MUL7:%.*]] = mul nsw i32 [[SUB]], 1
-// CHECK12-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL7]]
-// CHECK12-NEXT: store i32 [[ADD8]], i32* [[J]], align 4
-// CHECK12-NEXT: store i32 10, i32* [[K]], align 4
-// CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
-// CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[J]], align 4
-// CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK12-NEXT: [[MUL9:%.*]] = mul nsw i32 [[TMP12]], [[TMP13]]
-// CHECK12-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP11]], [[MUL9]]
-// CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[K]], align 4
-// CHECK12-NEXT: [[ADD11:%.*]] = add nsw i32 [[ADD10]], [[TMP14]]
-// CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4
-// CHECK12-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64
-// CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [10 x i32]], [10 x [10 x i32]]* [[TMP0]], i64 0, i64 [[IDXPROM]]
-// CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[J]], align 4
-// CHECK12-NEXT: [[IDXPROM12:%.*]] = sext i32 [[TMP16]] to i64
-// CHECK12-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[ARRAYIDX]], i64 0, i64 [[IDXPROM12]]
-// CHECK12-NEXT: store i32 [[ADD11]], i32* [[ARRAYIDX13]], align 4
-// CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK12: omp.body.continue:
-// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK12: omp.inner.for.inc:
-// CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK12-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
-// CHECK12-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK12: omp.inner.for.end:
-// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK12: omp.loop.exit:
-// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
-// CHECK12-NEXT: ret void
-// CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l67
-// CHECK12-SAME: (i64 [[N:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]]) #[[ATTR0]] {
-// CHECK12-NEXT: entry:
-// CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
-// CHECK12-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 8
-// CHECK12-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
-// CHECK12-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK12-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
-// CHECK12-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 8
-// CHECK12-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
-// CHECK12-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 8
-// CHECK12-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK12-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK12-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK12: .execute:
-// CHECK12-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK12-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
-// CHECK12-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
-// CHECK12-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
-// CHECK12-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK12-NEXT: call void @__omp_outlined__8(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i64 [[TMP3]], [10 x [10 x i32]]* [[TMP0]]) #[[ATTR3]]
-// CHECK12-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK12: .omp.deinit:
-// CHECK12-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK12-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK12: .exit:
-// CHECK12-NEXT: ret void
-// CHECK12-LABEL: define {{[^@]+}}@__omp_outlined__8
-// CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]]) #[[ATTR0]] {
-// CHECK12-NEXT: entry:
-// CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
-// CHECK12-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 8
-// CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[J:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[I8:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[J9:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
-// CHECK12-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 8
-// CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
-// CHECK12-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
-// CHECK12-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 8
-// CHECK12-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
-// CHECK12-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 8
-// CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK12-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK12-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
-// CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK12-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP4]], 0
-// CHECK12-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1
-// CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], [[DIV5]]
-// CHECK12-NEXT: [[SUB6:%.*]] = sub nsw i32 [[MUL]], 1
-// CHECK12-NEXT: store i32 [[SUB6]], i32* [[DOTCAPTURE_EXPR_3]], align 4
-// CHECK12-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK12-NEXT: store i32 0, i32* [[J]], align 4
-// CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
-// CHECK12-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK12: land.lhs.true:
-// CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK12-NEXT: [[CMP7:%.*]] = icmp slt i32 0, [[TMP6]]
-// CHECK12-NEXT: br i1 [[CMP7]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
-// CHECK12: omp.precond.then:
-// CHECK12-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
-// CHECK12-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK12-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK12-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
-// CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
-// CHECK12-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
-// CHECK12-NEXT: br i1 [[CMP10]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK12: cond.true:
-// CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
-// CHECK12-NEXT: br label [[COND_END:%.*]]
-// CHECK12: cond.false:
-// CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: br label [[COND_END]]
-// CHECK12: cond.end:
-// CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
-// CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK12-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK12: omp.inner.for.cond:
-// CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
-// CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], 1
-// CHECK12-NEXT: [[CMP11:%.*]] = icmp slt i32 [[TMP15]], [[ADD]]
-// CHECK12-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK12: omp.inner.for.body:
-// CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK12-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
-// CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64
-// CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK12-NEXT: [[CONV12:%.*]] = bitcast i64* [[N_CASTED]] to i32*
-// CHECK12-NEXT: store i32 [[TMP21]], i32* [[CONV12]], align 4
-// CHECK12-NEXT: [[TMP22:%.*]] = load i64, i64* [[N_CASTED]], align 8
-// CHECK12-NEXT: [[TMP23:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
-// CHECK12-NEXT: [[TMP24:%.*]] = inttoptr i64 [[TMP18]] to i8*
-// CHECK12-NEXT: store i8* [[TMP24]], i8** [[TMP23]], align 8
-// CHECK12-NEXT: [[TMP25:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
-// CHECK12-NEXT: [[TMP26:%.*]] = inttoptr i64 [[TMP20]] to i8*
-// CHECK12-NEXT: store i8* [[TMP26]], i8** [[TMP25]], align 8
-// CHECK12-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
-// CHECK12-NEXT: [[TMP28:%.*]] = inttoptr i64 [[TMP22]] to i8*
-// CHECK12-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 8
-// CHECK12-NEXT: [[TMP29:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 3
-// CHECK12-NEXT: [[TMP30:%.*]] = bitcast [10 x [10 x i32]]* [[TMP0]] to i8*
-// CHECK12-NEXT: store i8* [[TMP30]], i8** [[TMP29]], align 8
-// CHECK12-NEXT: [[TMP31:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK12-NEXT: [[TMP32:%.*]] = load i32, i32* [[TMP31]], align 4
-// CHECK12-NEXT: [[TMP33:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK12-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP32]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, i64, [10 x [10 x i32]]*)* @__omp_outlined__9 to i8*), i8* null, i8** [[TMP33]], i64 4)
-// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK12: omp.inner.for.inc:
-// CHECK12-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK12-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP34]], [[TMP35]]
-// CHECK12-NEXT: store i32 [[ADD13]], i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK12-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK12-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP36]], [[TMP37]]
-// CHECK12-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK12-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK12-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP38]], [[TMP39]]
-// CHECK12-NEXT: store i32 [[ADD15]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
-// CHECK12-NEXT: [[CMP16:%.*]] = icmp sgt i32 [[TMP40]], [[TMP41]]
-// CHECK12-NEXT: br i1 [[CMP16]], label [[COND_TRUE17:%.*]], label [[COND_FALSE18:%.*]]
-// CHECK12: cond.true17:
-// CHECK12-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
-// CHECK12-NEXT: br label [[COND_END19:%.*]]
-// CHECK12: cond.false18:
-// CHECK12-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: br label [[COND_END19]]
-// CHECK12: cond.end19:
-// CHECK12-NEXT: [[COND20:%.*]] = phi i32 [ [[TMP42]], [[COND_TRUE17]] ], [ [[TMP43]], [[COND_FALSE18]] ]
-// CHECK12-NEXT: store i32 [[COND20]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK12-NEXT: store i32 [[TMP44]], i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK12: omp.inner.for.end:
-// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK12: omp.loop.exit:
-// CHECK12-NEXT: [[TMP45:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK12-NEXT: [[TMP46:%.*]] = load i32, i32* [[TMP45]], align 4
-// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP46]])
-// CHECK12-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK12: omp.precond.end:
-// CHECK12-NEXT: ret void
-// CHECK12-LABEL: define {{[^@]+}}@__omp_outlined__9
-// CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[N:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]]) #[[ATTR0]] {
-// CHECK12-NEXT: entry:
-// CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
-// CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
-// CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
-// CHECK12-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 8
-// CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[J:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[I10:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[J11:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
-// CHECK12-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
-// CHECK12-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK12-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
-// CHECK12-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 8
-// CHECK12-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
-// CHECK12-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 8
-// CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK12-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK12-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
-// CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK12-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP4]], 0
-// CHECK12-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1
-// CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], [[DIV5]]
-// CHECK12-NEXT: [[SUB6:%.*]] = sub nsw i32 [[MUL]], 1
-// CHECK12-NEXT: store i32 [[SUB6]], i32* [[DOTCAPTURE_EXPR_3]], align 4
-// CHECK12-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK12-NEXT: store i32 0, i32* [[J]], align 4
-// CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
-// CHECK12-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK12: land.lhs.true:
-// CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK12-NEXT: [[CMP7:%.*]] = icmp slt i32 0, [[TMP6]]
-// CHECK12-NEXT: br i1 [[CMP7]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
-// CHECK12: omp.precond.then:
-// CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
-// CHECK12-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4
-// CHECK12-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
-// CHECK12-NEXT: [[CONV8:%.*]] = trunc i64 [[TMP8]] to i32
-// CHECK12-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK12-NEXT: [[CONV9:%.*]] = trunc i64 [[TMP9]] to i32
-// CHECK12-NEXT: store i32 [[CONV8]], i32* [[DOTOMP_LB]], align 4
-// CHECK12-NEXT: store i32 [[CONV9]], i32* [[DOTOMP_UB]], align 4
-// CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK12-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
-// CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK12-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK12: omp.inner.for.cond:
-// CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[CONV12:%.*]] = sext i32 [[TMP13]] to i64
-// CHECK12-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK12-NEXT: [[CMP13:%.*]] = icmp ule i64 [[CONV12]], [[TMP14]]
-// CHECK12-NEXT: br i1 [[CMP13]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK12: omp.inner.for.body:
-// CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK12-NEXT: [[SUB14:%.*]] = sub nsw i32 [[TMP16]], 0
-// CHECK12-NEXT: [[DIV15:%.*]] = sdiv i32 [[SUB14]], 1
-// CHECK12-NEXT: [[MUL16:%.*]] = mul nsw i32 1, [[DIV15]]
-// CHECK12-NEXT: [[DIV17:%.*]] = sdiv i32 [[TMP15]], [[MUL16]]
-// CHECK12-NEXT: [[MUL18:%.*]] = mul nsw i32 [[DIV17]], 1
-// CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL18]]
-// CHECK12-NEXT: store i32 [[ADD]], i32* [[I10]], align 4
-// CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK12-NEXT: [[SUB19:%.*]] = sub nsw i32 [[TMP19]], 0
-// CHECK12-NEXT: [[DIV20:%.*]] = sdiv i32 [[SUB19]], 1
-// CHECK12-NEXT: [[MUL21:%.*]] = mul nsw i32 1, [[DIV20]]
-// CHECK12-NEXT: [[DIV22:%.*]] = sdiv i32 [[TMP18]], [[MUL21]]
-// CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK12-NEXT: [[SUB23:%.*]] = sub nsw i32 [[TMP20]], 0
-// CHECK12-NEXT: [[DIV24:%.*]] = sdiv i32 [[SUB23]], 1
-// CHECK12-NEXT: [[MUL25:%.*]] = mul nsw i32 1, [[DIV24]]
-// CHECK12-NEXT: [[MUL26:%.*]] = mul nsw i32 [[DIV22]], [[MUL25]]
-// CHECK12-NEXT: [[SUB27:%.*]] = sub nsw i32 [[TMP17]], [[MUL26]]
-// CHECK12-NEXT: [[MUL28:%.*]] = mul nsw i32 [[SUB27]], 1
-// CHECK12-NEXT: [[ADD29:%.*]] = add nsw i32 0, [[MUL28]]
-// CHECK12-NEXT: store i32 [[ADD29]], i32* [[J11]], align 4
-// CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[I10]], align 4
-// CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[J11]], align 4
-// CHECK12-NEXT: [[ADD30:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
-// CHECK12-NEXT: [[TMP23:%.*]] = load i32, i32* [[I10]], align 4
-// CHECK12-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP23]] to i64
-// CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [10 x i32]], [10 x [10 x i32]]* [[TMP0]], i64 0, i64 [[IDXPROM]]
-// CHECK12-NEXT: [[TMP24:%.*]] = load i32, i32* [[J11]], align 4
-// CHECK12-NEXT: [[IDXPROM31:%.*]] = sext i32 [[TMP24]] to i64
-// CHECK12-NEXT: [[ARRAYIDX32:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[ARRAYIDX]], i64 0, i64 [[IDXPROM31]]
-// CHECK12-NEXT: store i32 [[ADD30]], i32* [[ARRAYIDX32]], align 4
-// CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK12: omp.body.continue:
-// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK12: omp.inner.for.inc:
-// CHECK12-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK12-NEXT: [[ADD33:%.*]] = add nsw i32 [[TMP25]], [[TMP26]]
-// CHECK12-NEXT: store i32 [[ADD33]], i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK12: omp.inner.for.end:
-// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK12: omp.loop.exit:
-// CHECK12-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK12-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4
-// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP28]])
-// CHECK12-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK12: omp.precond.end:
-// CHECK12-NEXT: ret void
-// CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l74
-// CHECK12-SAME: (i64 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* [[V:%.*]]) #[[ATTR0]] {
-// CHECK12-NEXT: entry:
-// CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
-// CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
-// CHECK12-NEXT: [[V_ADDR:%.*]] = alloca i32*, align 8
-// CHECK12-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
-// CHECK12-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK12-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
-// CHECK12-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
-// CHECK12-NEXT: store i32* [[V]], i32** [[V_ADDR]], align 8
-// CHECK12-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
-// CHECK12-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
-// CHECK12-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK12-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK12-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK12: .execute:
-// CHECK12-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK12-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
-// CHECK12-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
-// CHECK12-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
-// CHECK12-NEXT: [[TMP4:%.*]] = load i32*, i32** [[V_ADDR]], align 8
-// CHECK12-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK12-NEXT: call void @__omp_outlined__10(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i64 [[TMP3]], [1000 x i32]* [[TMP0]], i32* [[TMP4]]) #[[ATTR3]]
-// CHECK12-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK12: .omp.deinit:
-// CHECK12-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK12-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK12: .exit:
-// CHECK12-NEXT: ret void
-// CHECK12-LABEL: define {{[^@]+}}@__omp_outlined__10
-// CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* [[V:%.*]]) #[[ATTR0]] {
-// CHECK12-NEXT: entry:
-// CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
-// CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
-// CHECK12-NEXT: [[V_ADDR:%.*]] = alloca i32*, align 8
-// CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
-// CHECK12-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [5 x i8*], align 8
-// CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
-// CHECK12-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
-// CHECK12-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
-// CHECK12-NEXT: store i32* [[V]], i32** [[V_ADDR]], align 8
-// CHECK12-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
-// CHECK12-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
-// CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK12-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK12-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK12: omp.precond.then:
-// CHECK12-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK12-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK12-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
-// CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK12-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
-// CHECK12-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK12: cond.true:
-// CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK12-NEXT: br label [[COND_END:%.*]]
-// CHECK12: cond.false:
-// CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: br label [[COND_END]]
-// CHECK12: cond.end:
-// CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
-// CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK12-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK12: omp.inner.for.cond:
-// CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1
-// CHECK12-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]
-// CHECK12-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK12: omp.inner.for.body:
-// CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK12-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i64
-// CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
-// CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK12-NEXT: [[CONV6:%.*]] = bitcast i64* [[N_CASTED]] to i32*
-// CHECK12-NEXT: store i32 [[TMP18]], i32* [[CONV6]], align 4
-// CHECK12-NEXT: [[TMP19:%.*]] = load i64, i64* [[N_CASTED]], align 8
-// CHECK12-NEXT: [[TMP20:%.*]] = load i32*, i32** [[V_ADDR]], align 8
-// CHECK12-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
-// CHECK12-NEXT: [[TMP22:%.*]] = inttoptr i64 [[TMP15]] to i8*
-// CHECK12-NEXT: store i8* [[TMP22]], i8** [[TMP21]], align 8
-// CHECK12-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
-// CHECK12-NEXT: [[TMP24:%.*]] = inttoptr i64 [[TMP17]] to i8*
-// CHECK12-NEXT: store i8* [[TMP24]], i8** [[TMP23]], align 8
-// CHECK12-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
-// CHECK12-NEXT: [[TMP26:%.*]] = inttoptr i64 [[TMP19]] to i8*
-// CHECK12-NEXT: store i8* [[TMP26]], i8** [[TMP25]], align 8
-// CHECK12-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 3
-// CHECK12-NEXT: [[TMP28:%.*]] = bitcast [1000 x i32]* [[TMP0]] to i8*
-// CHECK12-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 8
-// CHECK12-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 4
-// CHECK12-NEXT: [[TMP30:%.*]] = bitcast i32* [[TMP20]] to i8*
-// CHECK12-NEXT: store i8* [[TMP30]], i8** [[TMP29]], align 8
-// CHECK12-NEXT: [[TMP31:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK12-NEXT: [[TMP32:%.*]] = load i32, i32* [[TMP31]], align 4
-// CHECK12-NEXT: [[TMP33:%.*]] = bitcast [5 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK12-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP32]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, i64, [1000 x i32]*, i32*)* @__omp_outlined__11 to i8*), i8* null, i8** [[TMP33]], i64 5)
-// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK12: omp.inner.for.inc:
-// CHECK12-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK12-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP34]], [[TMP35]]
-// CHECK12-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK12-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK12-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP36]], [[TMP37]]
-// CHECK12-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK12-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK12-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP38]], [[TMP39]]
-// CHECK12-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK12-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP40]], [[TMP41]]
-// CHECK12-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
-// CHECK12: cond.true11:
-// CHECK12-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK12-NEXT: br label [[COND_END13:%.*]]
-// CHECK12: cond.false12:
-// CHECK12-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: br label [[COND_END13]]
-// CHECK12: cond.end13:
-// CHECK12-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP42]], [[COND_TRUE11]] ], [ [[TMP43]], [[COND_FALSE12]] ]
-// CHECK12-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK12-NEXT: store i32 [[TMP44]], i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK12: omp.inner.for.end:
-// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK12: omp.loop.exit:
-// CHECK12-NEXT: [[TMP45:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK12-NEXT: [[TMP46:%.*]] = load i32, i32* [[TMP45]], align 4
-// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP46]])
-// CHECK12-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK12: omp.precond.end:
-// CHECK12-NEXT: ret void
-// CHECK12-LABEL: define {{[^@]+}}@__omp_outlined__11
-// CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* [[V:%.*]]) #[[ATTR0]] {
-// CHECK12-NEXT: entry:
-// CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
-// CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
-// CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
-// CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
-// CHECK12-NEXT: [[V_ADDR:%.*]] = alloca i32*, align 8
-// CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[I5:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
-// CHECK12-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
-// CHECK12-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK12-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
-// CHECK12-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
-// CHECK12-NEXT: store i32* [[V]], i32** [[V_ADDR]], align 8
-// CHECK12-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
-// CHECK12-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
-// CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK12-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK12-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK12: omp.precond.then:
-// CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
-// CHECK12-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
-// CHECK12-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP5]] to i32
-// CHECK12-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK12-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP6]] to i32
-// CHECK12-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4
-// CHECK12-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4
-// CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK12-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK12-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK12: omp.inner.for.cond:
-// CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[CONV6:%.*]] = sext i32 [[TMP10]] to i64
-// CHECK12-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK12-NEXT: [[CMP7:%.*]] = icmp ule i64 [[CONV6]], [[TMP11]]
-// CHECK12-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK12: omp.inner.for.body:
-// CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
-// CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK12-NEXT: store i32 [[ADD]], i32* [[I5]], align 4
-// CHECK12-NEXT: [[TMP13:%.*]] = load i32*, i32** [[V_ADDR]], align 8
-// CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[I5]], align 4
-// CHECK12-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP14]] to i64
-// CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP13]], i64 [[IDXPROM]]
-// CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
-// CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[I5]], align 4
-// CHECK12-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP16]] to i64
-// CHECK12-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM8]]
-// CHECK12-NEXT: store i32 [[TMP15]], i32* [[ARRAYIDX9]], align 4
-// CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK12: omp.body.continue:
-// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK12: omp.inner.for.inc:
-// CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK12-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
-// CHECK12-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK12: omp.inner.for.end:
-// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK12: omp.loop.exit:
-// CHECK12-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4
-// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]])
-// CHECK12-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK12: omp.precond.end:
-// CHECK12-NEXT: ret void
-// CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l43
-// CHECK13-SAME: (i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0:[0-9]+]] {
-// CHECK13-NEXT: entry:
-// CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK13-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[L_CASTED:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK13-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK13-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK13-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
-// CHECK13-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK13-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK13-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK13-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK13: .execute:
-// CHECK13-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]])
-// CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK13-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
-// CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[L_ADDR]], align 4
-// CHECK13-NEXT: store i32 [[TMP4]], i32* [[L_CASTED]], align 4
-// CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[L_CASTED]], align 4
-// CHECK13-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK13-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP3]], [1000 x i32]* [[TMP0]], i32 [[TMP5]]) #[[ATTR3:[0-9]+]]
-// CHECK13-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK13: .omp.deinit:
-// CHECK13-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK13-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK13: .exit:
-// CHECK13-NEXT: ret void
-// CHECK13-LABEL: define {{[^@]+}}@__omp_outlined__
-// CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0]] {
-// CHECK13-NEXT: entry:
-// CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK13-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[I4:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[L_CASTED:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [5 x i8*], align 4
-// CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK13-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK13-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK13-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
-// CHECK13-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK13-NEXT: [[TMP1:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared", align 2
-// CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* @"_openmp_static_kernel$size", align 4
-// CHECK13-NEXT: call void @__kmpc_get_team_static_memory(i16 1, i8* addrspacecast (i8 addrspace(3)* getelementptr inbounds (%"union._shared_openmp_static_memory_type_$_", %"union._shared_openmp_static_memory_type_$_" addrspace(3)* @"_openmp_shared_static_glob_rd_$_", i32 0, i32 0, i32 0) to i8*), i32 [[TMP2]], i16 [[TMP1]], i8** addrspacecast (i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr" to i8**))
-// CHECK13-NEXT: [[TMP3:%.*]] = load i8*, i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr", align 4
-// CHECK13-NEXT: [[TMP4:%.*]] = getelementptr inbounds i8, i8* [[TMP3]], i32 0
-// CHECK13-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to %struct._globalized_locals_ty*
-// CHECK13-NEXT: [[L1:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY:%.*]], %struct._globalized_locals_ty* [[TMP5]], i32 0, i32 0
-// CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0
-// CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK13-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK13-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK13-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]]
-// CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK13: omp.precond.then:
-// CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK13-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK13-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
-// CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 128)
-// CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK13-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]]
-// CHECK13-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK13: cond.true:
-// CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK13-NEXT: br label [[COND_END:%.*]]
-// CHECK13: cond.false:
-// CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK13-NEXT: br label [[COND_END]]
-// CHECK13: cond.end:
-// CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ]
-// CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK13-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
-// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK13: omp.inner.for.cond:
-// CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], 1
-// CHECK13-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP17]], [[ADD]]
-// CHECK13-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK13: omp.inner.for.body:
-// CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK13-NEXT: store i32 [[TMP21]], i32* [[N_CASTED]], align 4
-// CHECK13-NEXT: [[TMP22:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK13-NEXT: [[TMP23:%.*]] = load i32, i32* [[L_ADDR]], align 4
-// CHECK13-NEXT: store i32 [[TMP23]], i32* [[L_CASTED]], align 4
-// CHECK13-NEXT: [[TMP24:%.*]] = load i32, i32* [[L_CASTED]], align 4
-// CHECK13-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK13-NEXT: [[TMP26:%.*]] = inttoptr i32 [[TMP19]] to i8*
-// CHECK13-NEXT: store i8* [[TMP26]], i8** [[TMP25]], align 4
-// CHECK13-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK13-NEXT: [[TMP28:%.*]] = inttoptr i32 [[TMP20]] to i8*
-// CHECK13-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 4
-// CHECK13-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK13-NEXT: [[TMP30:%.*]] = inttoptr i32 [[TMP22]] to i8*
-// CHECK13-NEXT: store i8* [[TMP30]], i8** [[TMP29]], align 4
-// CHECK13-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
-// CHECK13-NEXT: [[TMP32:%.*]] = bitcast [1000 x i32]* [[TMP0]] to i8*
-// CHECK13-NEXT: store i8* [[TMP32]], i8** [[TMP31]], align 4
-// CHECK13-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 4
-// CHECK13-NEXT: [[TMP34:%.*]] = inttoptr i32 [[TMP24]] to i8*
-// CHECK13-NEXT: store i8* [[TMP34]], i8** [[TMP33]], align 4
-// CHECK13-NEXT: [[TMP35:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK13-NEXT: [[TMP36:%.*]] = load i32, i32* [[TMP35]], align 4
-// CHECK13-NEXT: [[TMP37:%.*]] = bitcast [5 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK13-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP36]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i32]*, i32)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP37]], i32 5)
-// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK13: omp.inner.for.inc:
-// CHECK13-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK13-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK13-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP38]], [[TMP39]]
-// CHECK13-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
-// CHECK13-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK13-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK13-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP40]], [[TMP41]]
-// CHECK13-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK13-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK13-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP42]], [[TMP43]]
-// CHECK13-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK13-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK13-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK13-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP44]], [[TMP45]]
-// CHECK13-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
-// CHECK13: cond.true11:
-// CHECK13-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK13-NEXT: br label [[COND_END13:%.*]]
-// CHECK13: cond.false12:
-// CHECK13-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK13-NEXT: br label [[COND_END13]]
-// CHECK13: cond.end13:
-// CHECK13-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP46]], [[COND_TRUE11]] ], [ [[TMP47]], [[COND_FALSE12]] ]
-// CHECK13-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK13-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK13-NEXT: store i32 [[TMP48]], i32* [[DOTOMP_IV]], align 4
-// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK13: omp.inner.for.end:
-// CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK13: omp.loop.exit:
-// CHECK13-NEXT: [[TMP49:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK13-NEXT: [[TMP50:%.*]] = load i32, i32* [[TMP49]], align 4
-// CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP50]])
-// CHECK13-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK13-NEXT: [[TMP52:%.*]] = icmp ne i32 [[TMP51]], 0
-// CHECK13-NEXT: br i1 [[TMP52]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
-// CHECK13: .omp.lastprivate.then:
-// CHECK13-NEXT: [[TMP53:%.*]] = load i32, i32* [[L_ADDR]], align 4
-// CHECK13-NEXT: store i32 [[TMP53]], i32* [[L_ADDR]], align 4
-// CHECK13-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
-// CHECK13: .omp.lastprivate.done:
-// CHECK13-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK13: omp.precond.end:
-// CHECK13-NEXT: [[TMP54:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared", align 2
-// CHECK13-NEXT: call void @__kmpc_restore_team_static_memory(i16 1, i16 [[TMP54]])
-// CHECK13-NEXT: ret void
-// CHECK13-LABEL: define {{[^@]+}}@__omp_outlined__1
-// CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0]] {
-// CHECK13-NEXT: entry:
-// CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK13-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK13-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK13-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK13-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK13-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK13-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
-// CHECK13-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK13-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK13-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK13: omp.precond.then:
-// CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK13-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
-// CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
-// CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
-// CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK13-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 32)
-// CHECK13-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
-// CHECK13: omp.dispatch.cond:
-// CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK13-NEXT: [[CMP4:%.*]] = icmp ugt i32 [[TMP9]], [[TMP10]]
-// CHECK13-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK13: cond.true:
-// CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK13-NEXT: br label [[COND_END:%.*]]
-// CHECK13: cond.false:
-// CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK13-NEXT: br label [[COND_END]]
-// CHECK13: cond.end:
-// CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
-// CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
-// CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK13-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
-// CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK13-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
-// CHECK13-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
-// CHECK13: omp.dispatch.body:
-// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK13: omp.inner.for.cond:
-// CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK13-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
-// CHECK13-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK13: omp.inner.for.body:
-// CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
-// CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK13-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
-// CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4
-// CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 [[TMP19]]
-// CHECK13-NEXT: store i32 1, i32* [[ARRAYIDX]], align 4
-// CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[I3]], align 4
-// CHECK13-NEXT: store i32 [[TMP20]], i32* [[L_ADDR]], align 4
-// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK13: omp.body.continue:
-// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK13: omp.inner.for.inc:
-// CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK13-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP21]], 1
-// CHECK13-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
-// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK13: omp.inner.for.end:
-// CHECK13-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
-// CHECK13: omp.dispatch.inc:
-// CHECK13-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK13-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK13-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
-// CHECK13-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4
-// CHECK13-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK13-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
-// CHECK13-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4
-// CHECK13-NEXT: br label [[OMP_DISPATCH_COND]]
-// CHECK13: omp.dispatch.end:
-// CHECK13-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK13-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
-// CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP27]])
-// CHECK13-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK13-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
-// CHECK13-NEXT: br i1 [[TMP29]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
-// CHECK13: .omp.lastprivate.then:
-// CHECK13-NEXT: [[TMP30:%.*]] = load i32, i32* [[L_ADDR]], align 4
-// CHECK13-NEXT: store i32 [[TMP30]], i32* [[L_ADDR]], align 4
-// CHECK13-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
-// CHECK13: .omp.lastprivate.done:
-// CHECK13-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK13: omp.precond.end:
-// CHECK13-NEXT: ret void
-// CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l49
-// CHECK13-SAME: (i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
-// CHECK13-NEXT: entry:
-// CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
-// CHECK13-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK13-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK13-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK13-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK13-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK13-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK13-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK13: .execute:
-// CHECK13-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK13-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
-// CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK13-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK13-NEXT: call void @__omp_outlined__2(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP3]], [1000 x i16]* [[TMP0]]) #[[ATTR3]]
-// CHECK13-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK13: .omp.deinit:
-// CHECK13-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK13-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK13: .exit:
-// CHECK13-NEXT: ret void
-// CHECK13-LABEL: define {{[^@]+}}@__omp_outlined__2
-// CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
-// CHECK13-NEXT: entry:
-// CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
-// CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 4
-// CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK13-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK13-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK13-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK13-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK13-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK13: omp.precond.then:
-// CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK13-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK13-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK13-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
-// CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK13-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
-// CHECK13-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK13: cond.true:
-// CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK13-NEXT: br label [[COND_END:%.*]]
-// CHECK13: cond.false:
-// CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK13-NEXT: br label [[COND_END]]
-// CHECK13: cond.end:
-// CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
-// CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK13-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
-// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK13: omp.inner.for.cond:
-// CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1
-// CHECK13-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]
-// CHECK13-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK13: omp.inner.for.body:
-// CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK13-NEXT: store i32 [[TMP16]], i32* [[N_CASTED]], align 4
-// CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK13-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK13-NEXT: [[TMP19:%.*]] = inttoptr i32 [[TMP14]] to i8*
-// CHECK13-NEXT: store i8* [[TMP19]], i8** [[TMP18]], align 4
-// CHECK13-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK13-NEXT: [[TMP21:%.*]] = inttoptr i32 [[TMP15]] to i8*
-// CHECK13-NEXT: store i8* [[TMP21]], i8** [[TMP20]], align 4
-// CHECK13-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK13-NEXT: [[TMP23:%.*]] = inttoptr i32 [[TMP17]] to i8*
-// CHECK13-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 4
-// CHECK13-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
-// CHECK13-NEXT: [[TMP25:%.*]] = bitcast [1000 x i16]* [[TMP0]] to i8*
-// CHECK13-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 4
-// CHECK13-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK13-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
-// CHECK13-NEXT: [[TMP28:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK13-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP27]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i16]*)* @__omp_outlined__3 to i8*), i8* null, i8** [[TMP28]], i32 4)
-// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK13: omp.inner.for.inc:
-// CHECK13-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK13-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK13-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP29]], [[TMP30]]
-// CHECK13-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
-// CHECK13-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK13-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK13-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP31]], [[TMP32]]
-// CHECK13-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK13-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK13-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK13-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP33]], [[TMP34]]
-// CHECK13-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK13-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK13-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK13-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP35]], [[TMP36]]
-// CHECK13-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]]
-// CHECK13: cond.true10:
-// CHECK13-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK13-NEXT: br label [[COND_END12:%.*]]
-// CHECK13: cond.false11:
-// CHECK13-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK13-NEXT: br label [[COND_END12]]
-// CHECK13: cond.end12:
-// CHECK13-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP37]], [[COND_TRUE10]] ], [ [[TMP38]], [[COND_FALSE11]] ]
-// CHECK13-NEXT: store i32 [[COND13]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK13-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK13-NEXT: store i32 [[TMP39]], i32* [[DOTOMP_IV]], align 4
-// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK13: omp.inner.for.end:
-// CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK13: omp.loop.exit:
-// CHECK13-NEXT: [[TMP40:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK13-NEXT: [[TMP41:%.*]] = load i32, i32* [[TMP40]], align 4
-// CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP41]])
-// CHECK13-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK13: omp.precond.end:
-// CHECK13-NEXT: ret void
-// CHECK13-LABEL: define {{[^@]+}}@__omp_outlined__3
-// CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
-// CHECK13-NEXT: entry:
-// CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
-// CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK13-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK13-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK13-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK13-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK13-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK13-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK13-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK13: omp.precond.then:
-// CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK13-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
-// CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
-// CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
-// CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK13-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK13-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
-// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK13: omp.inner.for.cond:
-// CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK13-NEXT: [[CMP4:%.*]] = icmp ule i32 [[TMP10]], [[TMP11]]
-// CHECK13-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK13: omp.inner.for.body:
-// CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
-// CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK13-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
-// CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[I3]], align 4
-// CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i16], [1000 x i16]* [[TMP0]], i32 0, i32 [[TMP13]]
-// CHECK13-NEXT: [[TMP14:%.*]] = load i16, i16* [[ARRAYIDX]], align 2
-// CHECK13-NEXT: [[CONV:%.*]] = sext i16 [[TMP14]] to i32
-// CHECK13-NEXT: [[ADD5:%.*]] = add nsw i32 [[CONV]], 1
-// CHECK13-NEXT: [[CONV6:%.*]] = trunc i32 [[ADD5]] to i16
-// CHECK13-NEXT: store i16 [[CONV6]], i16* [[ARRAYIDX]], align 2
-// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK13: omp.body.continue:
-// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK13: omp.inner.for.inc:
-// CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK13-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
-// CHECK13-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
-// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK13: omp.inner.for.end:
-// CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK13: omp.loop.exit:
-// CHECK13-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
-// CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]])
-// CHECK13-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK13: omp.precond.end:
-// CHECK13-NEXT: ret void
-// CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l54
-// CHECK13-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
-// CHECK13-NEXT: entry:
-// CHECK13-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
-// CHECK13-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK13-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
-// CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
-// CHECK13-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK13-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK13-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK13: .execute:
-// CHECK13-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK13-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK13-NEXT: call void @__omp_outlined__4(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x i32]* [[TMP0]]) #[[ATTR3]]
-// CHECK13-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK13: .omp.deinit:
-// CHECK13-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK13-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK13: .exit:
-// CHECK13-NEXT: ret void
-// CHECK13-LABEL: define {{[^@]+}}@__omp_outlined__4
-// CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
-// CHECK13-NEXT: entry:
-// CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK13-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
-// CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [3 x i8*], align 4
-// CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK13-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
-// CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
-// CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK13-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK13-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
-// CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
-// CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK13: cond.true:
-// CHECK13-NEXT: br label [[COND_END:%.*]]
-// CHECK13: cond.false:
-// CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK13-NEXT: br label [[COND_END]]
-// CHECK13: cond.end:
-// CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
-// CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK13: omp.inner.for.cond:
-// CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK13-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP6]], 10
-// CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK13: omp.inner.for.body:
-// CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK13-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK13-NEXT: [[TMP10:%.*]] = inttoptr i32 [[TMP7]] to i8*
-// CHECK13-NEXT: store i8* [[TMP10]], i8** [[TMP9]], align 4
-// CHECK13-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK13-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP8]] to i8*
-// CHECK13-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 4
-// CHECK13-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK13-NEXT: [[TMP14:%.*]] = bitcast [10 x i32]* [[TMP0]] to i8*
-// CHECK13-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 4
-// CHECK13-NEXT: [[TMP15:%.*]] = bitcast [3 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK13-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @__omp_outlined__5 to i8*), i8* null, i8** [[TMP15]], i32 3)
-// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK13: omp.inner.for.inc:
-// CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
-// CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
-// CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK13-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
-// CHECK13-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
-// CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK13-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK13-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP22]], 9
-// CHECK13-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
-// CHECK13: cond.true5:
-// CHECK13-NEXT: br label [[COND_END7:%.*]]
-// CHECK13: cond.false6:
-// CHECK13-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK13-NEXT: br label [[COND_END7]]
-// CHECK13: cond.end7:
-// CHECK13-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP23]], [[COND_FALSE6]] ]
-// CHECK13-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK13-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK13-NEXT: store i32 [[TMP24]], i32* [[DOTOMP_IV]], align 4
-// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK13: omp.inner.for.end:
-// CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK13: omp.loop.exit:
-// CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
-// CHECK13-NEXT: ret void
-// CHECK13-LABEL: define {{[^@]+}}@__omp_outlined__5
-// CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
-// CHECK13-NEXT: entry:
-// CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
-// CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK13-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK13-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK13-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
-// CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
-// CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK13-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
-// CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK13-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
-// CHECK13-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
-// CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK13-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
-// CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK13: omp.inner.for.cond:
-// CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK13-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP6]], [[TMP7]]
-// CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK13: omp.inner.for.body:
-// CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
-// CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4
-// CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
-// CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]]
-// CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
-// CHECK13-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP10]], 1
-// CHECK13-NEXT: store i32 [[ADD1]], i32* [[ARRAYIDX]], align 4
-// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK13: omp.body.continue:
-// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK13: omp.inner.for.inc:
-// CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK13-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
-// CHECK13-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
-// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK13: omp.inner.for.end:
-// CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK13: omp.loop.exit:
-// CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
-// CHECK13-NEXT: ret void
-// CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l59
-// CHECK13-SAME: ([10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
-// CHECK13-NEXT: entry:
-// CHECK13-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK13-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[F_CASTED:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK13-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK13-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
-// CHECK13-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK13-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK13-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK13-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK13: .execute:
-// CHECK13-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[F_ADDR]], align 4
-// CHECK13-NEXT: store i32 [[TMP2]], i32* [[F_CASTED]], align 4
-// CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[F_CASTED]], align 4
-// CHECK13-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK13-NEXT: call void @__omp_outlined__6(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x [10 x i32]]* [[TMP0]], i32 [[TMP3]]) #[[ATTR3]]
-// CHECK13-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK13: .omp.deinit:
-// CHECK13-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK13-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK13: .exit:
-// CHECK13-NEXT: ret void
-// CHECK13-LABEL: define {{[^@]+}}@__omp_outlined__6
-// CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
-// CHECK13-NEXT: entry:
-// CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK13-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK13-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[K:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[J:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[F_CASTED:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 4
-// CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK13-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK13-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
-// CHECK13-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK13-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK13-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
-// CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
-// CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK13: cond.true:
-// CHECK13-NEXT: br label [[COND_END:%.*]]
-// CHECK13: cond.false:
-// CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK13-NEXT: br label [[COND_END]]
-// CHECK13: cond.end:
-// CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
-// CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK13: omp.inner.for.cond:
-// CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK13-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP6]], 100
-// CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK13: omp.inner.for.body:
-// CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[F_ADDR]], align 4
-// CHECK13-NEXT: store i32 [[TMP9]], i32* [[F_CASTED]], align 4
-// CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[F_CASTED]], align 4
-// CHECK13-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK13-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP7]] to i8*
-// CHECK13-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 4
-// CHECK13-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK13-NEXT: [[TMP14:%.*]] = inttoptr i32 [[TMP8]] to i8*
-// CHECK13-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 4
-// CHECK13-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK13-NEXT: [[TMP16:%.*]] = bitcast [10 x [10 x i32]]* [[TMP0]] to i8*
-// CHECK13-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 4
-// CHECK13-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
-// CHECK13-NEXT: [[TMP18:%.*]] = inttoptr i32 [[TMP10]] to i8*
-// CHECK13-NEXT: store i8* [[TMP18]], i8** [[TMP17]], align 4
-// CHECK13-NEXT: [[TMP19:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK13-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, [10 x [10 x i32]]*, i32)* @__omp_outlined__7 to i8*), i8* null, i8** [[TMP19]], i32 4)
-// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK13: omp.inner.for.inc:
-// CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
-// CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
-// CHECK13-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK13-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
-// CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK13-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK13-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK13-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
-// CHECK13-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK13-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK13-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP26]], 99
-// CHECK13-NEXT: br i1 [[CMP5]], label [[COND_TRUE6:%.*]], label [[COND_FALSE7:%.*]]
-// CHECK13: cond.true6:
-// CHECK13-NEXT: br label [[COND_END8:%.*]]
-// CHECK13: cond.false7:
-// CHECK13-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK13-NEXT: br label [[COND_END8]]
-// CHECK13: cond.end8:
-// CHECK13-NEXT: [[COND9:%.*]] = phi i32 [ 99, [[COND_TRUE6]] ], [ [[TMP27]], [[COND_FALSE7]] ]
-// CHECK13-NEXT: store i32 [[COND9]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK13-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK13-NEXT: store i32 [[TMP28]], i32* [[DOTOMP_IV]], align 4
-// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK13: omp.inner.for.end:
-// CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK13: omp.loop.exit:
-// CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
-// CHECK13-NEXT: ret void
-// CHECK13-LABEL: define {{[^@]+}}@__omp_outlined__7
-// CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
-// CHECK13-NEXT: entry:
-// CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK13-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[K:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[J:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK13-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK13-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK13-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK13-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
-// CHECK13-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
-// CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK13-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
-// CHECK13-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
-// CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK13-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
-// CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK13: omp.inner.for.cond:
-// CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK13-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP6]], [[TMP7]]
-// CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK13: omp.inner.for.body:
-// CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP8]], 10
-// CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
-// CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4
-// CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK13-NEXT: [[DIV2:%.*]] = sdiv i32 [[TMP10]], 10
-// CHECK13-NEXT: [[MUL3:%.*]] = mul nsw i32 [[DIV2]], 10
-// CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL3]]
-// CHECK13-NEXT: [[MUL4:%.*]] = mul nsw i32 [[SUB]], 1
-// CHECK13-NEXT: [[ADD5:%.*]] = add nsw i32 0, [[MUL4]]
-// CHECK13-NEXT: store i32 [[ADD5]], i32* [[J]], align 4
-// CHECK13-NEXT: store i32 10, i32* [[K]], align 4
-// CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
-// CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[J]], align 4
-// CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[F_ADDR]], align 4
-// CHECK13-NEXT: [[MUL6:%.*]] = mul nsw i32 [[TMP12]], [[TMP13]]
-// CHECK13-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP11]], [[MUL6]]
-// CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[K]], align 4
-// CHECK13-NEXT: [[ADD8:%.*]] = add nsw i32 [[ADD7]], [[TMP14]]
-// CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4
-// CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [10 x i32]], [10 x [10 x i32]]* [[TMP0]], i32 0, i32 [[TMP15]]
-// CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[J]], align 4
-// CHECK13-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP16]]
-// CHECK13-NEXT: store i32 [[ADD8]], i32* [[ARRAYIDX9]], align 4
-// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK13: omp.body.continue:
-// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK13: omp.inner.for.inc:
-// CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK13-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
-// CHECK13-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
-// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK13: omp.inner.for.end:
-// CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK13: omp.loop.exit:
-// CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
-// CHECK13-NEXT: ret void
-// CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l67
-// CHECK13-SAME: (i32 [[N:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]]) #[[ATTR0]] {
-// CHECK13-NEXT: entry:
-// CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK13-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK13-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK13-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK13-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK13-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK13-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK13-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK13: .execute:
-// CHECK13-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK13-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
-// CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK13-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK13-NEXT: call void @__omp_outlined__8(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP3]], [10 x [10 x i32]]* [[TMP0]]) #[[ATTR3]]
-// CHECK13-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK13: .omp.deinit:
-// CHECK13-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK13-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK13: .exit:
-// CHECK13-NEXT: ret void
-// CHECK13-LABEL: define {{[^@]+}}@__omp_outlined__8
-// CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]]) #[[ATTR0]] {
-// CHECK13-NEXT: entry:
-// CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
-// CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8
-// CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[J:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i64, align 8
-// CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i64, align 8
-// CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
-// CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[I9:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[J10:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 4
-// CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK13-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK13-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK13-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK13-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK13-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
-// CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK13-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64
-// CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK13-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP4]], 0
-// CHECK13-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1
-// CHECK13-NEXT: [[CONV6:%.*]] = sext i32 [[DIV5]] to i64
-// CHECK13-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]]
-// CHECK13-NEXT: [[SUB7:%.*]] = sub nsw i64 [[MUL]], 1
-// CHECK13-NEXT: store i64 [[SUB7]], i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK13-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK13-NEXT: store i32 0, i32* [[J]], align 4
-// CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
-// CHECK13-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK13: land.lhs.true:
-// CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK13-NEXT: [[CMP8:%.*]] = icmp slt i32 0, [[TMP6]]
-// CHECK13-NEXT: br i1 [[CMP8]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
-// CHECK13: omp.precond.then:
-// CHECK13-NEXT: store i64 0, i64* [[DOTOMP_COMB_LB]], align 8
-// CHECK13-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK13-NEXT: store i64 [[TMP7]], i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK13-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8
-// CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK13-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK13-NEXT: [[CONV11:%.*]] = zext i32 [[NVPTX_NUM_THREADS]] to i64
-// CHECK13-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
-// CHECK13-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_COMB_LB]], i64* [[DOTOMP_COMB_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 [[CONV11]])
-// CHECK13-NEXT: [[TMP10:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK13-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK13-NEXT: [[CMP12:%.*]] = icmp sgt i64 [[TMP10]], [[TMP11]]
-// CHECK13-NEXT: br i1 [[CMP12]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK13: cond.true:
-// CHECK13-NEXT: [[TMP12:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK13-NEXT: br label [[COND_END:%.*]]
-// CHECK13: cond.false:
-// CHECK13-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK13-NEXT: br label [[COND_END]]
-// CHECK13: cond.end:
-// CHECK13-NEXT: [[COND:%.*]] = phi i64 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
-// CHECK13-NEXT: store i64 [[COND]], i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK13-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
-// CHECK13-NEXT: store i64 [[TMP14]], i64* [[DOTOMP_IV]], align 8
-// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK13: omp.inner.for.cond:
-// CHECK13-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK13-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK13-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP16]], 1
-// CHECK13-NEXT: [[CMP13:%.*]] = icmp slt i64 [[TMP15]], [[ADD]]
-// CHECK13-NEXT: br i1 [[CMP13]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK13: omp.inner.for.body:
-// CHECK13-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
-// CHECK13-NEXT: [[TMP18:%.*]] = trunc i64 [[TMP17]] to i32
-// CHECK13-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK13-NEXT: [[TMP20:%.*]] = trunc i64 [[TMP19]] to i32
-// CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK13-NEXT: store i32 [[TMP21]], i32* [[N_CASTED]], align 4
-// CHECK13-NEXT: [[TMP22:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK13-NEXT: [[TMP23:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK13-NEXT: [[TMP24:%.*]] = inttoptr i32 [[TMP18]] to i8*
-// CHECK13-NEXT: store i8* [[TMP24]], i8** [[TMP23]], align 4
-// CHECK13-NEXT: [[TMP25:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK13-NEXT: [[TMP26:%.*]] = inttoptr i32 [[TMP20]] to i8*
-// CHECK13-NEXT: store i8* [[TMP26]], i8** [[TMP25]], align 4
-// CHECK13-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK13-NEXT: [[TMP28:%.*]] = inttoptr i32 [[TMP22]] to i8*
-// CHECK13-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 4
-// CHECK13-NEXT: [[TMP29:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
-// CHECK13-NEXT: [[TMP30:%.*]] = bitcast [10 x [10 x i32]]* [[TMP0]] to i8*
-// CHECK13-NEXT: store i8* [[TMP30]], i8** [[TMP29]], align 4
-// CHECK13-NEXT: [[TMP31:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK13-NEXT: [[TMP32:%.*]] = load i32, i32* [[TMP31]], align 4
-// CHECK13-NEXT: [[TMP33:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK13-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP32]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [10 x [10 x i32]]*)* @__omp_outlined__9 to i8*), i8* null, i8** [[TMP33]], i32 4)
-// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK13: omp.inner.for.inc:
-// CHECK13-NEXT: [[TMP34:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK13-NEXT: [[TMP35:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8
-// CHECK13-NEXT: [[ADD14:%.*]] = add nsw i64 [[TMP34]], [[TMP35]]
-// CHECK13-NEXT: store i64 [[ADD14]], i64* [[DOTOMP_IV]], align 8
-// CHECK13-NEXT: [[TMP36:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
-// CHECK13-NEXT: [[TMP37:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8
-// CHECK13-NEXT: [[ADD15:%.*]] = add nsw i64 [[TMP36]], [[TMP37]]
-// CHECK13-NEXT: store i64 [[ADD15]], i64* [[DOTOMP_COMB_LB]], align 8
-// CHECK13-NEXT: [[TMP38:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK13-NEXT: [[TMP39:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8
-// CHECK13-NEXT: [[ADD16:%.*]] = add nsw i64 [[TMP38]], [[TMP39]]
-// CHECK13-NEXT: store i64 [[ADD16]], i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK13-NEXT: [[TMP40:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK13-NEXT: [[TMP41:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK13-NEXT: [[CMP17:%.*]] = icmp sgt i64 [[TMP40]], [[TMP41]]
-// CHECK13-NEXT: br i1 [[CMP17]], label [[COND_TRUE18:%.*]], label [[COND_FALSE19:%.*]]
-// CHECK13: cond.true18:
-// CHECK13-NEXT: [[TMP42:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK13-NEXT: br label [[COND_END20:%.*]]
-// CHECK13: cond.false19:
-// CHECK13-NEXT: [[TMP43:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK13-NEXT: br label [[COND_END20]]
-// CHECK13: cond.end20:
-// CHECK13-NEXT: [[COND21:%.*]] = phi i64 [ [[TMP42]], [[COND_TRUE18]] ], [ [[TMP43]], [[COND_FALSE19]] ]
-// CHECK13-NEXT: store i64 [[COND21]], i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK13-NEXT: [[TMP44:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
-// CHECK13-NEXT: store i64 [[TMP44]], i64* [[DOTOMP_IV]], align 8
-// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK13: omp.inner.for.end:
-// CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK13: omp.loop.exit:
-// CHECK13-NEXT: [[TMP45:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK13-NEXT: [[TMP46:%.*]] = load i32, i32* [[TMP45]], align 4
-// CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP46]])
-// CHECK13-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK13: omp.precond.end:
-// CHECK13-NEXT: ret void
-// CHECK13-LABEL: define {{[^@]+}}@__omp_outlined__9
-// CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]]) #[[ATTR0]] {
-// CHECK13-NEXT: entry:
-// CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
-// CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8
-// CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[J:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8
-// CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8
-// CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
-// CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[I11:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[J12:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK13-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK13-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK13-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK13-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK13-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK13-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK13-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
-// CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK13-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64
-// CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK13-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP4]], 0
-// CHECK13-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1
-// CHECK13-NEXT: [[CONV6:%.*]] = sext i32 [[DIV5]] to i64
-// CHECK13-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]]
-// CHECK13-NEXT: [[SUB7:%.*]] = sub nsw i64 [[MUL]], 1
-// CHECK13-NEXT: store i64 [[SUB7]], i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK13-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK13-NEXT: store i32 0, i32* [[J]], align 4
-// CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
-// CHECK13-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK13: land.lhs.true:
-// CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK13-NEXT: [[CMP8:%.*]] = icmp slt i32 0, [[TMP6]]
-// CHECK13-NEXT: br i1 [[CMP8]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
-// CHECK13: omp.precond.then:
-// CHECK13-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8
-// CHECK13-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK13-NEXT: store i64 [[TMP7]], i64* [[DOTOMP_UB]], align 8
-// CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK13-NEXT: [[CONV9:%.*]] = zext i32 [[TMP8]] to i64
-// CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK13-NEXT: [[CONV10:%.*]] = zext i32 [[TMP9]] to i64
-// CHECK13-NEXT: store i64 [[CONV9]], i64* [[DOTOMP_LB]], align 8
-// CHECK13-NEXT: store i64 [[CONV10]], i64* [[DOTOMP_UB]], align 8
-// CHECK13-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8
-// CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK13-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
-// CHECK13-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 33, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_LB]], i64* [[DOTOMP_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1)
-// CHECK13-NEXT: [[TMP12:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8
-// CHECK13-NEXT: store i64 [[TMP12]], i64* [[DOTOMP_IV]], align 8
-// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK13: omp.inner.for.cond:
-// CHECK13-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK13-NEXT: [[CONV13:%.*]] = zext i32 [[TMP14]] to i64
-// CHECK13-NEXT: [[CMP14:%.*]] = icmp sle i64 [[TMP13]], [[CONV13]]
-// CHECK13-NEXT: br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK13: omp.inner.for.body:
-// CHECK13-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK13-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP16]], 0
-// CHECK13-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1
-// CHECK13-NEXT: [[MUL17:%.*]] = mul nsw i32 1, [[DIV16]]
-// CHECK13-NEXT: [[CONV18:%.*]] = sext i32 [[MUL17]] to i64
-// CHECK13-NEXT: [[DIV19:%.*]] = sdiv i64 [[TMP15]], [[CONV18]]
-// CHECK13-NEXT: [[MUL20:%.*]] = mul nsw i64 [[DIV19]], 1
-// CHECK13-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL20]]
-// CHECK13-NEXT: [[CONV21:%.*]] = trunc i64 [[ADD]] to i32
-// CHECK13-NEXT: store i32 [[CONV21]], i32* [[I11]], align 4
-// CHECK13-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK13-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK13-NEXT: [[SUB22:%.*]] = sub nsw i32 [[TMP19]], 0
-// CHECK13-NEXT: [[DIV23:%.*]] = sdiv i32 [[SUB22]], 1
-// CHECK13-NEXT: [[MUL24:%.*]] = mul nsw i32 1, [[DIV23]]
-// CHECK13-NEXT: [[CONV25:%.*]] = sext i32 [[MUL24]] to i64
-// CHECK13-NEXT: [[DIV26:%.*]] = sdiv i64 [[TMP18]], [[CONV25]]
-// CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK13-NEXT: [[SUB27:%.*]] = sub nsw i32 [[TMP20]], 0
-// CHECK13-NEXT: [[DIV28:%.*]] = sdiv i32 [[SUB27]], 1
-// CHECK13-NEXT: [[MUL29:%.*]] = mul nsw i32 1, [[DIV28]]
-// CHECK13-NEXT: [[CONV30:%.*]] = sext i32 [[MUL29]] to i64
-// CHECK13-NEXT: [[MUL31:%.*]] = mul nsw i64 [[DIV26]], [[CONV30]]
-// CHECK13-NEXT: [[SUB32:%.*]] = sub nsw i64 [[TMP17]], [[MUL31]]
-// CHECK13-NEXT: [[MUL33:%.*]] = mul nsw i64 [[SUB32]], 1
-// CHECK13-NEXT: [[ADD34:%.*]] = add nsw i64 0, [[MUL33]]
-// CHECK13-NEXT: [[CONV35:%.*]] = trunc i64 [[ADD34]] to i32
-// CHECK13-NEXT: store i32 [[CONV35]], i32* [[J12]], align 4
-// CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[I11]], align 4
-// CHECK13-NEXT: [[TMP22:%.*]] = load i32, i32* [[J12]], align 4
-// CHECK13-NEXT: [[ADD36:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
-// CHECK13-NEXT: [[TMP23:%.*]] = load i32, i32* [[I11]], align 4
-// CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [10 x i32]], [10 x [10 x i32]]* [[TMP0]], i32 0, i32 [[TMP23]]
-// CHECK13-NEXT: [[TMP24:%.*]] = load i32, i32* [[J12]], align 4
-// CHECK13-NEXT: [[ARRAYIDX37:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP24]]
-// CHECK13-NEXT: store i32 [[ADD36]], i32* [[ARRAYIDX37]], align 4
-// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK13: omp.body.continue:
-// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK13: omp.inner.for.inc:
-// CHECK13-NEXT: [[TMP25:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK13-NEXT: [[TMP26:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8
-// CHECK13-NEXT: [[ADD38:%.*]] = add nsw i64 [[TMP25]], [[TMP26]]
-// CHECK13-NEXT: store i64 [[ADD38]], i64* [[DOTOMP_IV]], align 8
-// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK13: omp.inner.for.end:
-// CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK13: omp.loop.exit:
-// CHECK13-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK13-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4
-// CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP28]])
-// CHECK13-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK13: omp.precond.end:
-// CHECK13-NEXT: ret void
-// CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l74
-// CHECK13-SAME: (i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* [[V:%.*]]) #[[ATTR0]] {
-// CHECK13-NEXT: entry:
-// CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK13-NEXT: [[V_ADDR:%.*]] = alloca i32*, align 4
-// CHECK13-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK13-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK13-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK13-NEXT: store i32* [[V]], i32** [[V_ADDR]], align 4
-// CHECK13-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK13-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK13-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK13-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK13: .execute:
-// CHECK13-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK13-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
-// CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK13-NEXT: [[TMP4:%.*]] = load i32*, i32** [[V_ADDR]], align 4
-// CHECK13-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK13-NEXT: call void @__omp_outlined__10(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP3]], [1000 x i32]* [[TMP0]], i32* [[TMP4]]) #[[ATTR3]]
-// CHECK13-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK13: .omp.deinit:
-// CHECK13-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK13-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK13: .exit:
-// CHECK13-NEXT: ret void
-// CHECK13-LABEL: define {{[^@]+}}@__omp_outlined__10
-// CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* [[V:%.*]]) #[[ATTR0]] {
-// CHECK13-NEXT: entry:
-// CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK13-NEXT: [[V_ADDR:%.*]] = alloca i32*, align 4
-// CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [5 x i8*], align 4
-// CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK13-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK13-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK13-NEXT: store i32* [[V]], i32** [[V_ADDR]], align 4
-// CHECK13-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK13-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK13-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK13: omp.precond.then:
-// CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK13-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK13-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK13-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
-// CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK13-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
-// CHECK13-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK13: cond.true:
-// CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK13-NEXT: br label [[COND_END:%.*]]
-// CHECK13: cond.false:
-// CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK13-NEXT: br label [[COND_END]]
-// CHECK13: cond.end:
-// CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
-// CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK13-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
-// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK13: omp.inner.for.cond:
-// CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1
-// CHECK13-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]
-// CHECK13-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK13: omp.inner.for.body:
-// CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK13-NEXT: store i32 [[TMP16]], i32* [[N_CASTED]], align 4
-// CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK13-NEXT: [[TMP18:%.*]] = load i32*, i32** [[V_ADDR]], align 4
-// CHECK13-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK13-NEXT: [[TMP20:%.*]] = inttoptr i32 [[TMP14]] to i8*
-// CHECK13-NEXT: store i8* [[TMP20]], i8** [[TMP19]], align 4
-// CHECK13-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK13-NEXT: [[TMP22:%.*]] = inttoptr i32 [[TMP15]] to i8*
-// CHECK13-NEXT: store i8* [[TMP22]], i8** [[TMP21]], align 4
-// CHECK13-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK13-NEXT: [[TMP24:%.*]] = inttoptr i32 [[TMP17]] to i8*
-// CHECK13-NEXT: store i8* [[TMP24]], i8** [[TMP23]], align 4
-// CHECK13-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
-// CHECK13-NEXT: [[TMP26:%.*]] = bitcast [1000 x i32]* [[TMP0]] to i8*
-// CHECK13-NEXT: store i8* [[TMP26]], i8** [[TMP25]], align 4
-// CHECK13-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 4
-// CHECK13-NEXT: [[TMP28:%.*]] = bitcast i32* [[TMP18]] to i8*
-// CHECK13-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 4
-// CHECK13-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK13-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4
-// CHECK13-NEXT: [[TMP31:%.*]] = bitcast [5 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK13-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP30]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i32]*, i32*)* @__omp_outlined__11 to i8*), i8* null, i8** [[TMP31]], i32 5)
-// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK13: omp.inner.for.inc:
-// CHECK13-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK13-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK13-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP32]], [[TMP33]]
-// CHECK13-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
-// CHECK13-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK13-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK13-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP34]], [[TMP35]]
-// CHECK13-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK13-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK13-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK13-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP36]], [[TMP37]]
-// CHECK13-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK13-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK13-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK13-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP38]], [[TMP39]]
-// CHECK13-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]]
-// CHECK13: cond.true10:
-// CHECK13-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK13-NEXT: br label [[COND_END12:%.*]]
-// CHECK13: cond.false11:
-// CHECK13-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK13-NEXT: br label [[COND_END12]]
-// CHECK13: cond.end12:
-// CHECK13-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP40]], [[COND_TRUE10]] ], [ [[TMP41]], [[COND_FALSE11]] ]
-// CHECK13-NEXT: store i32 [[COND13]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK13-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK13-NEXT: store i32 [[TMP42]], i32* [[DOTOMP_IV]], align 4
-// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK13: omp.inner.for.end:
-// CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK13: omp.loop.exit:
-// CHECK13-NEXT: [[TMP43:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK13-NEXT: [[TMP44:%.*]] = load i32, i32* [[TMP43]], align 4
-// CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP44]])
-// CHECK13-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK13: omp.precond.end:
-// CHECK13-NEXT: ret void
-// CHECK13-LABEL: define {{[^@]+}}@__omp_outlined__11
-// CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* [[V:%.*]]) #[[ATTR0]] {
-// CHECK13-NEXT: entry:
-// CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK13-NEXT: [[V_ADDR:%.*]] = alloca i32*, align 4
-// CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK13-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK13-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK13-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK13-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK13-NEXT: store i32* [[V]], i32** [[V_ADDR]], align 4
-// CHECK13-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK13-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK13-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK13: omp.precond.then:
-// CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK13-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
-// CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
-// CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
-// CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK13-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK13-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
-// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK13: omp.inner.for.cond:
-// CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK13-NEXT: [[CMP4:%.*]] = icmp ule i32 [[TMP10]], [[TMP11]]
-// CHECK13-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK13: omp.inner.for.body:
-// CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
-// CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK13-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
-// CHECK13-NEXT: [[TMP13:%.*]] = load i32*, i32** [[V_ADDR]], align 4
-// CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[I3]], align 4
-// CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP13]], i32 [[TMP14]]
-// CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
-// CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4
-// CHECK13-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 [[TMP16]]
-// CHECK13-NEXT: store i32 [[TMP15]], i32* [[ARRAYIDX5]], align 4
-// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK13: omp.body.continue:
-// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK13: omp.inner.for.inc:
-// CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK13-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
-// CHECK13-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
-// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK13: omp.inner.for.end:
-// CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK13: omp.loop.exit:
-// CHECK13-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4
-// CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]])
-// CHECK13-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK13: omp.precond.end:
-// CHECK13-NEXT: ret void
-// CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l43
-// CHECK14-SAME: (i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0:[0-9]+]] {
-// CHECK14-NEXT: entry:
-// CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK14-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[L_CASTED:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK14-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK14-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK14-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
-// CHECK14-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK14-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK14-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK14-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK14: .execute:
-// CHECK14-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]])
-// CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK14-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
-// CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[L_ADDR]], align 4
-// CHECK14-NEXT: store i32 [[TMP4]], i32* [[L_CASTED]], align 4
-// CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[L_CASTED]], align 4
-// CHECK14-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK14-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP3]], [1000 x i32]* [[TMP0]], i32 [[TMP5]]) #[[ATTR3:[0-9]+]]
-// CHECK14-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK14: .omp.deinit:
-// CHECK14-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK14-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK14: .exit:
-// CHECK14-NEXT: ret void
-// CHECK14-LABEL: define {{[^@]+}}@__omp_outlined__
-// CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0]] {
-// CHECK14-NEXT: entry:
-// CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK14-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[I4:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[L_CASTED:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [5 x i8*], align 4
-// CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK14-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK14-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK14-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
-// CHECK14-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK14-NEXT: [[TMP1:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared", align 2
-// CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* @"_openmp_static_kernel$size", align 4
-// CHECK14-NEXT: call void @__kmpc_get_team_static_memory(i16 1, i8* addrspacecast (i8 addrspace(3)* getelementptr inbounds (%"union._shared_openmp_static_memory_type_$_", %"union._shared_openmp_static_memory_type_$_" addrspace(3)* @"_openmp_shared_static_glob_rd_$_", i32 0, i32 0, i32 0) to i8*), i32 [[TMP2]], i16 [[TMP1]], i8** addrspacecast (i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr" to i8**))
-// CHECK14-NEXT: [[TMP3:%.*]] = load i8*, i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr", align 4
-// CHECK14-NEXT: [[TMP4:%.*]] = getelementptr inbounds i8, i8* [[TMP3]], i32 0
-// CHECK14-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to %struct._globalized_locals_ty*
-// CHECK14-NEXT: [[L1:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY:%.*]], %struct._globalized_locals_ty* [[TMP5]], i32 0, i32 0
-// CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK14-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0
-// CHECK14-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK14-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK14-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK14-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]]
-// CHECK14-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK14: omp.precond.then:
-// CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK14-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK14-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
-// CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 128)
-// CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK14-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]]
-// CHECK14-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK14: cond.true:
-// CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK14-NEXT: br label [[COND_END:%.*]]
-// CHECK14: cond.false:
-// CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK14-NEXT: br label [[COND_END]]
-// CHECK14: cond.end:
-// CHECK14-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ]
-// CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK14-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK14-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
-// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK14: omp.inner.for.cond:
-// CHECK14-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK14-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], 1
-// CHECK14-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP17]], [[ADD]]
-// CHECK14-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK14: omp.inner.for.body:
-// CHECK14-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK14-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK14-NEXT: [[TMP21:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK14-NEXT: store i32 [[TMP21]], i32* [[N_CASTED]], align 4
-// CHECK14-NEXT: [[TMP22:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK14-NEXT: [[TMP23:%.*]] = load i32, i32* [[L_ADDR]], align 4
-// CHECK14-NEXT: store i32 [[TMP23]], i32* [[L_CASTED]], align 4
-// CHECK14-NEXT: [[TMP24:%.*]] = load i32, i32* [[L_CASTED]], align 4
-// CHECK14-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK14-NEXT: [[TMP26:%.*]] = inttoptr i32 [[TMP19]] to i8*
-// CHECK14-NEXT: store i8* [[TMP26]], i8** [[TMP25]], align 4
-// CHECK14-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK14-NEXT: [[TMP28:%.*]] = inttoptr i32 [[TMP20]] to i8*
-// CHECK14-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 4
-// CHECK14-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK14-NEXT: [[TMP30:%.*]] = inttoptr i32 [[TMP22]] to i8*
-// CHECK14-NEXT: store i8* [[TMP30]], i8** [[TMP29]], align 4
-// CHECK14-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
-// CHECK14-NEXT: [[TMP32:%.*]] = bitcast [1000 x i32]* [[TMP0]] to i8*
-// CHECK14-NEXT: store i8* [[TMP32]], i8** [[TMP31]], align 4
-// CHECK14-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 4
-// CHECK14-NEXT: [[TMP34:%.*]] = inttoptr i32 [[TMP24]] to i8*
-// CHECK14-NEXT: store i8* [[TMP34]], i8** [[TMP33]], align 4
-// CHECK14-NEXT: [[TMP35:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK14-NEXT: [[TMP36:%.*]] = load i32, i32* [[TMP35]], align 4
-// CHECK14-NEXT: [[TMP37:%.*]] = bitcast [5 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK14-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP36]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i32]*, i32)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP37]], i32 5)
-// CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK14: omp.inner.for.inc:
-// CHECK14-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK14-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK14-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP38]], [[TMP39]]
-// CHECK14-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
-// CHECK14-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK14-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK14-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP40]], [[TMP41]]
-// CHECK14-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK14-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK14-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK14-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP42]], [[TMP43]]
-// CHECK14-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK14-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK14-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK14-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP44]], [[TMP45]]
-// CHECK14-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
-// CHECK14: cond.true11:
-// CHECK14-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK14-NEXT: br label [[COND_END13:%.*]]
-// CHECK14: cond.false12:
-// CHECK14-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK14-NEXT: br label [[COND_END13]]
-// CHECK14: cond.end13:
-// CHECK14-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP46]], [[COND_TRUE11]] ], [ [[TMP47]], [[COND_FALSE12]] ]
-// CHECK14-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK14-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK14-NEXT: store i32 [[TMP48]], i32* [[DOTOMP_IV]], align 4
-// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK14: omp.inner.for.end:
-// CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK14: omp.loop.exit:
-// CHECK14-NEXT: [[TMP49:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK14-NEXT: [[TMP50:%.*]] = load i32, i32* [[TMP49]], align 4
-// CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP50]])
-// CHECK14-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK14-NEXT: [[TMP52:%.*]] = icmp ne i32 [[TMP51]], 0
-// CHECK14-NEXT: br i1 [[TMP52]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
-// CHECK14: .omp.lastprivate.then:
-// CHECK14-NEXT: [[TMP53:%.*]] = load i32, i32* [[L_ADDR]], align 4
-// CHECK14-NEXT: store i32 [[TMP53]], i32* [[L_ADDR]], align 4
-// CHECK14-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
-// CHECK14: .omp.lastprivate.done:
-// CHECK14-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK14: omp.precond.end:
-// CHECK14-NEXT: [[TMP54:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared", align 2
-// CHECK14-NEXT: call void @__kmpc_restore_team_static_memory(i16 1, i16 [[TMP54]])
-// CHECK14-NEXT: ret void
-// CHECK14-LABEL: define {{[^@]+}}@__omp_outlined__1
-// CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0]] {
-// CHECK14-NEXT: entry:
-// CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK14-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK14-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK14-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK14-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK14-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK14-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
-// CHECK14-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK14-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK14-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK14-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK14-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK14-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK14-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK14-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK14-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK14: omp.precond.then:
-// CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK14-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
-// CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK14-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
-// CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
-// CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK14-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 32)
-// CHECK14-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
-// CHECK14: omp.dispatch.cond:
-// CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK14-NEXT: [[CMP4:%.*]] = icmp ugt i32 [[TMP9]], [[TMP10]]
-// CHECK14-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK14: cond.true:
-// CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK14-NEXT: br label [[COND_END:%.*]]
-// CHECK14: cond.false:
-// CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK14-NEXT: br label [[COND_END]]
-// CHECK14: cond.end:
-// CHECK14-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
-// CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
-// CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK14-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
-// CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK14-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
-// CHECK14-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
-// CHECK14: omp.dispatch.body:
-// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK14: omp.inner.for.cond:
-// CHECK14-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK14-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK14-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
-// CHECK14-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK14: omp.inner.for.body:
-// CHECK14-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
-// CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK14-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
-// CHECK14-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4
-// CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 [[TMP19]]
-// CHECK14-NEXT: store i32 1, i32* [[ARRAYIDX]], align 4
-// CHECK14-NEXT: [[TMP20:%.*]] = load i32, i32* [[I3]], align 4
-// CHECK14-NEXT: store i32 [[TMP20]], i32* [[L_ADDR]], align 4
-// CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK14: omp.body.continue:
-// CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK14: omp.inner.for.inc:
-// CHECK14-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK14-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP21]], 1
-// CHECK14-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
-// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK14: omp.inner.for.end:
-// CHECK14-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
-// CHECK14: omp.dispatch.inc:
-// CHECK14-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK14-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK14-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
-// CHECK14-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4
-// CHECK14-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK14-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK14-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
-// CHECK14-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4
-// CHECK14-NEXT: br label [[OMP_DISPATCH_COND]]
-// CHECK14: omp.dispatch.end:
-// CHECK14-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK14-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
-// CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP27]])
-// CHECK14-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK14-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
-// CHECK14-NEXT: br i1 [[TMP29]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
-// CHECK14: .omp.lastprivate.then:
-// CHECK14-NEXT: [[TMP30:%.*]] = load i32, i32* [[L_ADDR]], align 4
-// CHECK14-NEXT: store i32 [[TMP30]], i32* [[L_ADDR]], align 4
-// CHECK14-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
-// CHECK14: .omp.lastprivate.done:
-// CHECK14-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK14: omp.precond.end:
-// CHECK14-NEXT: ret void
-// CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l49
-// CHECK14-SAME: (i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
-// CHECK14-NEXT: entry:
-// CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
-// CHECK14-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK14-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK14-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK14-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK14-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK14-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK14-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK14: .execute:
-// CHECK14-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK14-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
-// CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK14-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK14-NEXT: call void @__omp_outlined__2(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP3]], [1000 x i16]* [[TMP0]]) #[[ATTR3]]
-// CHECK14-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK14: .omp.deinit:
-// CHECK14-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK14-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK14: .exit:
-// CHECK14-NEXT: ret void
-// CHECK14-LABEL: define {{[^@]+}}@__omp_outlined__2
-// CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
-// CHECK14-NEXT: entry:
-// CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
-// CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 4
-// CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK14-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK14-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK14-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK14-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK14-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK14-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK14-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK14-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK14-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK14-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK14-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK14: omp.precond.then:
-// CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK14-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK14-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK14-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
-// CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK14-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
-// CHECK14-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK14: cond.true:
-// CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK14-NEXT: br label [[COND_END:%.*]]
-// CHECK14: cond.false:
-// CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK14-NEXT: br label [[COND_END]]
-// CHECK14: cond.end:
-// CHECK14-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
-// CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK14-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
-// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK14: omp.inner.for.cond:
-// CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1
-// CHECK14-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]
-// CHECK14-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK14: omp.inner.for.body:
-// CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK14-NEXT: [[TMP16:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK14-NEXT: store i32 [[TMP16]], i32* [[N_CASTED]], align 4
-// CHECK14-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK14-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK14-NEXT: [[TMP19:%.*]] = inttoptr i32 [[TMP14]] to i8*
-// CHECK14-NEXT: store i8* [[TMP19]], i8** [[TMP18]], align 4
-// CHECK14-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK14-NEXT: [[TMP21:%.*]] = inttoptr i32 [[TMP15]] to i8*
-// CHECK14-NEXT: store i8* [[TMP21]], i8** [[TMP20]], align 4
-// CHECK14-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK14-NEXT: [[TMP23:%.*]] = inttoptr i32 [[TMP17]] to i8*
-// CHECK14-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 4
-// CHECK14-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
-// CHECK14-NEXT: [[TMP25:%.*]] = bitcast [1000 x i16]* [[TMP0]] to i8*
-// CHECK14-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 4
-// CHECK14-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK14-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
-// CHECK14-NEXT: [[TMP28:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK14-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP27]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i16]*)* @__omp_outlined__3 to i8*), i8* null, i8** [[TMP28]], i32 4)
-// CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK14: omp.inner.for.inc:
-// CHECK14-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK14-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK14-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP29]], [[TMP30]]
-// CHECK14-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
-// CHECK14-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK14-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK14-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP31]], [[TMP32]]
-// CHECK14-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK14-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK14-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK14-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP33]], [[TMP34]]
-// CHECK14-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK14-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK14-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK14-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP35]], [[TMP36]]
-// CHECK14-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]]
-// CHECK14: cond.true10:
-// CHECK14-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK14-NEXT: br label [[COND_END12:%.*]]
-// CHECK14: cond.false11:
-// CHECK14-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK14-NEXT: br label [[COND_END12]]
-// CHECK14: cond.end12:
-// CHECK14-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP37]], [[COND_TRUE10]] ], [ [[TMP38]], [[COND_FALSE11]] ]
-// CHECK14-NEXT: store i32 [[COND13]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK14-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK14-NEXT: store i32 [[TMP39]], i32* [[DOTOMP_IV]], align 4
-// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK14: omp.inner.for.end:
-// CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK14: omp.loop.exit:
-// CHECK14-NEXT: [[TMP40:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK14-NEXT: [[TMP41:%.*]] = load i32, i32* [[TMP40]], align 4
-// CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP41]])
-// CHECK14-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK14: omp.precond.end:
-// CHECK14-NEXT: ret void
-// CHECK14-LABEL: define {{[^@]+}}@__omp_outlined__3
-// CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
-// CHECK14-NEXT: entry:
-// CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
-// CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK14-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK14-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK14-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK14-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK14-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK14-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK14-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK14-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK14-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK14-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK14-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK14-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK14-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK14: omp.precond.then:
-// CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK14-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
-// CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK14-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
-// CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
-// CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK14-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK14-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
-// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK14: omp.inner.for.cond:
-// CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK14-NEXT: [[CMP4:%.*]] = icmp ule i32 [[TMP10]], [[TMP11]]
-// CHECK14-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK14: omp.inner.for.body:
-// CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
-// CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK14-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
-// CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[I3]], align 4
-// CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i16], [1000 x i16]* [[TMP0]], i32 0, i32 [[TMP13]]
-// CHECK14-NEXT: [[TMP14:%.*]] = load i16, i16* [[ARRAYIDX]], align 2
-// CHECK14-NEXT: [[CONV:%.*]] = sext i16 [[TMP14]] to i32
-// CHECK14-NEXT: [[ADD5:%.*]] = add nsw i32 [[CONV]], 1
-// CHECK14-NEXT: [[CONV6:%.*]] = trunc i32 [[ADD5]] to i16
-// CHECK14-NEXT: store i16 [[CONV6]], i16* [[ARRAYIDX]], align 2
-// CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK14: omp.body.continue:
-// CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK14: omp.inner.for.inc:
-// CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK14-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK14-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
-// CHECK14-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
-// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK14: omp.inner.for.end:
-// CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK14: omp.loop.exit:
-// CHECK14-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK14-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
-// CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]])
-// CHECK14-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK14: omp.precond.end:
-// CHECK14-NEXT: ret void
-// CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l54
-// CHECK14-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
-// CHECK14-NEXT: entry:
-// CHECK14-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
-// CHECK14-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK14-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
-// CHECK14-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
-// CHECK14-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK14-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK14-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK14: .execute:
-// CHECK14-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK14-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK14-NEXT: call void @__omp_outlined__4(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x i32]* [[TMP0]]) #[[ATTR3]]
-// CHECK14-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK14: .omp.deinit:
-// CHECK14-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK14-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK14: .exit:
-// CHECK14-NEXT: ret void
-// CHECK14-LABEL: define {{[^@]+}}@__omp_outlined__4
-// CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
-// CHECK14-NEXT: entry:
-// CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK14-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
-// CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [3 x i8*], align 4
-// CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK14-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
-// CHECK14-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
-// CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK14-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK14-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK14-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
-// CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
-// CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK14: cond.true:
-// CHECK14-NEXT: br label [[COND_END:%.*]]
-// CHECK14: cond.false:
-// CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK14-NEXT: br label [[COND_END]]
-// CHECK14: cond.end:
-// CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
-// CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK14-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK14: omp.inner.for.cond:
-// CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK14-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP6]], 10
-// CHECK14-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK14: omp.inner.for.body:
-// CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK14-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK14-NEXT: [[TMP10:%.*]] = inttoptr i32 [[TMP7]] to i8*
-// CHECK14-NEXT: store i8* [[TMP10]], i8** [[TMP9]], align 4
-// CHECK14-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK14-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP8]] to i8*
-// CHECK14-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 4
-// CHECK14-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK14-NEXT: [[TMP14:%.*]] = bitcast [10 x i32]* [[TMP0]] to i8*
-// CHECK14-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 4
-// CHECK14-NEXT: [[TMP15:%.*]] = bitcast [3 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK14-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @__omp_outlined__5 to i8*), i8* null, i8** [[TMP15]], i32 3)
-// CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK14: omp.inner.for.inc:
-// CHECK14-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK14-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
-// CHECK14-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
-// CHECK14-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK14-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK14-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
-// CHECK14-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK14-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK14-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK14-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
-// CHECK14-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK14-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK14-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP22]], 9
-// CHECK14-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
-// CHECK14: cond.true5:
-// CHECK14-NEXT: br label [[COND_END7:%.*]]
-// CHECK14: cond.false6:
-// CHECK14-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK14-NEXT: br label [[COND_END7]]
-// CHECK14: cond.end7:
-// CHECK14-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP23]], [[COND_FALSE6]] ]
-// CHECK14-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK14-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK14-NEXT: store i32 [[TMP24]], i32* [[DOTOMP_IV]], align 4
-// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK14: omp.inner.for.end:
-// CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK14: omp.loop.exit:
-// CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
-// CHECK14-NEXT: ret void
-// CHECK14-LABEL: define {{[^@]+}}@__omp_outlined__5
-// CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
-// CHECK14-NEXT: entry:
-// CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
-// CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK14-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK14-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK14-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
-// CHECK14-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
-// CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK14-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
-// CHECK14-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK14-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
-// CHECK14-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
-// CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK14-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
-// CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK14-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK14: omp.inner.for.cond:
-// CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK14-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP6]], [[TMP7]]
-// CHECK14-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK14: omp.inner.for.body:
-// CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
-// CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4
-// CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
-// CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]]
-// CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
-// CHECK14-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP10]], 1
-// CHECK14-NEXT: store i32 [[ADD1]], i32* [[ARRAYIDX]], align 4
-// CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK14: omp.body.continue:
-// CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK14: omp.inner.for.inc:
-// CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK14-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
-// CHECK14-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
-// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK14: omp.inner.for.end:
-// CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK14: omp.loop.exit:
-// CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
-// CHECK14-NEXT: ret void
-// CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l59
-// CHECK14-SAME: ([10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
-// CHECK14-NEXT: entry:
-// CHECK14-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK14-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[F_CASTED:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK14-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK14-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
-// CHECK14-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK14-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK14-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK14-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK14: .execute:
-// CHECK14-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[F_ADDR]], align 4
-// CHECK14-NEXT: store i32 [[TMP2]], i32* [[F_CASTED]], align 4
-// CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[F_CASTED]], align 4
-// CHECK14-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK14-NEXT: call void @__omp_outlined__6(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x [10 x i32]]* [[TMP0]], i32 [[TMP3]]) #[[ATTR3]]
-// CHECK14-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK14: .omp.deinit:
-// CHECK14-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK14-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK14: .exit:
-// CHECK14-NEXT: ret void
-// CHECK14-LABEL: define {{[^@]+}}@__omp_outlined__6
-// CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
-// CHECK14-NEXT: entry:
-// CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK14-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK14-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[K:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[J:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[F_CASTED:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 4
-// CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK14-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK14-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
-// CHECK14-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK14-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK14-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK14-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
-// CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
-// CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK14: cond.true:
-// CHECK14-NEXT: br label [[COND_END:%.*]]
-// CHECK14: cond.false:
-// CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK14-NEXT: br label [[COND_END]]
-// CHECK14: cond.end:
-// CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
-// CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK14-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK14: omp.inner.for.cond:
-// CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK14-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP6]], 100
-// CHECK14-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK14: omp.inner.for.body:
-// CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[F_ADDR]], align 4
-// CHECK14-NEXT: store i32 [[TMP9]], i32* [[F_CASTED]], align 4
-// CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[F_CASTED]], align 4
-// CHECK14-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK14-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP7]] to i8*
-// CHECK14-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 4
-// CHECK14-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK14-NEXT: [[TMP14:%.*]] = inttoptr i32 [[TMP8]] to i8*
-// CHECK14-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 4
-// CHECK14-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK14-NEXT: [[TMP16:%.*]] = bitcast [10 x [10 x i32]]* [[TMP0]] to i8*
-// CHECK14-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 4
-// CHECK14-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
-// CHECK14-NEXT: [[TMP18:%.*]] = inttoptr i32 [[TMP10]] to i8*
-// CHECK14-NEXT: store i8* [[TMP18]], i8** [[TMP17]], align 4
-// CHECK14-NEXT: [[TMP19:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK14-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, [10 x [10 x i32]]*, i32)* @__omp_outlined__7 to i8*), i8* null, i8** [[TMP19]], i32 4)
-// CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK14: omp.inner.for.inc:
-// CHECK14-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK14-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
-// CHECK14-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
-// CHECK14-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK14-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK14-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
-// CHECK14-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK14-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK14-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK14-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
-// CHECK14-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK14-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK14-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP26]], 99
-// CHECK14-NEXT: br i1 [[CMP5]], label [[COND_TRUE6:%.*]], label [[COND_FALSE7:%.*]]
-// CHECK14: cond.true6:
-// CHECK14-NEXT: br label [[COND_END8:%.*]]
-// CHECK14: cond.false7:
-// CHECK14-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK14-NEXT: br label [[COND_END8]]
-// CHECK14: cond.end8:
-// CHECK14-NEXT: [[COND9:%.*]] = phi i32 [ 99, [[COND_TRUE6]] ], [ [[TMP27]], [[COND_FALSE7]] ]
-// CHECK14-NEXT: store i32 [[COND9]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK14-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK14-NEXT: store i32 [[TMP28]], i32* [[DOTOMP_IV]], align 4
-// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK14: omp.inner.for.end:
-// CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK14: omp.loop.exit:
-// CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
-// CHECK14-NEXT: ret void
-// CHECK14-LABEL: define {{[^@]+}}@__omp_outlined__7
-// CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
-// CHECK14-NEXT: entry:
-// CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK14-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[K:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[J:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK14-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK14-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK14-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK14-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
-// CHECK14-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
-// CHECK14-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK14-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
-// CHECK14-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
-// CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK14-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
-// CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK14-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK14: omp.inner.for.cond:
-// CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK14-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP6]], [[TMP7]]
-// CHECK14-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK14: omp.inner.for.body:
-// CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK14-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP8]], 10
-// CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
-// CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4
-// CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK14-NEXT: [[DIV2:%.*]] = sdiv i32 [[TMP10]], 10
-// CHECK14-NEXT: [[MUL3:%.*]] = mul nsw i32 [[DIV2]], 10
-// CHECK14-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL3]]
-// CHECK14-NEXT: [[MUL4:%.*]] = mul nsw i32 [[SUB]], 1
-// CHECK14-NEXT: [[ADD5:%.*]] = add nsw i32 0, [[MUL4]]
-// CHECK14-NEXT: store i32 [[ADD5]], i32* [[J]], align 4
-// CHECK14-NEXT: store i32 10, i32* [[K]], align 4
-// CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
-// CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[J]], align 4
-// CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[F_ADDR]], align 4
-// CHECK14-NEXT: [[MUL6:%.*]] = mul nsw i32 [[TMP12]], [[TMP13]]
-// CHECK14-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP11]], [[MUL6]]
-// CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[K]], align 4
-// CHECK14-NEXT: [[ADD8:%.*]] = add nsw i32 [[ADD7]], [[TMP14]]
-// CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4
-// CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [10 x i32]], [10 x [10 x i32]]* [[TMP0]], i32 0, i32 [[TMP15]]
-// CHECK14-NEXT: [[TMP16:%.*]] = load i32, i32* [[J]], align 4
-// CHECK14-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP16]]
-// CHECK14-NEXT: store i32 [[ADD8]], i32* [[ARRAYIDX9]], align 4
-// CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK14: omp.body.continue:
-// CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK14: omp.inner.for.inc:
-// CHECK14-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK14-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK14-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
-// CHECK14-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
-// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK14: omp.inner.for.end:
-// CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK14: omp.loop.exit:
-// CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
-// CHECK14-NEXT: ret void
-// CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l67
-// CHECK14-SAME: (i32 [[N:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]]) #[[ATTR0]] {
-// CHECK14-NEXT: entry:
-// CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK14-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK14-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK14-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK14-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK14-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK14-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK14-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK14: .execute:
-// CHECK14-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK14-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
-// CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK14-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK14-NEXT: call void @__omp_outlined__8(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP3]], [10 x [10 x i32]]* [[TMP0]]) #[[ATTR3]]
-// CHECK14-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK14: .omp.deinit:
-// CHECK14-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK14-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK14: .exit:
-// CHECK14-NEXT: ret void
-// CHECK14-LABEL: define {{[^@]+}}@__omp_outlined__8
-// CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]]) #[[ATTR0]] {
-// CHECK14-NEXT: entry:
-// CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
-// CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8
-// CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[J:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i64, align 8
-// CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i64, align 8
-// CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
-// CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[I9:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[J10:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 4
-// CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK14-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK14-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK14-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK14-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK14-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK14-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK14-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
-// CHECK14-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK14-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64
-// CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK14-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP4]], 0
-// CHECK14-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1
-// CHECK14-NEXT: [[CONV6:%.*]] = sext i32 [[DIV5]] to i64
-// CHECK14-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]]
-// CHECK14-NEXT: [[SUB7:%.*]] = sub nsw i64 [[MUL]], 1
-// CHECK14-NEXT: store i64 [[SUB7]], i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK14-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK14-NEXT: store i32 0, i32* [[J]], align 4
-// CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
-// CHECK14-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK14: land.lhs.true:
-// CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK14-NEXT: [[CMP8:%.*]] = icmp slt i32 0, [[TMP6]]
-// CHECK14-NEXT: br i1 [[CMP8]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
-// CHECK14: omp.precond.then:
-// CHECK14-NEXT: store i64 0, i64* [[DOTOMP_COMB_LB]], align 8
-// CHECK14-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK14-NEXT: store i64 [[TMP7]], i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK14-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8
-// CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK14-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK14-NEXT: [[CONV11:%.*]] = zext i32 [[NVPTX_NUM_THREADS]] to i64
-// CHECK14-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
-// CHECK14-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_COMB_LB]], i64* [[DOTOMP_COMB_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 [[CONV11]])
-// CHECK14-NEXT: [[TMP10:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK14-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK14-NEXT: [[CMP12:%.*]] = icmp sgt i64 [[TMP10]], [[TMP11]]
-// CHECK14-NEXT: br i1 [[CMP12]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK14: cond.true:
-// CHECK14-NEXT: [[TMP12:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK14-NEXT: br label [[COND_END:%.*]]
-// CHECK14: cond.false:
-// CHECK14-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK14-NEXT: br label [[COND_END]]
-// CHECK14: cond.end:
-// CHECK14-NEXT: [[COND:%.*]] = phi i64 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
-// CHECK14-NEXT: store i64 [[COND]], i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK14-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
-// CHECK14-NEXT: store i64 [[TMP14]], i64* [[DOTOMP_IV]], align 8
-// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK14: omp.inner.for.cond:
-// CHECK14-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK14-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK14-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP16]], 1
-// CHECK14-NEXT: [[CMP13:%.*]] = icmp slt i64 [[TMP15]], [[ADD]]
-// CHECK14-NEXT: br i1 [[CMP13]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK14: omp.inner.for.body:
-// CHECK14-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
-// CHECK14-NEXT: [[TMP18:%.*]] = trunc i64 [[TMP17]] to i32
-// CHECK14-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK14-NEXT: [[TMP20:%.*]] = trunc i64 [[TMP19]] to i32
-// CHECK14-NEXT: [[TMP21:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK14-NEXT: store i32 [[TMP21]], i32* [[N_CASTED]], align 4
-// CHECK14-NEXT: [[TMP22:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK14-NEXT: [[TMP23:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK14-NEXT: [[TMP24:%.*]] = inttoptr i32 [[TMP18]] to i8*
-// CHECK14-NEXT: store i8* [[TMP24]], i8** [[TMP23]], align 4
-// CHECK14-NEXT: [[TMP25:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK14-NEXT: [[TMP26:%.*]] = inttoptr i32 [[TMP20]] to i8*
-// CHECK14-NEXT: store i8* [[TMP26]], i8** [[TMP25]], align 4
-// CHECK14-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK14-NEXT: [[TMP28:%.*]] = inttoptr i32 [[TMP22]] to i8*
-// CHECK14-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 4
-// CHECK14-NEXT: [[TMP29:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
-// CHECK14-NEXT: [[TMP30:%.*]] = bitcast [10 x [10 x i32]]* [[TMP0]] to i8*
-// CHECK14-NEXT: store i8* [[TMP30]], i8** [[TMP29]], align 4
-// CHECK14-NEXT: [[TMP31:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK14-NEXT: [[TMP32:%.*]] = load i32, i32* [[TMP31]], align 4
-// CHECK14-NEXT: [[TMP33:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK14-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP32]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [10 x [10 x i32]]*)* @__omp_outlined__9 to i8*), i8* null, i8** [[TMP33]], i32 4)
-// CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK14: omp.inner.for.inc:
-// CHECK14-NEXT: [[TMP34:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK14-NEXT: [[TMP35:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8
-// CHECK14-NEXT: [[ADD14:%.*]] = add nsw i64 [[TMP34]], [[TMP35]]
-// CHECK14-NEXT: store i64 [[ADD14]], i64* [[DOTOMP_IV]], align 8
-// CHECK14-NEXT: [[TMP36:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
-// CHECK14-NEXT: [[TMP37:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8
-// CHECK14-NEXT: [[ADD15:%.*]] = add nsw i64 [[TMP36]], [[TMP37]]
-// CHECK14-NEXT: store i64 [[ADD15]], i64* [[DOTOMP_COMB_LB]], align 8
-// CHECK14-NEXT: [[TMP38:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK14-NEXT: [[TMP39:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8
-// CHECK14-NEXT: [[ADD16:%.*]] = add nsw i64 [[TMP38]], [[TMP39]]
-// CHECK14-NEXT: store i64 [[ADD16]], i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK14-NEXT: [[TMP40:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK14-NEXT: [[TMP41:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK14-NEXT: [[CMP17:%.*]] = icmp sgt i64 [[TMP40]], [[TMP41]]
-// CHECK14-NEXT: br i1 [[CMP17]], label [[COND_TRUE18:%.*]], label [[COND_FALSE19:%.*]]
-// CHECK14: cond.true18:
-// CHECK14-NEXT: [[TMP42:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK14-NEXT: br label [[COND_END20:%.*]]
-// CHECK14: cond.false19:
-// CHECK14-NEXT: [[TMP43:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK14-NEXT: br label [[COND_END20]]
-// CHECK14: cond.end20:
-// CHECK14-NEXT: [[COND21:%.*]] = phi i64 [ [[TMP42]], [[COND_TRUE18]] ], [ [[TMP43]], [[COND_FALSE19]] ]
-// CHECK14-NEXT: store i64 [[COND21]], i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK14-NEXT: [[TMP44:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
-// CHECK14-NEXT: store i64 [[TMP44]], i64* [[DOTOMP_IV]], align 8
-// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK14: omp.inner.for.end:
-// CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK14: omp.loop.exit:
-// CHECK14-NEXT: [[TMP45:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK14-NEXT: [[TMP46:%.*]] = load i32, i32* [[TMP45]], align 4
-// CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP46]])
-// CHECK14-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK14: omp.precond.end:
-// CHECK14-NEXT: ret void
-// CHECK14-LABEL: define {{[^@]+}}@__omp_outlined__9
-// CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]]) #[[ATTR0]] {
-// CHECK14-NEXT: entry:
-// CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
-// CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8
-// CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[J:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8
-// CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8
-// CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
-// CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[I11:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[J12:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK14-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK14-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK14-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK14-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK14-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK14-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK14-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK14-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK14-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
-// CHECK14-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK14-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64
-// CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK14-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP4]], 0
-// CHECK14-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1
-// CHECK14-NEXT: [[CONV6:%.*]] = sext i32 [[DIV5]] to i64
-// CHECK14-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]]
-// CHECK14-NEXT: [[SUB7:%.*]] = sub nsw i64 [[MUL]], 1
-// CHECK14-NEXT: store i64 [[SUB7]], i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK14-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK14-NEXT: store i32 0, i32* [[J]], align 4
-// CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
-// CHECK14-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK14: land.lhs.true:
-// CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK14-NEXT: [[CMP8:%.*]] = icmp slt i32 0, [[TMP6]]
-// CHECK14-NEXT: br i1 [[CMP8]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
-// CHECK14: omp.precond.then:
-// CHECK14-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8
-// CHECK14-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK14-NEXT: store i64 [[TMP7]], i64* [[DOTOMP_UB]], align 8
-// CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK14-NEXT: [[CONV9:%.*]] = zext i32 [[TMP8]] to i64
-// CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK14-NEXT: [[CONV10:%.*]] = zext i32 [[TMP9]] to i64
-// CHECK14-NEXT: store i64 [[CONV9]], i64* [[DOTOMP_LB]], align 8
-// CHECK14-NEXT: store i64 [[CONV10]], i64* [[DOTOMP_UB]], align 8
-// CHECK14-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8
-// CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK14-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
-// CHECK14-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 33, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_LB]], i64* [[DOTOMP_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1)
-// CHECK14-NEXT: [[TMP12:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8
-// CHECK14-NEXT: store i64 [[TMP12]], i64* [[DOTOMP_IV]], align 8
-// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK14: omp.inner.for.cond:
-// CHECK14-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK14-NEXT: [[CONV13:%.*]] = zext i32 [[TMP14]] to i64
-// CHECK14-NEXT: [[CMP14:%.*]] = icmp sle i64 [[TMP13]], [[CONV13]]
-// CHECK14-NEXT: br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK14: omp.inner.for.body:
-// CHECK14-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK14-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK14-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP16]], 0
-// CHECK14-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1
-// CHECK14-NEXT: [[MUL17:%.*]] = mul nsw i32 1, [[DIV16]]
-// CHECK14-NEXT: [[CONV18:%.*]] = sext i32 [[MUL17]] to i64
-// CHECK14-NEXT: [[DIV19:%.*]] = sdiv i64 [[TMP15]], [[CONV18]]
-// CHECK14-NEXT: [[MUL20:%.*]] = mul nsw i64 [[DIV19]], 1
-// CHECK14-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL20]]
-// CHECK14-NEXT: [[CONV21:%.*]] = trunc i64 [[ADD]] to i32
-// CHECK14-NEXT: store i32 [[CONV21]], i32* [[I11]], align 4
-// CHECK14-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK14-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK14-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK14-NEXT: [[SUB22:%.*]] = sub nsw i32 [[TMP19]], 0
-// CHECK14-NEXT: [[DIV23:%.*]] = sdiv i32 [[SUB22]], 1
-// CHECK14-NEXT: [[MUL24:%.*]] = mul nsw i32 1, [[DIV23]]
-// CHECK14-NEXT: [[CONV25:%.*]] = sext i32 [[MUL24]] to i64
-// CHECK14-NEXT: [[DIV26:%.*]] = sdiv i64 [[TMP18]], [[CONV25]]
-// CHECK14-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK14-NEXT: [[SUB27:%.*]] = sub nsw i32 [[TMP20]], 0
-// CHECK14-NEXT: [[DIV28:%.*]] = sdiv i32 [[SUB27]], 1
-// CHECK14-NEXT: [[MUL29:%.*]] = mul nsw i32 1, [[DIV28]]
-// CHECK14-NEXT: [[CONV30:%.*]] = sext i32 [[MUL29]] to i64
-// CHECK14-NEXT: [[MUL31:%.*]] = mul nsw i64 [[DIV26]], [[CONV30]]
-// CHECK14-NEXT: [[SUB32:%.*]] = sub nsw i64 [[TMP17]], [[MUL31]]
-// CHECK14-NEXT: [[MUL33:%.*]] = mul nsw i64 [[SUB32]], 1
-// CHECK14-NEXT: [[ADD34:%.*]] = add nsw i64 0, [[MUL33]]
-// CHECK14-NEXT: [[CONV35:%.*]] = trunc i64 [[ADD34]] to i32
-// CHECK14-NEXT: store i32 [[CONV35]], i32* [[J12]], align 4
-// CHECK14-NEXT: [[TMP21:%.*]] = load i32, i32* [[I11]], align 4
-// CHECK14-NEXT: [[TMP22:%.*]] = load i32, i32* [[J12]], align 4
-// CHECK14-NEXT: [[ADD36:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
-// CHECK14-NEXT: [[TMP23:%.*]] = load i32, i32* [[I11]], align 4
-// CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [10 x i32]], [10 x [10 x i32]]* [[TMP0]], i32 0, i32 [[TMP23]]
-// CHECK14-NEXT: [[TMP24:%.*]] = load i32, i32* [[J12]], align 4
-// CHECK14-NEXT: [[ARRAYIDX37:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP24]]
-// CHECK14-NEXT: store i32 [[ADD36]], i32* [[ARRAYIDX37]], align 4
-// CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK14: omp.body.continue:
-// CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK14: omp.inner.for.inc:
-// CHECK14-NEXT: [[TMP25:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK14-NEXT: [[TMP26:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8
-// CHECK14-NEXT: [[ADD38:%.*]] = add nsw i64 [[TMP25]], [[TMP26]]
-// CHECK14-NEXT: store i64 [[ADD38]], i64* [[DOTOMP_IV]], align 8
-// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK14: omp.inner.for.end:
-// CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK14: omp.loop.exit:
-// CHECK14-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK14-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4
-// CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP28]])
-// CHECK14-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK14: omp.precond.end:
-// CHECK14-NEXT: ret void
-// CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l74
-// CHECK14-SAME: (i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* [[V:%.*]]) #[[ATTR0]] {
-// CHECK14-NEXT: entry:
-// CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK14-NEXT: [[V_ADDR:%.*]] = alloca i32*, align 4
-// CHECK14-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK14-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK14-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK14-NEXT: store i32* [[V]], i32** [[V_ADDR]], align 4
-// CHECK14-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK14-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK14-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK14-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK14: .execute:
-// CHECK14-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK14-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
-// CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK14-NEXT: [[TMP4:%.*]] = load i32*, i32** [[V_ADDR]], align 4
-// CHECK14-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK14-NEXT: call void @__omp_outlined__10(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP3]], [1000 x i32]* [[TMP0]], i32* [[TMP4]]) #[[ATTR3]]
-// CHECK14-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK14: .omp.deinit:
-// CHECK14-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK14-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK14: .exit:
-// CHECK14-NEXT: ret void
-// CHECK14-LABEL: define {{[^@]+}}@__omp_outlined__10
-// CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* [[V:%.*]]) #[[ATTR0]] {
-// CHECK14-NEXT: entry:
-// CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK14-NEXT: [[V_ADDR:%.*]] = alloca i32*, align 4
-// CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [5 x i8*], align 4
-// CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK14-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK14-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK14-NEXT: store i32* [[V]], i32** [[V_ADDR]], align 4
-// CHECK14-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK14-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK14-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK14-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK14-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK14-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK14-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK14-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK14-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK14: omp.precond.then:
-// CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK14-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK14-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK14-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
-// CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK14-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
-// CHECK14-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK14: cond.true:
-// CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK14-NEXT: br label [[COND_END:%.*]]
-// CHECK14: cond.false:
-// CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK14-NEXT: br label [[COND_END]]
-// CHECK14: cond.end:
-// CHECK14-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
-// CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK14-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
-// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK14: omp.inner.for.cond:
-// CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1
-// CHECK14-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]
-// CHECK14-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK14: omp.inner.for.body:
-// CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK14-NEXT: [[TMP16:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK14-NEXT: store i32 [[TMP16]], i32* [[N_CASTED]], align 4
-// CHECK14-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK14-NEXT: [[TMP18:%.*]] = load i32*, i32** [[V_ADDR]], align 4
-// CHECK14-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK14-NEXT: [[TMP20:%.*]] = inttoptr i32 [[TMP14]] to i8*
-// CHECK14-NEXT: store i8* [[TMP20]], i8** [[TMP19]], align 4
-// CHECK14-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK14-NEXT: [[TMP22:%.*]] = inttoptr i32 [[TMP15]] to i8*
-// CHECK14-NEXT: store i8* [[TMP22]], i8** [[TMP21]], align 4
-// CHECK14-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK14-NEXT: [[TMP24:%.*]] = inttoptr i32 [[TMP17]] to i8*
-// CHECK14-NEXT: store i8* [[TMP24]], i8** [[TMP23]], align 4
-// CHECK14-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
-// CHECK14-NEXT: [[TMP26:%.*]] = bitcast [1000 x i32]* [[TMP0]] to i8*
-// CHECK14-NEXT: store i8* [[TMP26]], i8** [[TMP25]], align 4
-// CHECK14-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 4
-// CHECK14-NEXT: [[TMP28:%.*]] = bitcast i32* [[TMP18]] to i8*
-// CHECK14-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 4
-// CHECK14-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK14-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4
-// CHECK14-NEXT: [[TMP31:%.*]] = bitcast [5 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK14-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP30]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i32]*, i32*)* @__omp_outlined__11 to i8*), i8* null, i8** [[TMP31]], i32 5)
-// CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK14: omp.inner.for.inc:
-// CHECK14-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK14-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK14-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP32]], [[TMP33]]
-// CHECK14-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
-// CHECK14-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK14-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK14-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP34]], [[TMP35]]
-// CHECK14-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK14-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK14-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK14-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP36]], [[TMP37]]
-// CHECK14-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK14-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK14-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK14-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP38]], [[TMP39]]
-// CHECK14-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]]
-// CHECK14: cond.true10:
-// CHECK14-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK14-NEXT: br label [[COND_END12:%.*]]
-// CHECK14: cond.false11:
-// CHECK14-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK14-NEXT: br label [[COND_END12]]
-// CHECK14: cond.end12:
-// CHECK14-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP40]], [[COND_TRUE10]] ], [ [[TMP41]], [[COND_FALSE11]] ]
-// CHECK14-NEXT: store i32 [[COND13]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK14-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK14-NEXT: store i32 [[TMP42]], i32* [[DOTOMP_IV]], align 4
-// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK14: omp.inner.for.end:
-// CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK14: omp.loop.exit:
-// CHECK14-NEXT: [[TMP43:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK14-NEXT: [[TMP44:%.*]] = load i32, i32* [[TMP43]], align 4
-// CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP44]])
-// CHECK14-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK14: omp.precond.end:
-// CHECK14-NEXT: ret void
-// CHECK14-LABEL: define {{[^@]+}}@__omp_outlined__11
-// CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* [[V:%.*]]) #[[ATTR0]] {
-// CHECK14-NEXT: entry:
-// CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK14-NEXT: [[V_ADDR:%.*]] = alloca i32*, align 4
-// CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK14-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK14-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK14-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK14-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK14-NEXT: store i32* [[V]], i32** [[V_ADDR]], align 4
-// CHECK14-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK14-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK14-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK14-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK14-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK14-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK14-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK14-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK14-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK14: omp.precond.then:
-// CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK14-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
-// CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK14-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
-// CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
-// CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK14-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK14-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
-// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK14: omp.inner.for.cond:
-// CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK14-NEXT: [[CMP4:%.*]] = icmp ule i32 [[TMP10]], [[TMP11]]
-// CHECK14-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK14: omp.inner.for.body:
-// CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
-// CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK14-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
-// CHECK14-NEXT: [[TMP13:%.*]] = load i32*, i32** [[V_ADDR]], align 4
-// CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[I3]], align 4
-// CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP13]], i32 [[TMP14]]
-// CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
-// CHECK14-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4
-// CHECK14-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 [[TMP16]]
-// CHECK14-NEXT: store i32 [[TMP15]], i32* [[ARRAYIDX5]], align 4
-// CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK14: omp.body.continue:
-// CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK14: omp.inner.for.inc:
-// CHECK14-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK14-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK14-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
-// CHECK14-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
-// CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK14: omp.inner.for.end:
-// CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK14: omp.loop.exit:
-// CHECK14-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK14-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4
-// CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]])
-// CHECK14-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK14: omp.precond.end:
-// CHECK14-NEXT: ret void
-// CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l43
-// CHECK15-SAME: (i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0:[0-9]+]] {
-// CHECK15-NEXT: entry:
-// CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK15-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[L_CASTED:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK15-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK15-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK15-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
-// CHECK15-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK15-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK15-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK15-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK15: .execute:
-// CHECK15-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]])
-// CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK15-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
-// CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[L_ADDR]], align 4
-// CHECK15-NEXT: store i32 [[TMP4]], i32* [[L_CASTED]], align 4
-// CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[L_CASTED]], align 4
-// CHECK15-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK15-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP3]], [1000 x i32]* [[TMP0]], i32 [[TMP5]]) #[[ATTR3:[0-9]+]]
-// CHECK15-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK15: .omp.deinit:
-// CHECK15-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK15-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK15: .exit:
-// CHECK15-NEXT: ret void
-// CHECK15-LABEL: define {{[^@]+}}@__omp_outlined__
-// CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0]] {
-// CHECK15-NEXT: entry:
-// CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK15-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[I4:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[L_CASTED:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [5 x i8*], align 4
-// CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK15-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK15-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK15-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
-// CHECK15-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK15-NEXT: [[TMP1:%.*]] = call i8* @__kmpc_data_sharing_push_stack(i32 4, i16 1)
-// CHECK15-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to %struct._globalized_locals_ty*
-// CHECK15-NEXT: [[L1:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY:%.*]], %struct._globalized_locals_ty* [[TMP2]], i32 0, i32 0
-// CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
-// CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK15-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK15-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK15-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
-// CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK15: omp.precond.then:
-// CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK15-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 128)
-// CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK15-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
-// CHECK15-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK15: cond.true:
-// CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK15-NEXT: br label [[COND_END:%.*]]
-// CHECK15: cond.false:
-// CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK15-NEXT: br label [[COND_END]]
-// CHECK15: cond.end:
-// CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
-// CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK15-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
-// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK15: omp.inner.for.cond:
-// CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], 1
-// CHECK15-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP14]], [[ADD]]
-// CHECK15-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK15: omp.inner.for.body:
-// CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK15-NEXT: store i32 [[TMP18]], i32* [[N_CASTED]], align 4
-// CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[L_ADDR]], align 4
-// CHECK15-NEXT: store i32 [[TMP20]], i32* [[L_CASTED]], align 4
-// CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[L_CASTED]], align 4
-// CHECK15-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK15-NEXT: [[TMP23:%.*]] = inttoptr i32 [[TMP16]] to i8*
-// CHECK15-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 4
-// CHECK15-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK15-NEXT: [[TMP25:%.*]] = inttoptr i32 [[TMP17]] to i8*
-// CHECK15-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 4
-// CHECK15-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK15-NEXT: [[TMP27:%.*]] = inttoptr i32 [[TMP19]] to i8*
-// CHECK15-NEXT: store i8* [[TMP27]], i8** [[TMP26]], align 4
-// CHECK15-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
-// CHECK15-NEXT: [[TMP29:%.*]] = bitcast [1000 x i32]* [[TMP0]] to i8*
-// CHECK15-NEXT: store i8* [[TMP29]], i8** [[TMP28]], align 4
-// CHECK15-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 4
-// CHECK15-NEXT: [[TMP31:%.*]] = inttoptr i32 [[TMP21]] to i8*
-// CHECK15-NEXT: store i8* [[TMP31]], i8** [[TMP30]], align 4
-// CHECK15-NEXT: [[TMP32:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK15-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4
-// CHECK15-NEXT: [[TMP34:%.*]] = bitcast [5 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK15-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP33]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i32]*, i32)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP34]], i32 5)
-// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK15: omp.inner.for.inc:
-// CHECK15-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK15-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK15-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP35]], [[TMP36]]
-// CHECK15-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
-// CHECK15-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK15-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK15-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP37]], [[TMP38]]
-// CHECK15-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK15-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK15-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK15-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP39]], [[TMP40]]
-// CHECK15-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK15-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK15-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK15-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP41]], [[TMP42]]
-// CHECK15-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
-// CHECK15: cond.true11:
-// CHECK15-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK15-NEXT: br label [[COND_END13:%.*]]
-// CHECK15: cond.false12:
-// CHECK15-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK15-NEXT: br label [[COND_END13]]
-// CHECK15: cond.end13:
-// CHECK15-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP43]], [[COND_TRUE11]] ], [ [[TMP44]], [[COND_FALSE12]] ]
-// CHECK15-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK15-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK15-NEXT: store i32 [[TMP45]], i32* [[DOTOMP_IV]], align 4
-// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK15: omp.inner.for.end:
-// CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK15: omp.loop.exit:
-// CHECK15-NEXT: [[TMP46:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK15-NEXT: [[TMP47:%.*]] = load i32, i32* [[TMP46]], align 4
-// CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP47]])
-// CHECK15-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK15-NEXT: [[TMP49:%.*]] = icmp ne i32 [[TMP48]], 0
-// CHECK15-NEXT: br i1 [[TMP49]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
-// CHECK15: .omp.lastprivate.then:
-// CHECK15-NEXT: [[TMP50:%.*]] = load i32, i32* [[L_ADDR]], align 4
-// CHECK15-NEXT: store i32 [[TMP50]], i32* [[L_ADDR]], align 4
-// CHECK15-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
-// CHECK15: .omp.lastprivate.done:
-// CHECK15-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK15: omp.precond.end:
-// CHECK15-NEXT: call void @__kmpc_data_sharing_pop_stack(i8* [[TMP1]])
-// CHECK15-NEXT: ret void
-// CHECK15-LABEL: define {{[^@]+}}@__omp_outlined__1
-// CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0]] {
-// CHECK15-NEXT: entry:
-// CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK15-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK15-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK15-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK15-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
-// CHECK15-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK15-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK15-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK15: omp.precond.then:
-// CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK15-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
-// CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
-// CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
-// CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK15-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 32)
-// CHECK15-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
-// CHECK15: omp.dispatch.cond:
-// CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK15-NEXT: [[CMP4:%.*]] = icmp ugt i32 [[TMP9]], [[TMP10]]
-// CHECK15-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK15: cond.true:
-// CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK15-NEXT: br label [[COND_END:%.*]]
-// CHECK15: cond.false:
-// CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK15-NEXT: br label [[COND_END]]
-// CHECK15: cond.end:
-// CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
-// CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
-// CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK15-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
-// CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK15-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
-// CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
-// CHECK15: omp.dispatch.body:
-// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK15: omp.inner.for.cond:
-// CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK15-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
-// CHECK15-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK15: omp.inner.for.body:
-// CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
-// CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK15-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
-// CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4
-// CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 [[TMP19]]
-// CHECK15-NEXT: store i32 1, i32* [[ARRAYIDX]], align 4
-// CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[I3]], align 4
-// CHECK15-NEXT: store i32 [[TMP20]], i32* [[L_ADDR]], align 4
-// CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK15: omp.body.continue:
-// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK15: omp.inner.for.inc:
-// CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK15-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP21]], 1
-// CHECK15-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
-// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK15: omp.inner.for.end:
-// CHECK15-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
-// CHECK15: omp.dispatch.inc:
-// CHECK15-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK15-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK15-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
-// CHECK15-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4
-// CHECK15-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK15-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK15-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
-// CHECK15-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4
-// CHECK15-NEXT: br label [[OMP_DISPATCH_COND]]
-// CHECK15: omp.dispatch.end:
-// CHECK15-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK15-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
-// CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP27]])
-// CHECK15-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK15-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
-// CHECK15-NEXT: br i1 [[TMP29]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
-// CHECK15: .omp.lastprivate.then:
-// CHECK15-NEXT: [[TMP30:%.*]] = load i32, i32* [[L_ADDR]], align 4
-// CHECK15-NEXT: store i32 [[TMP30]], i32* [[L_ADDR]], align 4
-// CHECK15-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
-// CHECK15: .omp.lastprivate.done:
-// CHECK15-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK15: omp.precond.end:
-// CHECK15-NEXT: ret void
-// CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l49
-// CHECK15-SAME: (i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
-// CHECK15-NEXT: entry:
-// CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
-// CHECK15-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK15-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK15-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK15-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK15-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK15-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK15-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK15: .execute:
-// CHECK15-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK15-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
-// CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK15-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK15-NEXT: call void @__omp_outlined__2(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP3]], [1000 x i16]* [[TMP0]]) #[[ATTR3]]
-// CHECK15-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK15: .omp.deinit:
-// CHECK15-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK15-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK15: .exit:
-// CHECK15-NEXT: ret void
-// CHECK15-LABEL: define {{[^@]+}}@__omp_outlined__2
-// CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
-// CHECK15-NEXT: entry:
-// CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
-// CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 4
-// CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK15-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK15-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK15-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK15-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK15-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK15: omp.precond.then:
-// CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK15-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK15-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK15-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
-// CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK15-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
-// CHECK15-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK15: cond.true:
-// CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK15-NEXT: br label [[COND_END:%.*]]
-// CHECK15: cond.false:
-// CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK15-NEXT: br label [[COND_END]]
-// CHECK15: cond.end:
-// CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
-// CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK15-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
-// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK15: omp.inner.for.cond:
-// CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1
-// CHECK15-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]
-// CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK15: omp.inner.for.body:
-// CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK15-NEXT: store i32 [[TMP16]], i32* [[N_CASTED]], align 4
-// CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK15-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK15-NEXT: [[TMP19:%.*]] = inttoptr i32 [[TMP14]] to i8*
-// CHECK15-NEXT: store i8* [[TMP19]], i8** [[TMP18]], align 4
-// CHECK15-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK15-NEXT: [[TMP21:%.*]] = inttoptr i32 [[TMP15]] to i8*
-// CHECK15-NEXT: store i8* [[TMP21]], i8** [[TMP20]], align 4
-// CHECK15-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK15-NEXT: [[TMP23:%.*]] = inttoptr i32 [[TMP17]] to i8*
-// CHECK15-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 4
-// CHECK15-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
-// CHECK15-NEXT: [[TMP25:%.*]] = bitcast [1000 x i16]* [[TMP0]] to i8*
-// CHECK15-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 4
-// CHECK15-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK15-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
-// CHECK15-NEXT: [[TMP28:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK15-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP27]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i16]*)* @__omp_outlined__3 to i8*), i8* null, i8** [[TMP28]], i32 4)
-// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK15: omp.inner.for.inc:
-// CHECK15-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK15-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK15-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP29]], [[TMP30]]
-// CHECK15-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
-// CHECK15-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK15-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK15-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP31]], [[TMP32]]
-// CHECK15-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK15-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK15-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK15-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP33]], [[TMP34]]
-// CHECK15-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK15-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK15-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK15-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP35]], [[TMP36]]
-// CHECK15-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]]
-// CHECK15: cond.true10:
-// CHECK15-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK15-NEXT: br label [[COND_END12:%.*]]
-// CHECK15: cond.false11:
-// CHECK15-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK15-NEXT: br label [[COND_END12]]
-// CHECK15: cond.end12:
-// CHECK15-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP37]], [[COND_TRUE10]] ], [ [[TMP38]], [[COND_FALSE11]] ]
-// CHECK15-NEXT: store i32 [[COND13]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK15-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK15-NEXT: store i32 [[TMP39]], i32* [[DOTOMP_IV]], align 4
-// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK15: omp.inner.for.end:
-// CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK15: omp.loop.exit:
-// CHECK15-NEXT: [[TMP40:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK15-NEXT: [[TMP41:%.*]] = load i32, i32* [[TMP40]], align 4
-// CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP41]])
-// CHECK15-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK15: omp.precond.end:
-// CHECK15-NEXT: ret void
-// CHECK15-LABEL: define {{[^@]+}}@__omp_outlined__3
-// CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
-// CHECK15-NEXT: entry:
-// CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
-// CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK15-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK15-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK15-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK15-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK15-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK15: omp.precond.then:
-// CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK15-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
-// CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
-// CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
-// CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK15-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK15-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
-// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK15: omp.inner.for.cond:
-// CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK15-NEXT: [[CMP4:%.*]] = icmp ule i32 [[TMP10]], [[TMP11]]
-// CHECK15-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK15: omp.inner.for.body:
-// CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
-// CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK15-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
-// CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[I3]], align 4
-// CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i16], [1000 x i16]* [[TMP0]], i32 0, i32 [[TMP13]]
-// CHECK15-NEXT: [[TMP14:%.*]] = load i16, i16* [[ARRAYIDX]], align 2
-// CHECK15-NEXT: [[CONV:%.*]] = sext i16 [[TMP14]] to i32
-// CHECK15-NEXT: [[ADD5:%.*]] = add nsw i32 [[CONV]], 1
-// CHECK15-NEXT: [[CONV6:%.*]] = trunc i32 [[ADD5]] to i16
-// CHECK15-NEXT: store i16 [[CONV6]], i16* [[ARRAYIDX]], align 2
-// CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK15: omp.body.continue:
-// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK15: omp.inner.for.inc:
-// CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK15-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
-// CHECK15-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
-// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK15: omp.inner.for.end:
-// CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK15: omp.loop.exit:
-// CHECK15-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
-// CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]])
-// CHECK15-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK15: omp.precond.end:
-// CHECK15-NEXT: ret void
-// CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l54
-// CHECK15-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
-// CHECK15-NEXT: entry:
-// CHECK15-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
-// CHECK15-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK15-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
-// CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
-// CHECK15-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK15-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK15-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK15: .execute:
-// CHECK15-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK15-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK15-NEXT: call void @__omp_outlined__4(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x i32]* [[TMP0]]) #[[ATTR3]]
-// CHECK15-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK15: .omp.deinit:
-// CHECK15-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK15-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK15: .exit:
-// CHECK15-NEXT: ret void
-// CHECK15-LABEL: define {{[^@]+}}@__omp_outlined__4
-// CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
-// CHECK15-NEXT: entry:
-// CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK15-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
-// CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [3 x i8*], align 4
-// CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK15-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
-// CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
-// CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK15-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK15-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
-// CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
-// CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK15: cond.true:
-// CHECK15-NEXT: br label [[COND_END:%.*]]
-// CHECK15: cond.false:
-// CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK15-NEXT: br label [[COND_END]]
-// CHECK15: cond.end:
-// CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
-// CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK15: omp.inner.for.cond:
-// CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK15-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP6]], 10
-// CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK15: omp.inner.for.body:
-// CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK15-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK15-NEXT: [[TMP10:%.*]] = inttoptr i32 [[TMP7]] to i8*
-// CHECK15-NEXT: store i8* [[TMP10]], i8** [[TMP9]], align 4
-// CHECK15-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK15-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP8]] to i8*
-// CHECK15-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 4
-// CHECK15-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK15-NEXT: [[TMP14:%.*]] = bitcast [10 x i32]* [[TMP0]] to i8*
-// CHECK15-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 4
-// CHECK15-NEXT: [[TMP15:%.*]] = bitcast [3 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK15-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @__omp_outlined__5 to i8*), i8* null, i8** [[TMP15]], i32 3)
-// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK15: omp.inner.for.inc:
-// CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
-// CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
-// CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK15-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
-// CHECK15-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK15-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
-// CHECK15-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK15-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK15-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP22]], 9
-// CHECK15-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
-// CHECK15: cond.true5:
-// CHECK15-NEXT: br label [[COND_END7:%.*]]
-// CHECK15: cond.false6:
-// CHECK15-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK15-NEXT: br label [[COND_END7]]
-// CHECK15: cond.end7:
-// CHECK15-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP23]], [[COND_FALSE6]] ]
-// CHECK15-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK15-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK15-NEXT: store i32 [[TMP24]], i32* [[DOTOMP_IV]], align 4
-// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK15: omp.inner.for.end:
-// CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK15: omp.loop.exit:
-// CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
-// CHECK15-NEXT: ret void
-// CHECK15-LABEL: define {{[^@]+}}@__omp_outlined__5
-// CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
-// CHECK15-NEXT: entry:
-// CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
-// CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK15-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
-// CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
-// CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK15-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
-// CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK15-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
-// CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
-// CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK15-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
-// CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK15: omp.inner.for.cond:
-// CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK15-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP6]], [[TMP7]]
-// CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK15: omp.inner.for.body:
-// CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
-// CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4
-// CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
-// CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]]
-// CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
-// CHECK15-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP10]], 1
-// CHECK15-NEXT: store i32 [[ADD1]], i32* [[ARRAYIDX]], align 4
-// CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK15: omp.body.continue:
-// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK15: omp.inner.for.inc:
-// CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK15-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
-// CHECK15-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
-// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK15: omp.inner.for.end:
-// CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK15: omp.loop.exit:
-// CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
-// CHECK15-NEXT: ret void
-// CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l59
-// CHECK15-SAME: ([10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
-// CHECK15-NEXT: entry:
-// CHECK15-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK15-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[F_CASTED:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK15-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK15-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
-// CHECK15-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK15-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK15-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK15-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK15: .execute:
-// CHECK15-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[F_ADDR]], align 4
-// CHECK15-NEXT: store i32 [[TMP2]], i32* [[F_CASTED]], align 4
-// CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[F_CASTED]], align 4
-// CHECK15-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK15-NEXT: call void @__omp_outlined__6(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x [10 x i32]]* [[TMP0]], i32 [[TMP3]]) #[[ATTR3]]
-// CHECK15-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK15: .omp.deinit:
-// CHECK15-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK15-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK15: .exit:
-// CHECK15-NEXT: ret void
-// CHECK15-LABEL: define {{[^@]+}}@__omp_outlined__6
-// CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
-// CHECK15-NEXT: entry:
-// CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK15-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK15-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[K:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[J:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[F_CASTED:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 4
-// CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK15-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK15-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
-// CHECK15-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK15-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK15-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
-// CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
-// CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK15: cond.true:
-// CHECK15-NEXT: br label [[COND_END:%.*]]
-// CHECK15: cond.false:
-// CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK15-NEXT: br label [[COND_END]]
-// CHECK15: cond.end:
-// CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
-// CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK15: omp.inner.for.cond:
-// CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK15-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP6]], 100
-// CHECK15-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK15: omp.inner.for.body:
-// CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[F_ADDR]], align 4
-// CHECK15-NEXT: store i32 [[TMP9]], i32* [[F_CASTED]], align 4
-// CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[F_CASTED]], align 4
-// CHECK15-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK15-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP7]] to i8*
-// CHECK15-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 4
-// CHECK15-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK15-NEXT: [[TMP14:%.*]] = inttoptr i32 [[TMP8]] to i8*
-// CHECK15-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 4
-// CHECK15-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK15-NEXT: [[TMP16:%.*]] = bitcast [10 x [10 x i32]]* [[TMP0]] to i8*
-// CHECK15-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 4
-// CHECK15-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
-// CHECK15-NEXT: [[TMP18:%.*]] = inttoptr i32 [[TMP10]] to i8*
-// CHECK15-NEXT: store i8* [[TMP18]], i8** [[TMP17]], align 4
-// CHECK15-NEXT: [[TMP19:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK15-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, [10 x [10 x i32]]*, i32)* @__omp_outlined__7 to i8*), i8* null, i8** [[TMP19]], i32 4)
-// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK15: omp.inner.for.inc:
-// CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
-// CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
-// CHECK15-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK15-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK15-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
-// CHECK15-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK15-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK15-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK15-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
-// CHECK15-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK15-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK15-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP26]], 99
-// CHECK15-NEXT: br i1 [[CMP5]], label [[COND_TRUE6:%.*]], label [[COND_FALSE7:%.*]]
-// CHECK15: cond.true6:
-// CHECK15-NEXT: br label [[COND_END8:%.*]]
-// CHECK15: cond.false7:
-// CHECK15-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK15-NEXT: br label [[COND_END8]]
-// CHECK15: cond.end8:
-// CHECK15-NEXT: [[COND9:%.*]] = phi i32 [ 99, [[COND_TRUE6]] ], [ [[TMP27]], [[COND_FALSE7]] ]
-// CHECK15-NEXT: store i32 [[COND9]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK15-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK15-NEXT: store i32 [[TMP28]], i32* [[DOTOMP_IV]], align 4
-// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK15: omp.inner.for.end:
-// CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK15: omp.loop.exit:
-// CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
-// CHECK15-NEXT: ret void
-// CHECK15-LABEL: define {{[^@]+}}@__omp_outlined__7
-// CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
-// CHECK15-NEXT: entry:
-// CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK15-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[K:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[J:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK15-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK15-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
-// CHECK15-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK15-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
-// CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK15-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
-// CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
-// CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK15-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
-// CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK15: omp.inner.for.cond:
-// CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK15-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP6]], [[TMP7]]
-// CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK15: omp.inner.for.body:
-// CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP8]], 10
-// CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
-// CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4
-// CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK15-NEXT: [[DIV2:%.*]] = sdiv i32 [[TMP10]], 10
-// CHECK15-NEXT: [[MUL3:%.*]] = mul nsw i32 [[DIV2]], 10
-// CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL3]]
-// CHECK15-NEXT: [[MUL4:%.*]] = mul nsw i32 [[SUB]], 1
-// CHECK15-NEXT: [[ADD5:%.*]] = add nsw i32 0, [[MUL4]]
-// CHECK15-NEXT: store i32 [[ADD5]], i32* [[J]], align 4
-// CHECK15-NEXT: store i32 10, i32* [[K]], align 4
-// CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
-// CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[J]], align 4
-// CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[F_ADDR]], align 4
-// CHECK15-NEXT: [[MUL6:%.*]] = mul nsw i32 [[TMP12]], [[TMP13]]
-// CHECK15-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP11]], [[MUL6]]
-// CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[K]], align 4
-// CHECK15-NEXT: [[ADD8:%.*]] = add nsw i32 [[ADD7]], [[TMP14]]
-// CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4
-// CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [10 x i32]], [10 x [10 x i32]]* [[TMP0]], i32 0, i32 [[TMP15]]
-// CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[J]], align 4
-// CHECK15-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP16]]
-// CHECK15-NEXT: store i32 [[ADD8]], i32* [[ARRAYIDX9]], align 4
-// CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK15: omp.body.continue:
-// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK15: omp.inner.for.inc:
-// CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK15-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
-// CHECK15-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
-// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK15: omp.inner.for.end:
-// CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK15: omp.loop.exit:
-// CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
-// CHECK15-NEXT: ret void
-// CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l67
-// CHECK15-SAME: (i32 [[N:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]]) #[[ATTR0]] {
-// CHECK15-NEXT: entry:
-// CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK15-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK15-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK15-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK15-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK15-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK15-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK15-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK15: .execute:
-// CHECK15-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK15-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
-// CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK15-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK15-NEXT: call void @__omp_outlined__8(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP3]], [10 x [10 x i32]]* [[TMP0]]) #[[ATTR3]]
-// CHECK15-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK15: .omp.deinit:
-// CHECK15-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK15-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK15: .exit:
-// CHECK15-NEXT: ret void
-// CHECK15-LABEL: define {{[^@]+}}@__omp_outlined__8
-// CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]]) #[[ATTR0]] {
-// CHECK15-NEXT: entry:
-// CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
-// CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8
-// CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[J:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i64, align 8
-// CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i64, align 8
-// CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
-// CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[I9:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[J10:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 4
-// CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK15-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK15-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK15-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK15-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
-// CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK15-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64
-// CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK15-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP4]], 0
-// CHECK15-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1
-// CHECK15-NEXT: [[CONV6:%.*]] = sext i32 [[DIV5]] to i64
-// CHECK15-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]]
-// CHECK15-NEXT: [[SUB7:%.*]] = sub nsw i64 [[MUL]], 1
-// CHECK15-NEXT: store i64 [[SUB7]], i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK15-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK15-NEXT: store i32 0, i32* [[J]], align 4
-// CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
-// CHECK15-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK15: land.lhs.true:
-// CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK15-NEXT: [[CMP8:%.*]] = icmp slt i32 0, [[TMP6]]
-// CHECK15-NEXT: br i1 [[CMP8]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
-// CHECK15: omp.precond.then:
-// CHECK15-NEXT: store i64 0, i64* [[DOTOMP_COMB_LB]], align 8
-// CHECK15-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK15-NEXT: store i64 [[TMP7]], i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK15-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8
-// CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK15-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK15-NEXT: [[CONV11:%.*]] = zext i32 [[NVPTX_NUM_THREADS]] to i64
-// CHECK15-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
-// CHECK15-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_COMB_LB]], i64* [[DOTOMP_COMB_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 [[CONV11]])
-// CHECK15-NEXT: [[TMP10:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK15-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK15-NEXT: [[CMP12:%.*]] = icmp sgt i64 [[TMP10]], [[TMP11]]
-// CHECK15-NEXT: br i1 [[CMP12]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK15: cond.true:
-// CHECK15-NEXT: [[TMP12:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK15-NEXT: br label [[COND_END:%.*]]
-// CHECK15: cond.false:
-// CHECK15-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK15-NEXT: br label [[COND_END]]
-// CHECK15: cond.end:
-// CHECK15-NEXT: [[COND:%.*]] = phi i64 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
-// CHECK15-NEXT: store i64 [[COND]], i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK15-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
-// CHECK15-NEXT: store i64 [[TMP14]], i64* [[DOTOMP_IV]], align 8
-// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK15: omp.inner.for.cond:
-// CHECK15-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK15-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK15-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP16]], 1
-// CHECK15-NEXT: [[CMP13:%.*]] = icmp slt i64 [[TMP15]], [[ADD]]
-// CHECK15-NEXT: br i1 [[CMP13]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK15: omp.inner.for.body:
-// CHECK15-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
-// CHECK15-NEXT: [[TMP18:%.*]] = trunc i64 [[TMP17]] to i32
-// CHECK15-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK15-NEXT: [[TMP20:%.*]] = trunc i64 [[TMP19]] to i32
-// CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK15-NEXT: store i32 [[TMP21]], i32* [[N_CASTED]], align 4
-// CHECK15-NEXT: [[TMP22:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK15-NEXT: [[TMP23:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK15-NEXT: [[TMP24:%.*]] = inttoptr i32 [[TMP18]] to i8*
-// CHECK15-NEXT: store i8* [[TMP24]], i8** [[TMP23]], align 4
-// CHECK15-NEXT: [[TMP25:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK15-NEXT: [[TMP26:%.*]] = inttoptr i32 [[TMP20]] to i8*
-// CHECK15-NEXT: store i8* [[TMP26]], i8** [[TMP25]], align 4
-// CHECK15-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK15-NEXT: [[TMP28:%.*]] = inttoptr i32 [[TMP22]] to i8*
-// CHECK15-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 4
-// CHECK15-NEXT: [[TMP29:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
-// CHECK15-NEXT: [[TMP30:%.*]] = bitcast [10 x [10 x i32]]* [[TMP0]] to i8*
-// CHECK15-NEXT: store i8* [[TMP30]], i8** [[TMP29]], align 4
-// CHECK15-NEXT: [[TMP31:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK15-NEXT: [[TMP32:%.*]] = load i32, i32* [[TMP31]], align 4
-// CHECK15-NEXT: [[TMP33:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK15-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP32]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [10 x [10 x i32]]*)* @__omp_outlined__9 to i8*), i8* null, i8** [[TMP33]], i32 4)
-// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK15: omp.inner.for.inc:
-// CHECK15-NEXT: [[TMP34:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK15-NEXT: [[TMP35:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8
-// CHECK15-NEXT: [[ADD14:%.*]] = add nsw i64 [[TMP34]], [[TMP35]]
-// CHECK15-NEXT: store i64 [[ADD14]], i64* [[DOTOMP_IV]], align 8
-// CHECK15-NEXT: [[TMP36:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
-// CHECK15-NEXT: [[TMP37:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8
-// CHECK15-NEXT: [[ADD15:%.*]] = add nsw i64 [[TMP36]], [[TMP37]]
-// CHECK15-NEXT: store i64 [[ADD15]], i64* [[DOTOMP_COMB_LB]], align 8
-// CHECK15-NEXT: [[TMP38:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK15-NEXT: [[TMP39:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8
-// CHECK15-NEXT: [[ADD16:%.*]] = add nsw i64 [[TMP38]], [[TMP39]]
-// CHECK15-NEXT: store i64 [[ADD16]], i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK15-NEXT: [[TMP40:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK15-NEXT: [[TMP41:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK15-NEXT: [[CMP17:%.*]] = icmp sgt i64 [[TMP40]], [[TMP41]]
-// CHECK15-NEXT: br i1 [[CMP17]], label [[COND_TRUE18:%.*]], label [[COND_FALSE19:%.*]]
-// CHECK15: cond.true18:
-// CHECK15-NEXT: [[TMP42:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK15-NEXT: br label [[COND_END20:%.*]]
-// CHECK15: cond.false19:
-// CHECK15-NEXT: [[TMP43:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK15-NEXT: br label [[COND_END20]]
-// CHECK15: cond.end20:
-// CHECK15-NEXT: [[COND21:%.*]] = phi i64 [ [[TMP42]], [[COND_TRUE18]] ], [ [[TMP43]], [[COND_FALSE19]] ]
-// CHECK15-NEXT: store i64 [[COND21]], i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK15-NEXT: [[TMP44:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
-// CHECK15-NEXT: store i64 [[TMP44]], i64* [[DOTOMP_IV]], align 8
-// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK15: omp.inner.for.end:
-// CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK15: omp.loop.exit:
-// CHECK15-NEXT: [[TMP45:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK15-NEXT: [[TMP46:%.*]] = load i32, i32* [[TMP45]], align 4
-// CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP46]])
-// CHECK15-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK15: omp.precond.end:
-// CHECK15-NEXT: ret void
-// CHECK15-LABEL: define {{[^@]+}}@__omp_outlined__9
-// CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]]) #[[ATTR0]] {
-// CHECK15-NEXT: entry:
-// CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
-// CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8
-// CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[J:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8
-// CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8
-// CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
-// CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[I11:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[J12:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK15-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK15-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK15-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK15-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
-// CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK15-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64
-// CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK15-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP4]], 0
-// CHECK15-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1
-// CHECK15-NEXT: [[CONV6:%.*]] = sext i32 [[DIV5]] to i64
-// CHECK15-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]]
-// CHECK15-NEXT: [[SUB7:%.*]] = sub nsw i64 [[MUL]], 1
-// CHECK15-NEXT: store i64 [[SUB7]], i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK15-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK15-NEXT: store i32 0, i32* [[J]], align 4
-// CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
-// CHECK15-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK15: land.lhs.true:
-// CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK15-NEXT: [[CMP8:%.*]] = icmp slt i32 0, [[TMP6]]
-// CHECK15-NEXT: br i1 [[CMP8]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
-// CHECK15: omp.precond.then:
-// CHECK15-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8
-// CHECK15-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK15-NEXT: store i64 [[TMP7]], i64* [[DOTOMP_UB]], align 8
-// CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK15-NEXT: [[CONV9:%.*]] = zext i32 [[TMP8]] to i64
-// CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK15-NEXT: [[CONV10:%.*]] = zext i32 [[TMP9]] to i64
-// CHECK15-NEXT: store i64 [[CONV9]], i64* [[DOTOMP_LB]], align 8
-// CHECK15-NEXT: store i64 [[CONV10]], i64* [[DOTOMP_UB]], align 8
-// CHECK15-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8
-// CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK15-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
-// CHECK15-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 33, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_LB]], i64* [[DOTOMP_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1)
-// CHECK15-NEXT: [[TMP12:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8
-// CHECK15-NEXT: store i64 [[TMP12]], i64* [[DOTOMP_IV]], align 8
-// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK15: omp.inner.for.cond:
-// CHECK15-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK15-NEXT: [[CONV13:%.*]] = zext i32 [[TMP14]] to i64
-// CHECK15-NEXT: [[CMP14:%.*]] = icmp sle i64 [[TMP13]], [[CONV13]]
-// CHECK15-NEXT: br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK15: omp.inner.for.body:
-// CHECK15-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK15-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP16]], 0
-// CHECK15-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1
-// CHECK15-NEXT: [[MUL17:%.*]] = mul nsw i32 1, [[DIV16]]
-// CHECK15-NEXT: [[CONV18:%.*]] = sext i32 [[MUL17]] to i64
-// CHECK15-NEXT: [[DIV19:%.*]] = sdiv i64 [[TMP15]], [[CONV18]]
-// CHECK15-NEXT: [[MUL20:%.*]] = mul nsw i64 [[DIV19]], 1
-// CHECK15-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL20]]
-// CHECK15-NEXT: [[CONV21:%.*]] = trunc i64 [[ADD]] to i32
-// CHECK15-NEXT: store i32 [[CONV21]], i32* [[I11]], align 4
-// CHECK15-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK15-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK15-NEXT: [[SUB22:%.*]] = sub nsw i32 [[TMP19]], 0
-// CHECK15-NEXT: [[DIV23:%.*]] = sdiv i32 [[SUB22]], 1
-// CHECK15-NEXT: [[MUL24:%.*]] = mul nsw i32 1, [[DIV23]]
-// CHECK15-NEXT: [[CONV25:%.*]] = sext i32 [[MUL24]] to i64
-// CHECK15-NEXT: [[DIV26:%.*]] = sdiv i64 [[TMP18]], [[CONV25]]
-// CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK15-NEXT: [[SUB27:%.*]] = sub nsw i32 [[TMP20]], 0
-// CHECK15-NEXT: [[DIV28:%.*]] = sdiv i32 [[SUB27]], 1
-// CHECK15-NEXT: [[MUL29:%.*]] = mul nsw i32 1, [[DIV28]]
-// CHECK15-NEXT: [[CONV30:%.*]] = sext i32 [[MUL29]] to i64
-// CHECK15-NEXT: [[MUL31:%.*]] = mul nsw i64 [[DIV26]], [[CONV30]]
-// CHECK15-NEXT: [[SUB32:%.*]] = sub nsw i64 [[TMP17]], [[MUL31]]
-// CHECK15-NEXT: [[MUL33:%.*]] = mul nsw i64 [[SUB32]], 1
-// CHECK15-NEXT: [[ADD34:%.*]] = add nsw i64 0, [[MUL33]]
-// CHECK15-NEXT: [[CONV35:%.*]] = trunc i64 [[ADD34]] to i32
-// CHECK15-NEXT: store i32 [[CONV35]], i32* [[J12]], align 4
-// CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[I11]], align 4
-// CHECK15-NEXT: [[TMP22:%.*]] = load i32, i32* [[J12]], align 4
-// CHECK15-NEXT: [[ADD36:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
-// CHECK15-NEXT: [[TMP23:%.*]] = load i32, i32* [[I11]], align 4
-// CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [10 x i32]], [10 x [10 x i32]]* [[TMP0]], i32 0, i32 [[TMP23]]
-// CHECK15-NEXT: [[TMP24:%.*]] = load i32, i32* [[J12]], align 4
-// CHECK15-NEXT: [[ARRAYIDX37:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP24]]
-// CHECK15-NEXT: store i32 [[ADD36]], i32* [[ARRAYIDX37]], align 4
-// CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK15: omp.body.continue:
-// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK15: omp.inner.for.inc:
-// CHECK15-NEXT: [[TMP25:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK15-NEXT: [[TMP26:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8
-// CHECK15-NEXT: [[ADD38:%.*]] = add nsw i64 [[TMP25]], [[TMP26]]
-// CHECK15-NEXT: store i64 [[ADD38]], i64* [[DOTOMP_IV]], align 8
-// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK15: omp.inner.for.end:
-// CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK15: omp.loop.exit:
-// CHECK15-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK15-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4
-// CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP28]])
-// CHECK15-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK15: omp.precond.end:
-// CHECK15-NEXT: ret void
-// CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l74
-// CHECK15-SAME: (i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* [[V:%.*]]) #[[ATTR0]] {
-// CHECK15-NEXT: entry:
-// CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK15-NEXT: [[V_ADDR:%.*]] = alloca i32*, align 4
-// CHECK15-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK15-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK15-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK15-NEXT: store i32* [[V]], i32** [[V_ADDR]], align 4
-// CHECK15-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK15-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK15-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK15-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK15: .execute:
-// CHECK15-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK15-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
-// CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK15-NEXT: [[TMP4:%.*]] = load i32*, i32** [[V_ADDR]], align 4
-// CHECK15-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK15-NEXT: call void @__omp_outlined__10(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP3]], [1000 x i32]* [[TMP0]], i32* [[TMP4]]) #[[ATTR3]]
-// CHECK15-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK15: .omp.deinit:
-// CHECK15-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK15-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK15: .exit:
-// CHECK15-NEXT: ret void
-// CHECK15-LABEL: define {{[^@]+}}@__omp_outlined__10
-// CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* [[V:%.*]]) #[[ATTR0]] {
-// CHECK15-NEXT: entry:
-// CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK15-NEXT: [[V_ADDR:%.*]] = alloca i32*, align 4
-// CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [5 x i8*], align 4
-// CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK15-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK15-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK15-NEXT: store i32* [[V]], i32** [[V_ADDR]], align 4
-// CHECK15-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK15-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK15-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK15: omp.precond.then:
-// CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK15-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK15-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK15-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
-// CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK15-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
-// CHECK15-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK15: cond.true:
-// CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK15-NEXT: br label [[COND_END:%.*]]
-// CHECK15: cond.false:
-// CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK15-NEXT: br label [[COND_END]]
-// CHECK15: cond.end:
-// CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
-// CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK15-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
-// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK15: omp.inner.for.cond:
-// CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1
-// CHECK15-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]
-// CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK15: omp.inner.for.body:
-// CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK15-NEXT: store i32 [[TMP16]], i32* [[N_CASTED]], align 4
-// CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK15-NEXT: [[TMP18:%.*]] = load i32*, i32** [[V_ADDR]], align 4
-// CHECK15-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK15-NEXT: [[TMP20:%.*]] = inttoptr i32 [[TMP14]] to i8*
-// CHECK15-NEXT: store i8* [[TMP20]], i8** [[TMP19]], align 4
-// CHECK15-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK15-NEXT: [[TMP22:%.*]] = inttoptr i32 [[TMP15]] to i8*
-// CHECK15-NEXT: store i8* [[TMP22]], i8** [[TMP21]], align 4
-// CHECK15-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK15-NEXT: [[TMP24:%.*]] = inttoptr i32 [[TMP17]] to i8*
-// CHECK15-NEXT: store i8* [[TMP24]], i8** [[TMP23]], align 4
-// CHECK15-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
-// CHECK15-NEXT: [[TMP26:%.*]] = bitcast [1000 x i32]* [[TMP0]] to i8*
-// CHECK15-NEXT: store i8* [[TMP26]], i8** [[TMP25]], align 4
-// CHECK15-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 4
-// CHECK15-NEXT: [[TMP28:%.*]] = bitcast i32* [[TMP18]] to i8*
-// CHECK15-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 4
-// CHECK15-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK15-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4
-// CHECK15-NEXT: [[TMP31:%.*]] = bitcast [5 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK15-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP30]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i32]*, i32*)* @__omp_outlined__11 to i8*), i8* null, i8** [[TMP31]], i32 5)
-// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK15: omp.inner.for.inc:
-// CHECK15-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK15-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK15-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP32]], [[TMP33]]
-// CHECK15-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
-// CHECK15-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK15-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK15-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP34]], [[TMP35]]
-// CHECK15-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK15-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK15-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK15-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP36]], [[TMP37]]
-// CHECK15-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK15-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK15-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK15-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP38]], [[TMP39]]
-// CHECK15-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]]
-// CHECK15: cond.true10:
-// CHECK15-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK15-NEXT: br label [[COND_END12:%.*]]
-// CHECK15: cond.false11:
-// CHECK15-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK15-NEXT: br label [[COND_END12]]
-// CHECK15: cond.end12:
-// CHECK15-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP40]], [[COND_TRUE10]] ], [ [[TMP41]], [[COND_FALSE11]] ]
-// CHECK15-NEXT: store i32 [[COND13]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK15-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK15-NEXT: store i32 [[TMP42]], i32* [[DOTOMP_IV]], align 4
-// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK15: omp.inner.for.end:
-// CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK15: omp.loop.exit:
-// CHECK15-NEXT: [[TMP43:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK15-NEXT: [[TMP44:%.*]] = load i32, i32* [[TMP43]], align 4
-// CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP44]])
-// CHECK15-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK15: omp.precond.end:
-// CHECK15-NEXT: ret void
-// CHECK15-LABEL: define {{[^@]+}}@__omp_outlined__11
-// CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* [[V:%.*]]) #[[ATTR0]] {
-// CHECK15-NEXT: entry:
-// CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK15-NEXT: [[V_ADDR:%.*]] = alloca i32*, align 4
-// CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK15-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK15-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK15-NEXT: store i32* [[V]], i32** [[V_ADDR]], align 4
-// CHECK15-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK15-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK15-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK15: omp.precond.then:
-// CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK15-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
-// CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
-// CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
-// CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK15-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK15-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
-// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK15: omp.inner.for.cond:
-// CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK15-NEXT: [[CMP4:%.*]] = icmp ule i32 [[TMP10]], [[TMP11]]
-// CHECK15-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK15: omp.inner.for.body:
-// CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
-// CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK15-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
-// CHECK15-NEXT: [[TMP13:%.*]] = load i32*, i32** [[V_ADDR]], align 4
-// CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[I3]], align 4
-// CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP13]], i32 [[TMP14]]
-// CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
-// CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4
-// CHECK15-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 [[TMP16]]
-// CHECK15-NEXT: store i32 [[TMP15]], i32* [[ARRAYIDX5]], align 4
-// CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK15: omp.body.continue:
-// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK15: omp.inner.for.inc:
-// CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK15-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
-// CHECK15-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
-// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK15: omp.inner.for.end:
-// CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK15: omp.loop.exit:
-// CHECK15-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4
-// CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]])
-// CHECK15-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK15: omp.precond.end:
-// CHECK15-NEXT: ret void
-// CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l43
-// CHECK16-SAME: (i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0:[0-9]+]] {
-// CHECK16-NEXT: entry:
-// CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK16-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[L_CASTED:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK16-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK16-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK16-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
-// CHECK16-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK16-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK16-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK16-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK16: .execute:
-// CHECK16-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]])
-// CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK16-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
-// CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[L_ADDR]], align 4
-// CHECK16-NEXT: store i32 [[TMP4]], i32* [[L_CASTED]], align 4
-// CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[L_CASTED]], align 4
-// CHECK16-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK16-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP3]], [1000 x i32]* [[TMP0]], i32 [[TMP5]]) #[[ATTR3:[0-9]+]]
-// CHECK16-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK16: .omp.deinit:
-// CHECK16-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK16-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK16: .exit:
-// CHECK16-NEXT: ret void
-// CHECK16-LABEL: define {{[^@]+}}@__omp_outlined__
-// CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0]] {
-// CHECK16-NEXT: entry:
-// CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK16-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[I4:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[L_CASTED:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [5 x i8*], align 4
-// CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK16-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK16-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK16-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
-// CHECK16-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK16-NEXT: [[TMP1:%.*]] = call i8* @__kmpc_data_sharing_push_stack(i32 4, i16 1)
-// CHECK16-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to %struct._globalized_locals_ty*
-// CHECK16-NEXT: [[L1:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY:%.*]], %struct._globalized_locals_ty* [[TMP2]], i32 0, i32 0
-// CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK16-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK16-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
-// CHECK16-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK16-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK16-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK16-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
-// CHECK16-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK16: omp.precond.then:
-// CHECK16-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK16-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK16-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK16-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 128)
-// CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK16-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
-// CHECK16-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK16: cond.true:
-// CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK16-NEXT: br label [[COND_END:%.*]]
-// CHECK16: cond.false:
-// CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK16-NEXT: br label [[COND_END]]
-// CHECK16: cond.end:
-// CHECK16-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
-// CHECK16-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK16-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
-// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK16: omp.inner.for.cond:
-// CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK16-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], 1
-// CHECK16-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP14]], [[ADD]]
-// CHECK16-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK16: omp.inner.for.body:
-// CHECK16-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK16-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK16-NEXT: [[TMP18:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK16-NEXT: store i32 [[TMP18]], i32* [[N_CASTED]], align 4
-// CHECK16-NEXT: [[TMP19:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK16-NEXT: [[TMP20:%.*]] = load i32, i32* [[L_ADDR]], align 4
-// CHECK16-NEXT: store i32 [[TMP20]], i32* [[L_CASTED]], align 4
-// CHECK16-NEXT: [[TMP21:%.*]] = load i32, i32* [[L_CASTED]], align 4
-// CHECK16-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK16-NEXT: [[TMP23:%.*]] = inttoptr i32 [[TMP16]] to i8*
-// CHECK16-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 4
-// CHECK16-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK16-NEXT: [[TMP25:%.*]] = inttoptr i32 [[TMP17]] to i8*
-// CHECK16-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 4
-// CHECK16-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK16-NEXT: [[TMP27:%.*]] = inttoptr i32 [[TMP19]] to i8*
-// CHECK16-NEXT: store i8* [[TMP27]], i8** [[TMP26]], align 4
-// CHECK16-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
-// CHECK16-NEXT: [[TMP29:%.*]] = bitcast [1000 x i32]* [[TMP0]] to i8*
-// CHECK16-NEXT: store i8* [[TMP29]], i8** [[TMP28]], align 4
-// CHECK16-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 4
-// CHECK16-NEXT: [[TMP31:%.*]] = inttoptr i32 [[TMP21]] to i8*
-// CHECK16-NEXT: store i8* [[TMP31]], i8** [[TMP30]], align 4
-// CHECK16-NEXT: [[TMP32:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK16-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4
-// CHECK16-NEXT: [[TMP34:%.*]] = bitcast [5 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK16-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP33]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i32]*, i32)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP34]], i32 5)
-// CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK16: omp.inner.for.inc:
-// CHECK16-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK16-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK16-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP35]], [[TMP36]]
-// CHECK16-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
-// CHECK16-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK16-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK16-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP37]], [[TMP38]]
-// CHECK16-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK16-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK16-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK16-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP39]], [[TMP40]]
-// CHECK16-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK16-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK16-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK16-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP41]], [[TMP42]]
-// CHECK16-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
-// CHECK16: cond.true11:
-// CHECK16-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK16-NEXT: br label [[COND_END13:%.*]]
-// CHECK16: cond.false12:
-// CHECK16-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK16-NEXT: br label [[COND_END13]]
-// CHECK16: cond.end13:
-// CHECK16-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP43]], [[COND_TRUE11]] ], [ [[TMP44]], [[COND_FALSE12]] ]
-// CHECK16-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK16-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK16-NEXT: store i32 [[TMP45]], i32* [[DOTOMP_IV]], align 4
-// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK16: omp.inner.for.end:
-// CHECK16-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK16: omp.loop.exit:
-// CHECK16-NEXT: [[TMP46:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK16-NEXT: [[TMP47:%.*]] = load i32, i32* [[TMP46]], align 4
-// CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP47]])
-// CHECK16-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK16-NEXT: [[TMP49:%.*]] = icmp ne i32 [[TMP48]], 0
-// CHECK16-NEXT: br i1 [[TMP49]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
-// CHECK16: .omp.lastprivate.then:
-// CHECK16-NEXT: [[TMP50:%.*]] = load i32, i32* [[L_ADDR]], align 4
-// CHECK16-NEXT: store i32 [[TMP50]], i32* [[L_ADDR]], align 4
-// CHECK16-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
-// CHECK16: .omp.lastprivate.done:
-// CHECK16-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK16: omp.precond.end:
-// CHECK16-NEXT: call void @__kmpc_data_sharing_pop_stack(i8* [[TMP1]])
-// CHECK16-NEXT: ret void
-// CHECK16-LABEL: define {{[^@]+}}@__omp_outlined__1
-// CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0]] {
-// CHECK16-NEXT: entry:
-// CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK16-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK16-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK16-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK16-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK16-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK16-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK16-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
-// CHECK16-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK16-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK16-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK16-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK16-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK16-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK16-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK16-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK16: omp.precond.then:
-// CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK16-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
-// CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK16-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
-// CHECK16-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
-// CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK16-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK16-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 32)
-// CHECK16-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
-// CHECK16: omp.dispatch.cond:
-// CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK16-NEXT: [[CMP4:%.*]] = icmp ugt i32 [[TMP9]], [[TMP10]]
-// CHECK16-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK16: cond.true:
-// CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK16-NEXT: br label [[COND_END:%.*]]
-// CHECK16: cond.false:
-// CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK16-NEXT: br label [[COND_END]]
-// CHECK16: cond.end:
-// CHECK16-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
-// CHECK16-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
-// CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK16-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
-// CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK16-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK16-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
-// CHECK16-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
-// CHECK16: omp.dispatch.body:
-// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK16: omp.inner.for.cond:
-// CHECK16-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK16-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK16-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
-// CHECK16-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK16: omp.inner.for.body:
-// CHECK16-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
-// CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK16-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
-// CHECK16-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4
-// CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 [[TMP19]]
-// CHECK16-NEXT: store i32 1, i32* [[ARRAYIDX]], align 4
-// CHECK16-NEXT: [[TMP20:%.*]] = load i32, i32* [[I3]], align 4
-// CHECK16-NEXT: store i32 [[TMP20]], i32* [[L_ADDR]], align 4
-// CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK16: omp.body.continue:
-// CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK16: omp.inner.for.inc:
-// CHECK16-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK16-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP21]], 1
-// CHECK16-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
-// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK16: omp.inner.for.end:
-// CHECK16-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
-// CHECK16: omp.dispatch.inc:
-// CHECK16-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK16-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK16-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
-// CHECK16-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4
-// CHECK16-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK16-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK16-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
-// CHECK16-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4
-// CHECK16-NEXT: br label [[OMP_DISPATCH_COND]]
-// CHECK16: omp.dispatch.end:
-// CHECK16-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK16-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
-// CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP27]])
-// CHECK16-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK16-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
-// CHECK16-NEXT: br i1 [[TMP29]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
-// CHECK16: .omp.lastprivate.then:
-// CHECK16-NEXT: [[TMP30:%.*]] = load i32, i32* [[L_ADDR]], align 4
-// CHECK16-NEXT: store i32 [[TMP30]], i32* [[L_ADDR]], align 4
-// CHECK16-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
-// CHECK16: .omp.lastprivate.done:
-// CHECK16-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK16: omp.precond.end:
-// CHECK16-NEXT: ret void
-// CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l49
-// CHECK16-SAME: (i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
-// CHECK16-NEXT: entry:
-// CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
-// CHECK16-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK16-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK16-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK16-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK16-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK16-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK16-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK16: .execute:
-// CHECK16-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK16-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
-// CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK16-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK16-NEXT: call void @__omp_outlined__2(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP3]], [1000 x i16]* [[TMP0]]) #[[ATTR3]]
-// CHECK16-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK16: .omp.deinit:
-// CHECK16-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK16-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK16: .exit:
-// CHECK16-NEXT: ret void
-// CHECK16-LABEL: define {{[^@]+}}@__omp_outlined__2
-// CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
-// CHECK16-NEXT: entry:
-// CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
-// CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 4
-// CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK16-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK16-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK16-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK16-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK16-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK16-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK16-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK16-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK16-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK16-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK16: omp.precond.then:
-// CHECK16-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK16-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK16-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK16-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
-// CHECK16-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK16-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
-// CHECK16-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK16: cond.true:
-// CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK16-NEXT: br label [[COND_END:%.*]]
-// CHECK16: cond.false:
-// CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK16-NEXT: br label [[COND_END]]
-// CHECK16: cond.end:
-// CHECK16-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
-// CHECK16-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK16-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
-// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK16: omp.inner.for.cond:
-// CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1
-// CHECK16-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]
-// CHECK16-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK16: omp.inner.for.body:
-// CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK16-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK16-NEXT: [[TMP16:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK16-NEXT: store i32 [[TMP16]], i32* [[N_CASTED]], align 4
-// CHECK16-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK16-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK16-NEXT: [[TMP19:%.*]] = inttoptr i32 [[TMP14]] to i8*
-// CHECK16-NEXT: store i8* [[TMP19]], i8** [[TMP18]], align 4
-// CHECK16-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK16-NEXT: [[TMP21:%.*]] = inttoptr i32 [[TMP15]] to i8*
-// CHECK16-NEXT: store i8* [[TMP21]], i8** [[TMP20]], align 4
-// CHECK16-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK16-NEXT: [[TMP23:%.*]] = inttoptr i32 [[TMP17]] to i8*
-// CHECK16-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 4
-// CHECK16-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
-// CHECK16-NEXT: [[TMP25:%.*]] = bitcast [1000 x i16]* [[TMP0]] to i8*
-// CHECK16-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 4
-// CHECK16-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK16-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
-// CHECK16-NEXT: [[TMP28:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK16-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP27]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i16]*)* @__omp_outlined__3 to i8*), i8* null, i8** [[TMP28]], i32 4)
-// CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK16: omp.inner.for.inc:
-// CHECK16-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK16-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK16-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP29]], [[TMP30]]
-// CHECK16-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
-// CHECK16-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK16-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK16-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP31]], [[TMP32]]
-// CHECK16-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK16-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK16-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK16-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP33]], [[TMP34]]
-// CHECK16-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK16-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK16-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK16-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP35]], [[TMP36]]
-// CHECK16-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]]
-// CHECK16: cond.true10:
-// CHECK16-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK16-NEXT: br label [[COND_END12:%.*]]
-// CHECK16: cond.false11:
-// CHECK16-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK16-NEXT: br label [[COND_END12]]
-// CHECK16: cond.end12:
-// CHECK16-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP37]], [[COND_TRUE10]] ], [ [[TMP38]], [[COND_FALSE11]] ]
-// CHECK16-NEXT: store i32 [[COND13]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK16-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK16-NEXT: store i32 [[TMP39]], i32* [[DOTOMP_IV]], align 4
-// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK16: omp.inner.for.end:
-// CHECK16-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK16: omp.loop.exit:
-// CHECK16-NEXT: [[TMP40:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK16-NEXT: [[TMP41:%.*]] = load i32, i32* [[TMP40]], align 4
-// CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP41]])
-// CHECK16-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK16: omp.precond.end:
-// CHECK16-NEXT: ret void
-// CHECK16-LABEL: define {{[^@]+}}@__omp_outlined__3
-// CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
-// CHECK16-NEXT: entry:
-// CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK16-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
-// CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK16-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK16-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK16-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK16-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK16-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK16-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK16-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK16-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK16-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK16-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK16-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK16-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK16: omp.precond.then:
-// CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK16-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
-// CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK16-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
-// CHECK16-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
-// CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK16-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK16-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK16-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
-// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK16: omp.inner.for.cond:
-// CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK16-NEXT: [[CMP4:%.*]] = icmp ule i32 [[TMP10]], [[TMP11]]
-// CHECK16-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK16: omp.inner.for.body:
-// CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
-// CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK16-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
-// CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[I3]], align 4
-// CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i16], [1000 x i16]* [[TMP0]], i32 0, i32 [[TMP13]]
-// CHECK16-NEXT: [[TMP14:%.*]] = load i16, i16* [[ARRAYIDX]], align 2
-// CHECK16-NEXT: [[CONV:%.*]] = sext i16 [[TMP14]] to i32
-// CHECK16-NEXT: [[ADD5:%.*]] = add nsw i32 [[CONV]], 1
-// CHECK16-NEXT: [[CONV6:%.*]] = trunc i32 [[ADD5]] to i16
-// CHECK16-NEXT: store i16 [[CONV6]], i16* [[ARRAYIDX]], align 2
-// CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK16: omp.body.continue:
-// CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK16: omp.inner.for.inc:
-// CHECK16-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK16-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK16-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
-// CHECK16-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
-// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK16: omp.inner.for.end:
-// CHECK16-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK16: omp.loop.exit:
-// CHECK16-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK16-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
-// CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]])
-// CHECK16-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK16: omp.precond.end:
-// CHECK16-NEXT: ret void
-// CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l54
-// CHECK16-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
-// CHECK16-NEXT: entry:
-// CHECK16-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
-// CHECK16-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK16-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
-// CHECK16-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
-// CHECK16-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK16-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK16-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK16: .execute:
-// CHECK16-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK16-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK16-NEXT: call void @__omp_outlined__4(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x i32]* [[TMP0]]) #[[ATTR3]]
-// CHECK16-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK16: .omp.deinit:
-// CHECK16-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK16-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK16: .exit:
-// CHECK16-NEXT: ret void
-// CHECK16-LABEL: define {{[^@]+}}@__omp_outlined__4
-// CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
-// CHECK16-NEXT: entry:
-// CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK16-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
-// CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [3 x i8*], align 4
-// CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK16-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
-// CHECK16-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
-// CHECK16-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK16-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK16-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK16-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
-// CHECK16-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK16-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
-// CHECK16-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK16: cond.true:
-// CHECK16-NEXT: br label [[COND_END:%.*]]
-// CHECK16: cond.false:
-// CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK16-NEXT: br label [[COND_END]]
-// CHECK16: cond.end:
-// CHECK16-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
-// CHECK16-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK16-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK16: omp.inner.for.cond:
-// CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK16-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP6]], 10
-// CHECK16-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK16: omp.inner.for.body:
-// CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK16-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK16-NEXT: [[TMP10:%.*]] = inttoptr i32 [[TMP7]] to i8*
-// CHECK16-NEXT: store i8* [[TMP10]], i8** [[TMP9]], align 4
-// CHECK16-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK16-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP8]] to i8*
-// CHECK16-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 4
-// CHECK16-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK16-NEXT: [[TMP14:%.*]] = bitcast [10 x i32]* [[TMP0]] to i8*
-// CHECK16-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 4
-// CHECK16-NEXT: [[TMP15:%.*]] = bitcast [3 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK16-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @__omp_outlined__5 to i8*), i8* null, i8** [[TMP15]], i32 3)
-// CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK16: omp.inner.for.inc:
-// CHECK16-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK16-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
-// CHECK16-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
-// CHECK16-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK16-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK16-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
-// CHECK16-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK16-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK16-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK16-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
-// CHECK16-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK16-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK16-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP22]], 9
-// CHECK16-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
-// CHECK16: cond.true5:
-// CHECK16-NEXT: br label [[COND_END7:%.*]]
-// CHECK16: cond.false6:
-// CHECK16-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK16-NEXT: br label [[COND_END7]]
-// CHECK16: cond.end7:
-// CHECK16-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP23]], [[COND_FALSE6]] ]
-// CHECK16-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK16-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK16-NEXT: store i32 [[TMP24]], i32* [[DOTOMP_IV]], align 4
-// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK16: omp.inner.for.end:
-// CHECK16-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK16: omp.loop.exit:
-// CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
-// CHECK16-NEXT: ret void
-// CHECK16-LABEL: define {{[^@]+}}@__omp_outlined__5
-// CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
-// CHECK16-NEXT: entry:
-// CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK16-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
-// CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK16-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK16-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK16-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
-// CHECK16-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
-// CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK16-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
-// CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK16-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
-// CHECK16-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
-// CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK16-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
-// CHECK16-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK16-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK16: omp.inner.for.cond:
-// CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK16-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP6]], [[TMP7]]
-// CHECK16-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK16: omp.inner.for.body:
-// CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
-// CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK16-NEXT: store i32 [[ADD]], i32* [[I]], align 4
-// CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
-// CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]]
-// CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
-// CHECK16-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP10]], 1
-// CHECK16-NEXT: store i32 [[ADD1]], i32* [[ARRAYIDX]], align 4
-// CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK16: omp.body.continue:
-// CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK16: omp.inner.for.inc:
-// CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK16-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
-// CHECK16-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
-// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK16: omp.inner.for.end:
-// CHECK16-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK16: omp.loop.exit:
-// CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
-// CHECK16-NEXT: ret void
-// CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l59
-// CHECK16-SAME: ([10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
-// CHECK16-NEXT: entry:
-// CHECK16-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK16-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[F_CASTED:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK16-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK16-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
-// CHECK16-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK16-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK16-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK16-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK16: .execute:
-// CHECK16-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[F_ADDR]], align 4
-// CHECK16-NEXT: store i32 [[TMP2]], i32* [[F_CASTED]], align 4
-// CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[F_CASTED]], align 4
-// CHECK16-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK16-NEXT: call void @__omp_outlined__6(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x [10 x i32]]* [[TMP0]], i32 [[TMP3]]) #[[ATTR3]]
-// CHECK16-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK16: .omp.deinit:
-// CHECK16-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK16-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK16: .exit:
-// CHECK16-NEXT: ret void
-// CHECK16-LABEL: define {{[^@]+}}@__omp_outlined__6
-// CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
-// CHECK16-NEXT: entry:
-// CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK16-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK16-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[K:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[J:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[F_CASTED:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 4
-// CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK16-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK16-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
-// CHECK16-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK16-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK16-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK16-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK16-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
-// CHECK16-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK16-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
-// CHECK16-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK16: cond.true:
-// CHECK16-NEXT: br label [[COND_END:%.*]]
-// CHECK16: cond.false:
-// CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK16-NEXT: br label [[COND_END]]
-// CHECK16: cond.end:
-// CHECK16-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
-// CHECK16-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK16-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK16: omp.inner.for.cond:
-// CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK16-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP6]], 100
-// CHECK16-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK16: omp.inner.for.body:
-// CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[F_ADDR]], align 4
-// CHECK16-NEXT: store i32 [[TMP9]], i32* [[F_CASTED]], align 4
-// CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[F_CASTED]], align 4
-// CHECK16-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK16-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP7]] to i8*
-// CHECK16-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 4
-// CHECK16-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK16-NEXT: [[TMP14:%.*]] = inttoptr i32 [[TMP8]] to i8*
-// CHECK16-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 4
-// CHECK16-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK16-NEXT: [[TMP16:%.*]] = bitcast [10 x [10 x i32]]* [[TMP0]] to i8*
-// CHECK16-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 4
-// CHECK16-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
-// CHECK16-NEXT: [[TMP18:%.*]] = inttoptr i32 [[TMP10]] to i8*
-// CHECK16-NEXT: store i8* [[TMP18]], i8** [[TMP17]], align 4
-// CHECK16-NEXT: [[TMP19:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK16-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, [10 x [10 x i32]]*, i32)* @__omp_outlined__7 to i8*), i8* null, i8** [[TMP19]], i32 4)
-// CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK16: omp.inner.for.inc:
-// CHECK16-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK16-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
-// CHECK16-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
-// CHECK16-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK16-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK16-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
-// CHECK16-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK16-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK16-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK16-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
-// CHECK16-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK16-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK16-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP26]], 99
-// CHECK16-NEXT: br i1 [[CMP5]], label [[COND_TRUE6:%.*]], label [[COND_FALSE7:%.*]]
-// CHECK16: cond.true6:
-// CHECK16-NEXT: br label [[COND_END8:%.*]]
-// CHECK16: cond.false7:
-// CHECK16-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK16-NEXT: br label [[COND_END8]]
-// CHECK16: cond.end8:
-// CHECK16-NEXT: [[COND9:%.*]] = phi i32 [ 99, [[COND_TRUE6]] ], [ [[TMP27]], [[COND_FALSE7]] ]
-// CHECK16-NEXT: store i32 [[COND9]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK16-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK16-NEXT: store i32 [[TMP28]], i32* [[DOTOMP_IV]], align 4
-// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK16: omp.inner.for.end:
-// CHECK16-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK16: omp.loop.exit:
-// CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
-// CHECK16-NEXT: ret void
-// CHECK16-LABEL: define {{[^@]+}}@__omp_outlined__7
-// CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
-// CHECK16-NEXT: entry:
-// CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK16-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK16-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[K:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[J:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK16-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK16-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK16-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK16-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
-// CHECK16-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK16-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
-// CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK16-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
-// CHECK16-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
-// CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK16-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
-// CHECK16-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK16-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK16: omp.inner.for.cond:
-// CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK16-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP6]], [[TMP7]]
-// CHECK16-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK16: omp.inner.for.body:
-// CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK16-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP8]], 10
-// CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
-// CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK16-NEXT: store i32 [[ADD]], i32* [[I]], align 4
-// CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK16-NEXT: [[DIV2:%.*]] = sdiv i32 [[TMP10]], 10
-// CHECK16-NEXT: [[MUL3:%.*]] = mul nsw i32 [[DIV2]], 10
-// CHECK16-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL3]]
-// CHECK16-NEXT: [[MUL4:%.*]] = mul nsw i32 [[SUB]], 1
-// CHECK16-NEXT: [[ADD5:%.*]] = add nsw i32 0, [[MUL4]]
-// CHECK16-NEXT: store i32 [[ADD5]], i32* [[J]], align 4
-// CHECK16-NEXT: store i32 10, i32* [[K]], align 4
-// CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
-// CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[J]], align 4
-// CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[F_ADDR]], align 4
-// CHECK16-NEXT: [[MUL6:%.*]] = mul nsw i32 [[TMP12]], [[TMP13]]
-// CHECK16-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP11]], [[MUL6]]
-// CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[K]], align 4
-// CHECK16-NEXT: [[ADD8:%.*]] = add nsw i32 [[ADD7]], [[TMP14]]
-// CHECK16-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4
-// CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [10 x i32]], [10 x [10 x i32]]* [[TMP0]], i32 0, i32 [[TMP15]]
-// CHECK16-NEXT: [[TMP16:%.*]] = load i32, i32* [[J]], align 4
-// CHECK16-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP16]]
-// CHECK16-NEXT: store i32 [[ADD8]], i32* [[ARRAYIDX9]], align 4
-// CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK16: omp.body.continue:
-// CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK16: omp.inner.for.inc:
-// CHECK16-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK16-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK16-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
-// CHECK16-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
-// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK16: omp.inner.for.end:
-// CHECK16-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK16: omp.loop.exit:
-// CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
-// CHECK16-NEXT: ret void
-// CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l67
-// CHECK16-SAME: (i32 [[N:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]]) #[[ATTR0]] {
-// CHECK16-NEXT: entry:
-// CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK16-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK16-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK16-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK16-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK16-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK16-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK16-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK16: .execute:
-// CHECK16-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK16-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
-// CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK16-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK16-NEXT: call void @__omp_outlined__8(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP3]], [10 x [10 x i32]]* [[TMP0]]) #[[ATTR3]]
-// CHECK16-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK16: .omp.deinit:
-// CHECK16-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK16-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK16: .exit:
-// CHECK16-NEXT: ret void
-// CHECK16-LABEL: define {{[^@]+}}@__omp_outlined__8
-// CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]]) #[[ATTR0]] {
-// CHECK16-NEXT: entry:
-// CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
-// CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8
-// CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[J:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i64, align 8
-// CHECK16-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i64, align 8
-// CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
-// CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[I9:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[J10:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 4
-// CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK16-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK16-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK16-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK16-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK16-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK16-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
-// CHECK16-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK16-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64
-// CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK16-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP4]], 0
-// CHECK16-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1
-// CHECK16-NEXT: [[CONV6:%.*]] = sext i32 [[DIV5]] to i64
-// CHECK16-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]]
-// CHECK16-NEXT: [[SUB7:%.*]] = sub nsw i64 [[MUL]], 1
-// CHECK16-NEXT: store i64 [[SUB7]], i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK16-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK16-NEXT: store i32 0, i32* [[J]], align 4
-// CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
-// CHECK16-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK16: land.lhs.true:
-// CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK16-NEXT: [[CMP8:%.*]] = icmp slt i32 0, [[TMP6]]
-// CHECK16-NEXT: br i1 [[CMP8]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
-// CHECK16: omp.precond.then:
-// CHECK16-NEXT: store i64 0, i64* [[DOTOMP_COMB_LB]], align 8
-// CHECK16-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK16-NEXT: store i64 [[TMP7]], i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK16-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8
-// CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK16-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK16-NEXT: [[CONV11:%.*]] = zext i32 [[NVPTX_NUM_THREADS]] to i64
-// CHECK16-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
-// CHECK16-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_COMB_LB]], i64* [[DOTOMP_COMB_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 [[CONV11]])
-// CHECK16-NEXT: [[TMP10:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK16-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK16-NEXT: [[CMP12:%.*]] = icmp sgt i64 [[TMP10]], [[TMP11]]
-// CHECK16-NEXT: br i1 [[CMP12]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK16: cond.true:
-// CHECK16-NEXT: [[TMP12:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK16-NEXT: br label [[COND_END:%.*]]
-// CHECK16: cond.false:
-// CHECK16-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK16-NEXT: br label [[COND_END]]
-// CHECK16: cond.end:
-// CHECK16-NEXT: [[COND:%.*]] = phi i64 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
-// CHECK16-NEXT: store i64 [[COND]], i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK16-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
-// CHECK16-NEXT: store i64 [[TMP14]], i64* [[DOTOMP_IV]], align 8
-// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK16: omp.inner.for.cond:
-// CHECK16-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK16-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK16-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP16]], 1
-// CHECK16-NEXT: [[CMP13:%.*]] = icmp slt i64 [[TMP15]], [[ADD]]
-// CHECK16-NEXT: br i1 [[CMP13]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK16: omp.inner.for.body:
-// CHECK16-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
-// CHECK16-NEXT: [[TMP18:%.*]] = trunc i64 [[TMP17]] to i32
-// CHECK16-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK16-NEXT: [[TMP20:%.*]] = trunc i64 [[TMP19]] to i32
-// CHECK16-NEXT: [[TMP21:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK16-NEXT: store i32 [[TMP21]], i32* [[N_CASTED]], align 4
-// CHECK16-NEXT: [[TMP22:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK16-NEXT: [[TMP23:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK16-NEXT: [[TMP24:%.*]] = inttoptr i32 [[TMP18]] to i8*
-// CHECK16-NEXT: store i8* [[TMP24]], i8** [[TMP23]], align 4
-// CHECK16-NEXT: [[TMP25:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK16-NEXT: [[TMP26:%.*]] = inttoptr i32 [[TMP20]] to i8*
-// CHECK16-NEXT: store i8* [[TMP26]], i8** [[TMP25]], align 4
-// CHECK16-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK16-NEXT: [[TMP28:%.*]] = inttoptr i32 [[TMP22]] to i8*
-// CHECK16-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 4
-// CHECK16-NEXT: [[TMP29:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
-// CHECK16-NEXT: [[TMP30:%.*]] = bitcast [10 x [10 x i32]]* [[TMP0]] to i8*
-// CHECK16-NEXT: store i8* [[TMP30]], i8** [[TMP29]], align 4
-// CHECK16-NEXT: [[TMP31:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK16-NEXT: [[TMP32:%.*]] = load i32, i32* [[TMP31]], align 4
-// CHECK16-NEXT: [[TMP33:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK16-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP32]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [10 x [10 x i32]]*)* @__omp_outlined__9 to i8*), i8* null, i8** [[TMP33]], i32 4)
-// CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK16: omp.inner.for.inc:
-// CHECK16-NEXT: [[TMP34:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK16-NEXT: [[TMP35:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8
-// CHECK16-NEXT: [[ADD14:%.*]] = add nsw i64 [[TMP34]], [[TMP35]]
-// CHECK16-NEXT: store i64 [[ADD14]], i64* [[DOTOMP_IV]], align 8
-// CHECK16-NEXT: [[TMP36:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
-// CHECK16-NEXT: [[TMP37:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8
-// CHECK16-NEXT: [[ADD15:%.*]] = add nsw i64 [[TMP36]], [[TMP37]]
-// CHECK16-NEXT: store i64 [[ADD15]], i64* [[DOTOMP_COMB_LB]], align 8
-// CHECK16-NEXT: [[TMP38:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK16-NEXT: [[TMP39:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8
-// CHECK16-NEXT: [[ADD16:%.*]] = add nsw i64 [[TMP38]], [[TMP39]]
-// CHECK16-NEXT: store i64 [[ADD16]], i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK16-NEXT: [[TMP40:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK16-NEXT: [[TMP41:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK16-NEXT: [[CMP17:%.*]] = icmp sgt i64 [[TMP40]], [[TMP41]]
-// CHECK16-NEXT: br i1 [[CMP17]], label [[COND_TRUE18:%.*]], label [[COND_FALSE19:%.*]]
-// CHECK16: cond.true18:
-// CHECK16-NEXT: [[TMP42:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK16-NEXT: br label [[COND_END20:%.*]]
-// CHECK16: cond.false19:
-// CHECK16-NEXT: [[TMP43:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK16-NEXT: br label [[COND_END20]]
-// CHECK16: cond.end20:
-// CHECK16-NEXT: [[COND21:%.*]] = phi i64 [ [[TMP42]], [[COND_TRUE18]] ], [ [[TMP43]], [[COND_FALSE19]] ]
-// CHECK16-NEXT: store i64 [[COND21]], i64* [[DOTOMP_COMB_UB]], align 8
-// CHECK16-NEXT: [[TMP44:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
-// CHECK16-NEXT: store i64 [[TMP44]], i64* [[DOTOMP_IV]], align 8
-// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK16: omp.inner.for.end:
-// CHECK16-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK16: omp.loop.exit:
-// CHECK16-NEXT: [[TMP45:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK16-NEXT: [[TMP46:%.*]] = load i32, i32* [[TMP45]], align 4
-// CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP46]])
-// CHECK16-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK16: omp.precond.end:
-// CHECK16-NEXT: ret void
-// CHECK16-LABEL: define {{[^@]+}}@__omp_outlined__9
-// CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]]) #[[ATTR0]] {
-// CHECK16-NEXT: entry:
-// CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK16-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
-// CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8
-// CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[J:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8
-// CHECK16-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8
-// CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
-// CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[I11:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[J12:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK16-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK16-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK16-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK16-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK16-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK16-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK16-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK16-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
-// CHECK16-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK16-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64
-// CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK16-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP4]], 0
-// CHECK16-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1
-// CHECK16-NEXT: [[CONV6:%.*]] = sext i32 [[DIV5]] to i64
-// CHECK16-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]]
-// CHECK16-NEXT: [[SUB7:%.*]] = sub nsw i64 [[MUL]], 1
-// CHECK16-NEXT: store i64 [[SUB7]], i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK16-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK16-NEXT: store i32 0, i32* [[J]], align 4
-// CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
-// CHECK16-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK16: land.lhs.true:
-// CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK16-NEXT: [[CMP8:%.*]] = icmp slt i32 0, [[TMP6]]
-// CHECK16-NEXT: br i1 [[CMP8]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
-// CHECK16: omp.precond.then:
-// CHECK16-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8
-// CHECK16-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
-// CHECK16-NEXT: store i64 [[TMP7]], i64* [[DOTOMP_UB]], align 8
-// CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK16-NEXT: [[CONV9:%.*]] = zext i32 [[TMP8]] to i64
-// CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK16-NEXT: [[CONV10:%.*]] = zext i32 [[TMP9]] to i64
-// CHECK16-NEXT: store i64 [[CONV9]], i64* [[DOTOMP_LB]], align 8
-// CHECK16-NEXT: store i64 [[CONV10]], i64* [[DOTOMP_UB]], align 8
-// CHECK16-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8
-// CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK16-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
-// CHECK16-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 33, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_LB]], i64* [[DOTOMP_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1)
-// CHECK16-NEXT: [[TMP12:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8
-// CHECK16-NEXT: store i64 [[TMP12]], i64* [[DOTOMP_IV]], align 8
-// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK16: omp.inner.for.cond:
-// CHECK16-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK16-NEXT: [[CONV13:%.*]] = zext i32 [[TMP14]] to i64
-// CHECK16-NEXT: [[CMP14:%.*]] = icmp sle i64 [[TMP13]], [[CONV13]]
-// CHECK16-NEXT: br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK16: omp.inner.for.body:
-// CHECK16-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK16-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK16-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP16]], 0
-// CHECK16-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1
-// CHECK16-NEXT: [[MUL17:%.*]] = mul nsw i32 1, [[DIV16]]
-// CHECK16-NEXT: [[CONV18:%.*]] = sext i32 [[MUL17]] to i64
-// CHECK16-NEXT: [[DIV19:%.*]] = sdiv i64 [[TMP15]], [[CONV18]]
-// CHECK16-NEXT: [[MUL20:%.*]] = mul nsw i64 [[DIV19]], 1
-// CHECK16-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL20]]
-// CHECK16-NEXT: [[CONV21:%.*]] = trunc i64 [[ADD]] to i32
-// CHECK16-NEXT: store i32 [[CONV21]], i32* [[I11]], align 4
-// CHECK16-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK16-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK16-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK16-NEXT: [[SUB22:%.*]] = sub nsw i32 [[TMP19]], 0
-// CHECK16-NEXT: [[DIV23:%.*]] = sdiv i32 [[SUB22]], 1
-// CHECK16-NEXT: [[MUL24:%.*]] = mul nsw i32 1, [[DIV23]]
-// CHECK16-NEXT: [[CONV25:%.*]] = sext i32 [[MUL24]] to i64
-// CHECK16-NEXT: [[DIV26:%.*]] = sdiv i64 [[TMP18]], [[CONV25]]
-// CHECK16-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK16-NEXT: [[SUB27:%.*]] = sub nsw i32 [[TMP20]], 0
-// CHECK16-NEXT: [[DIV28:%.*]] = sdiv i32 [[SUB27]], 1
-// CHECK16-NEXT: [[MUL29:%.*]] = mul nsw i32 1, [[DIV28]]
-// CHECK16-NEXT: [[CONV30:%.*]] = sext i32 [[MUL29]] to i64
-// CHECK16-NEXT: [[MUL31:%.*]] = mul nsw i64 [[DIV26]], [[CONV30]]
-// CHECK16-NEXT: [[SUB32:%.*]] = sub nsw i64 [[TMP17]], [[MUL31]]
-// CHECK16-NEXT: [[MUL33:%.*]] = mul nsw i64 [[SUB32]], 1
-// CHECK16-NEXT: [[ADD34:%.*]] = add nsw i64 0, [[MUL33]]
-// CHECK16-NEXT: [[CONV35:%.*]] = trunc i64 [[ADD34]] to i32
-// CHECK16-NEXT: store i32 [[CONV35]], i32* [[J12]], align 4
-// CHECK16-NEXT: [[TMP21:%.*]] = load i32, i32* [[I11]], align 4
-// CHECK16-NEXT: [[TMP22:%.*]] = load i32, i32* [[J12]], align 4
-// CHECK16-NEXT: [[ADD36:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
-// CHECK16-NEXT: [[TMP23:%.*]] = load i32, i32* [[I11]], align 4
-// CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [10 x i32]], [10 x [10 x i32]]* [[TMP0]], i32 0, i32 [[TMP23]]
-// CHECK16-NEXT: [[TMP24:%.*]] = load i32, i32* [[J12]], align 4
-// CHECK16-NEXT: [[ARRAYIDX37:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP24]]
-// CHECK16-NEXT: store i32 [[ADD36]], i32* [[ARRAYIDX37]], align 4
-// CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK16: omp.body.continue:
-// CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK16: omp.inner.for.inc:
-// CHECK16-NEXT: [[TMP25:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
-// CHECK16-NEXT: [[TMP26:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8
-// CHECK16-NEXT: [[ADD38:%.*]] = add nsw i64 [[TMP25]], [[TMP26]]
-// CHECK16-NEXT: store i64 [[ADD38]], i64* [[DOTOMP_IV]], align 8
-// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK16: omp.inner.for.end:
-// CHECK16-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK16: omp.loop.exit:
-// CHECK16-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK16-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4
-// CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP28]])
-// CHECK16-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK16: omp.precond.end:
-// CHECK16-NEXT: ret void
-// CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l74
-// CHECK16-SAME: (i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* [[V:%.*]]) #[[ATTR0]] {
-// CHECK16-NEXT: entry:
-// CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK16-NEXT: [[V_ADDR:%.*]] = alloca i32*, align 4
-// CHECK16-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK16-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK16-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK16-NEXT: store i32* [[V]], i32** [[V_ADDR]], align 4
-// CHECK16-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK16-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK16-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK16-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK16: .execute:
-// CHECK16-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK16-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
-// CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK16-NEXT: [[TMP4:%.*]] = load i32*, i32** [[V_ADDR]], align 4
-// CHECK16-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK16-NEXT: call void @__omp_outlined__10(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP3]], [1000 x i32]* [[TMP0]], i32* [[TMP4]]) #[[ATTR3]]
-// CHECK16-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK16: .omp.deinit:
-// CHECK16-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK16-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK16: .exit:
-// CHECK16-NEXT: ret void
-// CHECK16-LABEL: define {{[^@]+}}@__omp_outlined__10
-// CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* [[V:%.*]]) #[[ATTR0]] {
-// CHECK16-NEXT: entry:
-// CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK16-NEXT: [[V_ADDR:%.*]] = alloca i32*, align 4
-// CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [5 x i8*], align 4
-// CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK16-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK16-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK16-NEXT: store i32* [[V]], i32** [[V_ADDR]], align 4
-// CHECK16-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK16-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK16-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK16-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK16-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK16-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK16-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK16-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK16: omp.precond.then:
-// CHECK16-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK16-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK16-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK16-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
-// CHECK16-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK16-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
-// CHECK16-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK16: cond.true:
-// CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK16-NEXT: br label [[COND_END:%.*]]
-// CHECK16: cond.false:
-// CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK16-NEXT: br label [[COND_END]]
-// CHECK16: cond.end:
-// CHECK16-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
-// CHECK16-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK16-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
-// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK16: omp.inner.for.cond:
-// CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1
-// CHECK16-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]
-// CHECK16-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK16: omp.inner.for.body:
-// CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK16-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK16-NEXT: [[TMP16:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK16-NEXT: store i32 [[TMP16]], i32* [[N_CASTED]], align 4
-// CHECK16-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK16-NEXT: [[TMP18:%.*]] = load i32*, i32** [[V_ADDR]], align 4
-// CHECK16-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK16-NEXT: [[TMP20:%.*]] = inttoptr i32 [[TMP14]] to i8*
-// CHECK16-NEXT: store i8* [[TMP20]], i8** [[TMP19]], align 4
-// CHECK16-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK16-NEXT: [[TMP22:%.*]] = inttoptr i32 [[TMP15]] to i8*
-// CHECK16-NEXT: store i8* [[TMP22]], i8** [[TMP21]], align 4
-// CHECK16-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK16-NEXT: [[TMP24:%.*]] = inttoptr i32 [[TMP17]] to i8*
-// CHECK16-NEXT: store i8* [[TMP24]], i8** [[TMP23]], align 4
-// CHECK16-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
-// CHECK16-NEXT: [[TMP26:%.*]] = bitcast [1000 x i32]* [[TMP0]] to i8*
-// CHECK16-NEXT: store i8* [[TMP26]], i8** [[TMP25]], align 4
-// CHECK16-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 4
-// CHECK16-NEXT: [[TMP28:%.*]] = bitcast i32* [[TMP18]] to i8*
-// CHECK16-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 4
-// CHECK16-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK16-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4
-// CHECK16-NEXT: [[TMP31:%.*]] = bitcast [5 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK16-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP30]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i32]*, i32*)* @__omp_outlined__11 to i8*), i8* null, i8** [[TMP31]], i32 5)
-// CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK16: omp.inner.for.inc:
-// CHECK16-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK16-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK16-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP32]], [[TMP33]]
-// CHECK16-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
-// CHECK16-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK16-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK16-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP34]], [[TMP35]]
-// CHECK16-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK16-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK16-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK16-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP36]], [[TMP37]]
-// CHECK16-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK16-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK16-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK16-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP38]], [[TMP39]]
-// CHECK16-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]]
-// CHECK16: cond.true10:
-// CHECK16-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK16-NEXT: br label [[COND_END12:%.*]]
-// CHECK16: cond.false11:
-// CHECK16-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK16-NEXT: br label [[COND_END12]]
-// CHECK16: cond.end12:
-// CHECK16-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP40]], [[COND_TRUE10]] ], [ [[TMP41]], [[COND_FALSE11]] ]
-// CHECK16-NEXT: store i32 [[COND13]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK16-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK16-NEXT: store i32 [[TMP42]], i32* [[DOTOMP_IV]], align 4
-// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK16: omp.inner.for.end:
-// CHECK16-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK16: omp.loop.exit:
-// CHECK16-NEXT: [[TMP43:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK16-NEXT: [[TMP44:%.*]] = load i32, i32* [[TMP43]], align 4
-// CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP44]])
-// CHECK16-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK16: omp.precond.end:
-// CHECK16-NEXT: ret void
-// CHECK16-LABEL: define {{[^@]+}}@__omp_outlined__11
-// CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* [[V:%.*]]) #[[ATTR0]] {
-// CHECK16-NEXT: entry:
-// CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK16-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK16-NEXT: [[V_ADDR:%.*]] = alloca i32*, align 4
-// CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK16-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK16-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK16-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK16-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK16-NEXT: store i32* [[V]], i32** [[V_ADDR]], align 4
-// CHECK16-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK16-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK16-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK16-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK16-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK16-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK16-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK16-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK16: omp.precond.then:
-// CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK16-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
-// CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK16-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
-// CHECK16-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
-// CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK16-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK16-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK16-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
-// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK16: omp.inner.for.cond:
-// CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK16-NEXT: [[CMP4:%.*]] = icmp ule i32 [[TMP10]], [[TMP11]]
-// CHECK16-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK16: omp.inner.for.body:
-// CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
-// CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK16-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
-// CHECK16-NEXT: [[TMP13:%.*]] = load i32*, i32** [[V_ADDR]], align 4
-// CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[I3]], align 4
-// CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP13]], i32 [[TMP14]]
-// CHECK16-NEXT: [[TMP15:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
-// CHECK16-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4
-// CHECK16-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 [[TMP16]]
-// CHECK16-NEXT: store i32 [[TMP15]], i32* [[ARRAYIDX5]], align 4
-// CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK16: omp.body.continue:
-// CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK16: omp.inner.for.inc:
-// CHECK16-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK16-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK16-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
-// CHECK16-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
-// CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]]
-// CHECK16: omp.inner.for.end:
-// CHECK16-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK16: omp.loop.exit:
-// CHECK16-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK16-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4
-// CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]])
-// CHECK16-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK16: omp.precond.end:
-// CHECK16-NEXT: ret void
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l28
// CHECK1-SAME: (i64 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i64 noundef [[L:%.*]]) #[[ATTR0:[0-9]+]] {
// CHECK1-NEXT: entry:
@@ -18795,7 +399,7 @@ int bar(int n){
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l34
-// CHECK1-SAME: (i64 noundef [[N:%.*]], [1000 x i16]* noundef nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR5:[0-9]+]] {
+// CHECK1-SAME: (i64 noundef [[N:%.*]], [1000 x i16]* noundef nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR6:[0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
// CHECK1-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 8
@@ -20389,7 +1993,7 @@ int bar(int n){
//
//
// CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l34
-// CHECK2-SAME: (i64 noundef [[N:%.*]], [1000 x i16]* noundef nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR5:[0-9]+]] {
+// CHECK2-SAME: (i64 noundef [[N:%.*]], [1000 x i16]* noundef nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR6:[0-9]+]] {
// CHECK2-NEXT: entry:
// CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
// CHECK2-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 8
@@ -21961,7 +3565,7 @@ int bar(int n){
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l34
-// CHECK3-SAME: (i32 noundef [[N:%.*]], [1000 x i16]* noundef nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR5:[0-9]+]] {
+// CHECK3-SAME: (i32 noundef [[N:%.*]], [1000 x i16]* noundef nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR6:[0-9]+]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
// CHECK3-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
@@ -23495,7 +5099,7 @@ int bar(int n){
//
//
// CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l34
-// CHECK4-SAME: (i32 noundef [[N:%.*]], [1000 x i16]* noundef nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR5:[0-9]+]] {
+// CHECK4-SAME: (i32 noundef [[N:%.*]], [1000 x i16]* noundef nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR6:[0-9]+]] {
// CHECK4-NEXT: entry:
// CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
// CHECK4-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
diff --git a/clang/test/OpenMP/nvptx_target_teams_distribute_parallel_for_simd_codegen.cpp b/clang/test/OpenMP/nvptx_target_teams_distribute_parallel_for_simd_codegen.cpp
index 16605a1e0d45a..c3ff019837edf 100644
--- a/clang/test/OpenMP/nvptx_target_teams_distribute_parallel_for_simd_codegen.cpp
+++ b/clang/test/OpenMP/nvptx_target_teams_distribute_parallel_for_simd_codegen.cpp
@@ -59,9327 +59,6 @@ int bar(int n){
}
#endif
-// CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l38
-// CHECK4-SAME: (i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0:[0-9]+]] {
-// CHECK4-NEXT: entry:
-// CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK4-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[L_CASTED:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK4-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK4-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
-// CHECK4-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK4-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK4-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK4-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK4: .execute:
-// CHECK4-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]])
-// CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK4-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
-// CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[L_ADDR]], align 4
-// CHECK4-NEXT: store i32 [[TMP4]], i32* [[L_CASTED]], align 4
-// CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[L_CASTED]], align 4
-// CHECK4-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK4-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP3]], [1000 x i32]* [[TMP0]], i32 [[TMP5]]) #[[ATTR3:[0-9]+]]
-// CHECK4-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK4: .omp.deinit:
-// CHECK4-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK4-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK4: .exit:
-// CHECK4-NEXT: ret void
-// CHECK4-LABEL: define {{[^@]+}}@__omp_outlined__
-// CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0]] {
-// CHECK4-NEXT: entry:
-// CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK4-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[I4:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[L_CASTED:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [5 x i8*], align 4
-// CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK4-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK4-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
-// CHECK4-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK4-NEXT: [[TMP1:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared", align 2
-// CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* @"_openmp_static_kernel$size", align 4
-// CHECK4-NEXT: call void @__kmpc_get_team_static_memory(i16 1, i8* addrspacecast (i8 addrspace(3)* getelementptr inbounds (%"union._shared_openmp_static_memory_type_$_", %"union._shared_openmp_static_memory_type_$_" addrspace(3)* @"_openmp_shared_static_glob_rd_$_", i32 0, i32 0, i32 0) to i8*), i32 [[TMP2]], i16 [[TMP1]], i8** addrspacecast (i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr" to i8**))
-// CHECK4-NEXT: [[TMP3:%.*]] = load i8*, i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr", align 4
-// CHECK4-NEXT: [[TMP4:%.*]] = getelementptr inbounds i8, i8* [[TMP3]], i32 0
-// CHECK4-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to %struct._globalized_locals_ty*
-// CHECK4-NEXT: [[L1:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY:%.*]], %struct._globalized_locals_ty* [[TMP5]], i32 0, i32 0
-// CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK4-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0
-// CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK4-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK4-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK4-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK4-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]]
-// CHECK4-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK4: omp.precond.then:
-// CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK4-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK4-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
-// CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 128)
-// CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK4-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]]
-// CHECK4-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK4: cond.true:
-// CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK4-NEXT: br label [[COND_END:%.*]]
-// CHECK4: cond.false:
-// CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK4-NEXT: br label [[COND_END]]
-// CHECK4: cond.end:
-// CHECK4-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ]
-// CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK4-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
-// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK4: omp.inner.for.cond:
-// CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], 1
-// CHECK4-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP17]], [[ADD]]
-// CHECK4-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK4: omp.inner.for.body:
-// CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK4-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK4-NEXT: [[TMP21:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK4-NEXT: store i32 [[TMP21]], i32* [[N_CASTED]], align 4
-// CHECK4-NEXT: [[TMP22:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK4-NEXT: [[TMP23:%.*]] = load i32, i32* [[L_ADDR]], align 4
-// CHECK4-NEXT: store i32 [[TMP23]], i32* [[L_CASTED]], align 4
-// CHECK4-NEXT: [[TMP24:%.*]] = load i32, i32* [[L_CASTED]], align 4
-// CHECK4-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK4-NEXT: [[TMP26:%.*]] = inttoptr i32 [[TMP19]] to i8*
-// CHECK4-NEXT: store i8* [[TMP26]], i8** [[TMP25]], align 4
-// CHECK4-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK4-NEXT: [[TMP28:%.*]] = inttoptr i32 [[TMP20]] to i8*
-// CHECK4-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 4
-// CHECK4-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK4-NEXT: [[TMP30:%.*]] = inttoptr i32 [[TMP22]] to i8*
-// CHECK4-NEXT: store i8* [[TMP30]], i8** [[TMP29]], align 4
-// CHECK4-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
-// CHECK4-NEXT: [[TMP32:%.*]] = bitcast [1000 x i32]* [[TMP0]] to i8*
-// CHECK4-NEXT: store i8* [[TMP32]], i8** [[TMP31]], align 4
-// CHECK4-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 4
-// CHECK4-NEXT: [[TMP34:%.*]] = inttoptr i32 [[TMP24]] to i8*
-// CHECK4-NEXT: store i8* [[TMP34]], i8** [[TMP33]], align 4
-// CHECK4-NEXT: [[TMP35:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK4-NEXT: [[TMP36:%.*]] = load i32, i32* [[TMP35]], align 4
-// CHECK4-NEXT: [[TMP37:%.*]] = bitcast [5 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK4-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP36]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i32]*, i32)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP37]], i32 5)
-// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK4: omp.inner.for.inc:
-// CHECK4-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK4-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK4-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP38]], [[TMP39]]
-// CHECK4-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
-// CHECK4-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK4-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK4-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP40]], [[TMP41]]
-// CHECK4-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK4-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK4-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK4-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP42]], [[TMP43]]
-// CHECK4-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK4-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK4-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK4-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP44]], [[TMP45]]
-// CHECK4-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
-// CHECK4: cond.true11:
-// CHECK4-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK4-NEXT: br label [[COND_END13:%.*]]
-// CHECK4: cond.false12:
-// CHECK4-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK4-NEXT: br label [[COND_END13]]
-// CHECK4: cond.end13:
-// CHECK4-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP46]], [[COND_TRUE11]] ], [ [[TMP47]], [[COND_FALSE12]] ]
-// CHECK4-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK4-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK4-NEXT: store i32 [[TMP48]], i32* [[DOTOMP_IV]], align 4
-// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
-// CHECK4: omp.inner.for.end:
-// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK4: omp.loop.exit:
-// CHECK4-NEXT: [[TMP49:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK4-NEXT: [[TMP50:%.*]] = load i32, i32* [[TMP49]], align 4
-// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP50]])
-// CHECK4-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK4-NEXT: [[TMP52:%.*]] = icmp ne i32 [[TMP51]], 0
-// CHECK4-NEXT: br i1 [[TMP52]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK4: .omp.final.then:
-// CHECK4-NEXT: [[TMP53:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK4-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP53]], 0
-// CHECK4-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1
-// CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV16]], 1
-// CHECK4-NEXT: [[ADD17:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK4-NEXT: store i32 [[ADD17]], i32* [[I4]], align 4
-// CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK4: .omp.final.done:
-// CHECK4-NEXT: [[TMP54:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK4-NEXT: [[TMP55:%.*]] = icmp ne i32 [[TMP54]], 0
-// CHECK4-NEXT: br i1 [[TMP55]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
-// CHECK4: .omp.lastprivate.then:
-// CHECK4-NEXT: [[TMP56:%.*]] = load i32, i32* [[L_ADDR]], align 4
-// CHECK4-NEXT: store i32 [[TMP56]], i32* [[L_ADDR]], align 4
-// CHECK4-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
-// CHECK4: .omp.lastprivate.done:
-// CHECK4-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK4: omp.precond.end:
-// CHECK4-NEXT: [[TMP57:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared", align 2
-// CHECK4-NEXT: call void @__kmpc_restore_team_static_memory(i16 1, i16 [[TMP57]])
-// CHECK4-NEXT: ret void
-// CHECK4-LABEL: define {{[^@]+}}@__omp_outlined__1
-// CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0]] {
-// CHECK4-NEXT: entry:
-// CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK4-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK4-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK4-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK4-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK4-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
-// CHECK4-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK4-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK4-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK4-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK4-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK4-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK4-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK4: omp.precond.then:
-// CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK4-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
-// CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
-// CHECK4-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
-// CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK4-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 32)
-// CHECK4-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
-// CHECK4: omp.dispatch.cond:
-// CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK4-NEXT: [[CMP4:%.*]] = icmp ugt i32 [[TMP9]], [[TMP10]]
-// CHECK4-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK4: cond.true:
-// CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK4-NEXT: br label [[COND_END:%.*]]
-// CHECK4: cond.false:
-// CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK4-NEXT: br label [[COND_END]]
-// CHECK4: cond.end:
-// CHECK4-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
-// CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
-// CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK4-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
-// CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK4-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
-// CHECK4-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
-// CHECK4: omp.dispatch.body:
-// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK4: omp.inner.for.cond:
-// CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK4-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
-// CHECK4-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK4: omp.inner.for.body:
-// CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
-// CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK4-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
-// CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4
-// CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 [[TMP19]]
-// CHECK4-NEXT: store i32 1, i32* [[ARRAYIDX]], align 4
-// CHECK4-NEXT: [[TMP20:%.*]] = load i32, i32* [[I3]], align 4
-// CHECK4-NEXT: store i32 [[TMP20]], i32* [[L_ADDR]], align 4
-// CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK4: omp.body.continue:
-// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK4: omp.inner.for.inc:
-// CHECK4-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK4-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP21]], 1
-// CHECK4-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
-// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
-// CHECK4: omp.inner.for.end:
-// CHECK4-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
-// CHECK4: omp.dispatch.inc:
-// CHECK4-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK4-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK4-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
-// CHECK4-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4
-// CHECK4-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK4-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK4-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
-// CHECK4-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4
-// CHECK4-NEXT: br label [[OMP_DISPATCH_COND]]
-// CHECK4: omp.dispatch.end:
-// CHECK4-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK4-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
-// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP27]])
-// CHECK4-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK4-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
-// CHECK4-NEXT: br i1 [[TMP29]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK4: .omp.final.then:
-// CHECK4-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK4-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP30]], 0
-// CHECK4-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1
-// CHECK4-NEXT: [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 1
-// CHECK4-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]]
-// CHECK4-NEXT: store i32 [[ADD13]], i32* [[I3]], align 4
-// CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK4: .omp.final.done:
-// CHECK4-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK4-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
-// CHECK4-NEXT: br i1 [[TMP32]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
-// CHECK4: .omp.lastprivate.then:
-// CHECK4-NEXT: [[TMP33:%.*]] = load i32, i32* [[L_ADDR]], align 4
-// CHECK4-NEXT: store i32 [[TMP33]], i32* [[L_ADDR]], align 4
-// CHECK4-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
-// CHECK4: .omp.lastprivate.done:
-// CHECK4-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK4: omp.precond.end:
-// CHECK4-NEXT: ret void
-// CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l44
-// CHECK4-SAME: (i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
-// CHECK4-NEXT: entry:
-// CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
-// CHECK4-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK4-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK4-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK4-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK4-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK4-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK4: .execute:
-// CHECK4-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK4-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
-// CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK4-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK4-NEXT: call void @__omp_outlined__2(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP3]], [1000 x i16]* [[TMP0]]) #[[ATTR3]]
-// CHECK4-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK4: .omp.deinit:
-// CHECK4-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK4-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK4: .exit:
-// CHECK4-NEXT: ret void
-// CHECK4-LABEL: define {{[^@]+}}@__omp_outlined__2
-// CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
-// CHECK4-NEXT: entry:
-// CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
-// CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 4
-// CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK4-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK4-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK4-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK4-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK4-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK4-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK4-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK4-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK4: omp.precond.then:
-// CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK4-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK4-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK4-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
-// CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK4-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
-// CHECK4-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK4: cond.true:
-// CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK4-NEXT: br label [[COND_END:%.*]]
-// CHECK4: cond.false:
-// CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK4-NEXT: br label [[COND_END]]
-// CHECK4: cond.end:
-// CHECK4-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
-// CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK4-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
-// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK4: omp.inner.for.cond:
-// CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1
-// CHECK4-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]
-// CHECK4-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK4: omp.inner.for.body:
-// CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK4-NEXT: store i32 [[TMP16]], i32* [[N_CASTED]], align 4
-// CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK4-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK4-NEXT: [[TMP19:%.*]] = inttoptr i32 [[TMP14]] to i8*
-// CHECK4-NEXT: store i8* [[TMP19]], i8** [[TMP18]], align 4
-// CHECK4-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK4-NEXT: [[TMP21:%.*]] = inttoptr i32 [[TMP15]] to i8*
-// CHECK4-NEXT: store i8* [[TMP21]], i8** [[TMP20]], align 4
-// CHECK4-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK4-NEXT: [[TMP23:%.*]] = inttoptr i32 [[TMP17]] to i8*
-// CHECK4-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 4
-// CHECK4-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
-// CHECK4-NEXT: [[TMP25:%.*]] = bitcast [1000 x i16]* [[TMP0]] to i8*
-// CHECK4-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 4
-// CHECK4-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK4-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
-// CHECK4-NEXT: [[TMP28:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK4-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP27]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i16]*)* @__omp_outlined__3 to i8*), i8* null, i8** [[TMP28]], i32 4)
-// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK4: omp.inner.for.inc:
-// CHECK4-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK4-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK4-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP29]], [[TMP30]]
-// CHECK4-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
-// CHECK4-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK4-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK4-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP31]], [[TMP32]]
-// CHECK4-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK4-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK4-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK4-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP33]], [[TMP34]]
-// CHECK4-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK4-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK4-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK4-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP35]], [[TMP36]]
-// CHECK4-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]]
-// CHECK4: cond.true10:
-// CHECK4-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK4-NEXT: br label [[COND_END12:%.*]]
-// CHECK4: cond.false11:
-// CHECK4-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK4-NEXT: br label [[COND_END12]]
-// CHECK4: cond.end12:
-// CHECK4-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP37]], [[COND_TRUE10]] ], [ [[TMP38]], [[COND_FALSE11]] ]
-// CHECK4-NEXT: store i32 [[COND13]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK4-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK4-NEXT: store i32 [[TMP39]], i32* [[DOTOMP_IV]], align 4
-// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
-// CHECK4: omp.inner.for.end:
-// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK4: omp.loop.exit:
-// CHECK4-NEXT: [[TMP40:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK4-NEXT: [[TMP41:%.*]] = load i32, i32* [[TMP40]], align 4
-// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP41]])
-// CHECK4-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK4-NEXT: [[TMP43:%.*]] = icmp ne i32 [[TMP42]], 0
-// CHECK4-NEXT: br i1 [[TMP43]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK4: .omp.final.then:
-// CHECK4-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK4-NEXT: [[SUB14:%.*]] = sub nsw i32 [[TMP44]], 0
-// CHECK4-NEXT: [[DIV15:%.*]] = sdiv i32 [[SUB14]], 1
-// CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV15]], 1
-// CHECK4-NEXT: [[ADD16:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK4-NEXT: store i32 [[ADD16]], i32* [[I3]], align 4
-// CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK4: .omp.final.done:
-// CHECK4-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK4: omp.precond.end:
-// CHECK4-NEXT: ret void
-// CHECK4-LABEL: define {{[^@]+}}@__omp_outlined__3
-// CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
-// CHECK4-NEXT: entry:
-// CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
-// CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK4-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK4-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK4-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK4-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK4-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK4-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK4-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK4-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK4-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK4-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK4: omp.precond.then:
-// CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK4-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
-// CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
-// CHECK4-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
-// CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK4-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK4-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
-// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK4: omp.inner.for.cond:
-// CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK4-NEXT: [[CMP4:%.*]] = icmp ule i32 [[TMP10]], [[TMP11]]
-// CHECK4-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK4: omp.inner.for.body:
-// CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
-// CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK4-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
-// CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[I3]], align 4
-// CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i16], [1000 x i16]* [[TMP0]], i32 0, i32 [[TMP13]]
-// CHECK4-NEXT: [[TMP14:%.*]] = load i16, i16* [[ARRAYIDX]], align 2
-// CHECK4-NEXT: [[CONV:%.*]] = sext i16 [[TMP14]] to i32
-// CHECK4-NEXT: [[ADD5:%.*]] = add nsw i32 [[CONV]], 1
-// CHECK4-NEXT: [[CONV6:%.*]] = trunc i32 [[ADD5]] to i16
-// CHECK4-NEXT: store i16 [[CONV6]], i16* [[ARRAYIDX]], align 2
-// CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK4: omp.body.continue:
-// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK4: omp.inner.for.inc:
-// CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK4-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
-// CHECK4-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
-// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
-// CHECK4: omp.inner.for.end:
-// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK4: omp.loop.exit:
-// CHECK4-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
-// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]])
-// CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK4-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
-// CHECK4-NEXT: br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK4: .omp.final.then:
-// CHECK4-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK4-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP21]], 0
-// CHECK4-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1
-// CHECK4-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1
-// CHECK4-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
-// CHECK4-NEXT: store i32 [[ADD11]], i32* [[I3]], align 4
-// CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK4: .omp.final.done:
-// CHECK4-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK4: omp.precond.end:
-// CHECK4-NEXT: ret void
-// CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l49
-// CHECK4-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
-// CHECK4-NEXT: entry:
-// CHECK4-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
-// CHECK4-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK4-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
-// CHECK4-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
-// CHECK4-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK4-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK4-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK4: .execute:
-// CHECK4-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK4-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK4-NEXT: call void @__omp_outlined__4(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x i32]* [[TMP0]]) #[[ATTR3]]
-// CHECK4-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK4: .omp.deinit:
-// CHECK4-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK4-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK4: .exit:
-// CHECK4-NEXT: ret void
-// CHECK4-LABEL: define {{[^@]+}}@__omp_outlined__4
-// CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
-// CHECK4-NEXT: entry:
-// CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK4-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
-// CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [3 x i8*], align 4
-// CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK4-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
-// CHECK4-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
-// CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK4-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK4-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
-// CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
-// CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK4: cond.true:
-// CHECK4-NEXT: br label [[COND_END:%.*]]
-// CHECK4: cond.false:
-// CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK4-NEXT: br label [[COND_END]]
-// CHECK4: cond.end:
-// CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
-// CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK4: omp.inner.for.cond:
-// CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK4-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP6]], 10
-// CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK4: omp.inner.for.body:
-// CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK4-NEXT: [[TMP10:%.*]] = inttoptr i32 [[TMP7]] to i8*
-// CHECK4-NEXT: store i8* [[TMP10]], i8** [[TMP9]], align 4
-// CHECK4-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK4-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP8]] to i8*
-// CHECK4-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 4
-// CHECK4-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK4-NEXT: [[TMP14:%.*]] = bitcast [10 x i32]* [[TMP0]] to i8*
-// CHECK4-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 4
-// CHECK4-NEXT: [[TMP15:%.*]] = bitcast [3 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK4-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @__omp_outlined__5 to i8*), i8* null, i8** [[TMP15]], i32 3)
-// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK4: omp.inner.for.inc:
-// CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
-// CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
-// CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK4-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
-// CHECK4-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK4-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK4-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
-// CHECK4-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK4-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK4-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP22]], 9
-// CHECK4-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
-// CHECK4: cond.true5:
-// CHECK4-NEXT: br label [[COND_END7:%.*]]
-// CHECK4: cond.false6:
-// CHECK4-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK4-NEXT: br label [[COND_END7]]
-// CHECK4: cond.end7:
-// CHECK4-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP23]], [[COND_FALSE6]] ]
-// CHECK4-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK4-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK4-NEXT: store i32 [[TMP24]], i32* [[DOTOMP_IV]], align 4
-// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
-// CHECK4: omp.inner.for.end:
-// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK4: omp.loop.exit:
-// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
-// CHECK4-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK4-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
-// CHECK4-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK4: .omp.final.then:
-// CHECK4-NEXT: store i32 10, i32* [[I]], align 4
-// CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK4: .omp.final.done:
-// CHECK4-NEXT: ret void
-// CHECK4-LABEL: define {{[^@]+}}@__omp_outlined__5
-// CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
-// CHECK4-NEXT: entry:
-// CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
-// CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK4-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK4-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK4-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
-// CHECK4-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
-// CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK4-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
-// CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK4-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
-// CHECK4-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
-// CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK4-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
-// CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK4: omp.inner.for.cond:
-// CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK4-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP6]], [[TMP7]]
-// CHECK4-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK4: omp.inner.for.body:
-// CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
-// CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4
-// CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
-// CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]]
-// CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
-// CHECK4-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP10]], 1
-// CHECK4-NEXT: store i32 [[ADD1]], i32* [[ARRAYIDX]], align 4
-// CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK4: omp.body.continue:
-// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK4: omp.inner.for.inc:
-// CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK4-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
-// CHECK4-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
-// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
-// CHECK4: omp.inner.for.end:
-// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK4: omp.loop.exit:
-// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
-// CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK4-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
-// CHECK4-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK4: .omp.final.then:
-// CHECK4-NEXT: store i32 10, i32* [[I]], align 4
-// CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK4: .omp.final.done:
-// CHECK4-NEXT: ret void
-// CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l54
-// CHECK4-SAME: ([10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
-// CHECK4-NEXT: entry:
-// CHECK4-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK4-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[F_CASTED:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK4-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK4-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
-// CHECK4-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK4-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK4-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK4-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK4: .execute:
-// CHECK4-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[F_ADDR]], align 4
-// CHECK4-NEXT: store i32 [[TMP2]], i32* [[F_CASTED]], align 4
-// CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[F_CASTED]], align 4
-// CHECK4-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK4-NEXT: call void @__omp_outlined__6(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x [10 x i32]]* [[TMP0]], i32 [[TMP3]]) #[[ATTR3]]
-// CHECK4-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK4: .omp.deinit:
-// CHECK4-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK4-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK4: .exit:
-// CHECK4-NEXT: ret void
-// CHECK4-LABEL: define {{[^@]+}}@__omp_outlined__6
-// CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
-// CHECK4-NEXT: entry:
-// CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK4-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK4-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[K:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[J:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[F_CASTED:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 4
-// CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK4-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK4-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
-// CHECK4-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK4-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK4-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
-// CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
-// CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK4: cond.true:
-// CHECK4-NEXT: br label [[COND_END:%.*]]
-// CHECK4: cond.false:
-// CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK4-NEXT: br label [[COND_END]]
-// CHECK4: cond.end:
-// CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
-// CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK4: omp.inner.for.cond:
-// CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK4-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP6]], 100
-// CHECK4-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK4: omp.inner.for.body:
-// CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[F_ADDR]], align 4
-// CHECK4-NEXT: store i32 [[TMP9]], i32* [[F_CASTED]], align 4
-// CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[F_CASTED]], align 4
-// CHECK4-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK4-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP7]] to i8*
-// CHECK4-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 4
-// CHECK4-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK4-NEXT: [[TMP14:%.*]] = inttoptr i32 [[TMP8]] to i8*
-// CHECK4-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 4
-// CHECK4-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK4-NEXT: [[TMP16:%.*]] = bitcast [10 x [10 x i32]]* [[TMP0]] to i8*
-// CHECK4-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 4
-// CHECK4-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
-// CHECK4-NEXT: [[TMP18:%.*]] = inttoptr i32 [[TMP10]] to i8*
-// CHECK4-NEXT: store i8* [[TMP18]], i8** [[TMP17]], align 4
-// CHECK4-NEXT: [[TMP19:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK4-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, [10 x [10 x i32]]*, i32)* @__omp_outlined__7 to i8*), i8* null, i8** [[TMP19]], i32 4)
-// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK4: omp.inner.for.inc:
-// CHECK4-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK4-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
-// CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
-// CHECK4-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK4-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
-// CHECK4-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK4-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK4-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK4-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
-// CHECK4-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK4-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK4-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP26]], 99
-// CHECK4-NEXT: br i1 [[CMP5]], label [[COND_TRUE6:%.*]], label [[COND_FALSE7:%.*]]
-// CHECK4: cond.true6:
-// CHECK4-NEXT: br label [[COND_END8:%.*]]
-// CHECK4: cond.false7:
-// CHECK4-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK4-NEXT: br label [[COND_END8]]
-// CHECK4: cond.end8:
-// CHECK4-NEXT: [[COND9:%.*]] = phi i32 [ 99, [[COND_TRUE6]] ], [ [[TMP27]], [[COND_FALSE7]] ]
-// CHECK4-NEXT: store i32 [[COND9]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK4-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK4-NEXT: store i32 [[TMP28]], i32* [[DOTOMP_IV]], align 4
-// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]
-// CHECK4: omp.inner.for.end:
-// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK4: omp.loop.exit:
-// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
-// CHECK4-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK4-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0
-// CHECK4-NEXT: br i1 [[TMP30]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK4: .omp.final.then:
-// CHECK4-NEXT: store i32 10, i32* [[I]], align 4
-// CHECK4-NEXT: store i32 10, i32* [[J]], align 4
-// CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK4: .omp.final.done:
-// CHECK4-NEXT: ret void
-// CHECK4-LABEL: define {{[^@]+}}@__omp_outlined__7
-// CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
-// CHECK4-NEXT: entry:
-// CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK4-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[K:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: [[J:%.*]] = alloca i32, align 4
-// CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK4-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK4-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK4-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK4-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
-// CHECK4-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK4-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
-// CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK4-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
-// CHECK4-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
-// CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK4-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
-// CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK4: omp.inner.for.cond:
-// CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK4-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP6]], [[TMP7]]
-// CHECK4-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK4: omp.inner.for.body:
-// CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP8]], 10
-// CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
-// CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4
-// CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK4-NEXT: [[DIV2:%.*]] = sdiv i32 [[TMP10]], 10
-// CHECK4-NEXT: [[MUL3:%.*]] = mul nsw i32 [[DIV2]], 10
-// CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL3]]
-// CHECK4-NEXT: [[MUL4:%.*]] = mul nsw i32 [[SUB]], 1
-// CHECK4-NEXT: [[ADD5:%.*]] = add nsw i32 0, [[MUL4]]
-// CHECK4-NEXT: store i32 [[ADD5]], i32* [[J]], align 4
-// CHECK4-NEXT: store i32 10, i32* [[K]], align 4
-// CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
-// CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[J]], align 4
-// CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[F_ADDR]], align 4
-// CHECK4-NEXT: [[MUL6:%.*]] = mul nsw i32 [[TMP12]], [[TMP13]]
-// CHECK4-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP11]], [[MUL6]]
-// CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[K]], align 4
-// CHECK4-NEXT: [[ADD8:%.*]] = add nsw i32 [[ADD7]], [[TMP14]]
-// CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4
-// CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [10 x i32]], [10 x [10 x i32]]* [[TMP0]], i32 0, i32 [[TMP15]]
-// CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[J]], align 4
-// CHECK4-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP16]]
-// CHECK4-NEXT: store i32 [[ADD8]], i32* [[ARRAYIDX9]], align 4
-// CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK4: omp.body.continue:
-// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK4: omp.inner.for.inc:
-// CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK4-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
-// CHECK4-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
-// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]]
-// CHECK4: omp.inner.for.end:
-// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK4: omp.loop.exit:
-// CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
-// CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK4-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
-// CHECK4-NEXT: br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK4: .omp.final.then:
-// CHECK4-NEXT: store i32 10, i32* [[I]], align 4
-// CHECK4-NEXT: store i32 10, i32* [[J]], align 4
-// CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK4: .omp.final.done:
-// CHECK4-NEXT: ret void
-// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l38
-// CHECK5-SAME: (i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0:[0-9]+]] {
-// CHECK5-NEXT: entry:
-// CHECK5-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK5-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[L_CASTED:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK5-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK5-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK5-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
-// CHECK5-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK5-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK5-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK5-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK5: .execute:
-// CHECK5-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]])
-// CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK5-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
-// CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[L_ADDR]], align 4
-// CHECK5-NEXT: store i32 [[TMP4]], i32* [[L_CASTED]], align 4
-// CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[L_CASTED]], align 4
-// CHECK5-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK5-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP3]], [1000 x i32]* [[TMP0]], i32 [[TMP5]]) #[[ATTR3:[0-9]+]]
-// CHECK5-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK5: .omp.deinit:
-// CHECK5-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK5-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK5: .exit:
-// CHECK5-NEXT: ret void
-// CHECK5-LABEL: define {{[^@]+}}@__omp_outlined__
-// CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0]] {
-// CHECK5-NEXT: entry:
-// CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK5-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK5-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[I4:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[L_CASTED:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [5 x i8*], align 4
-// CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK5-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK5-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK5-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
-// CHECK5-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK5-NEXT: [[TMP1:%.*]] = call i8* @__kmpc_data_sharing_push_stack(i32 4, i16 1)
-// CHECK5-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to %struct._globalized_locals_ty*
-// CHECK5-NEXT: [[L1:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY:%.*]], %struct._globalized_locals_ty* [[TMP2]], i32 0, i32 0
-// CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK5-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK5-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
-// CHECK5-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK5-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK5-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK5-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK5-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
-// CHECK5-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK5: omp.precond.then:
-// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK5-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 128)
-// CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK5-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
-// CHECK5-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK5: cond.true:
-// CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK5-NEXT: br label [[COND_END:%.*]]
-// CHECK5: cond.false:
-// CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: br label [[COND_END]]
-// CHECK5: cond.end:
-// CHECK5-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
-// CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK5-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK5: omp.inner.for.cond:
-// CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], 1
-// CHECK5-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP14]], [[ADD]]
-// CHECK5-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK5: omp.inner.for.body:
-// CHECK5-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK5-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: [[TMP18:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK5-NEXT: store i32 [[TMP18]], i32* [[N_CASTED]], align 4
-// CHECK5-NEXT: [[TMP19:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK5-NEXT: [[TMP20:%.*]] = load i32, i32* [[L_ADDR]], align 4
-// CHECK5-NEXT: store i32 [[TMP20]], i32* [[L_CASTED]], align 4
-// CHECK5-NEXT: [[TMP21:%.*]] = load i32, i32* [[L_CASTED]], align 4
-// CHECK5-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK5-NEXT: [[TMP23:%.*]] = inttoptr i32 [[TMP16]] to i8*
-// CHECK5-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 4
-// CHECK5-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK5-NEXT: [[TMP25:%.*]] = inttoptr i32 [[TMP17]] to i8*
-// CHECK5-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 4
-// CHECK5-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK5-NEXT: [[TMP27:%.*]] = inttoptr i32 [[TMP19]] to i8*
-// CHECK5-NEXT: store i8* [[TMP27]], i8** [[TMP26]], align 4
-// CHECK5-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
-// CHECK5-NEXT: [[TMP29:%.*]] = bitcast [1000 x i32]* [[TMP0]] to i8*
-// CHECK5-NEXT: store i8* [[TMP29]], i8** [[TMP28]], align 4
-// CHECK5-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 4
-// CHECK5-NEXT: [[TMP31:%.*]] = inttoptr i32 [[TMP21]] to i8*
-// CHECK5-NEXT: store i8* [[TMP31]], i8** [[TMP30]], align 4
-// CHECK5-NEXT: [[TMP32:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK5-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4
-// CHECK5-NEXT: [[TMP34:%.*]] = bitcast [5 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK5-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP33]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i32]*, i32)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP34]], i32 5)
-// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK5: omp.inner.for.inc:
-// CHECK5-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK5-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP35]], [[TMP36]]
-// CHECK5-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK5-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK5-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP37]], [[TMP38]]
-// CHECK5-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK5-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK5-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP39]], [[TMP40]]
-// CHECK5-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK5-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP41]], [[TMP42]]
-// CHECK5-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
-// CHECK5: cond.true11:
-// CHECK5-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK5-NEXT: br label [[COND_END13:%.*]]
-// CHECK5: cond.false12:
-// CHECK5-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: br label [[COND_END13]]
-// CHECK5: cond.end13:
-// CHECK5-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP43]], [[COND_TRUE11]] ], [ [[TMP44]], [[COND_FALSE12]] ]
-// CHECK5-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK5-NEXT: store i32 [[TMP45]], i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
-// CHECK5: omp.inner.for.end:
-// CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK5: omp.loop.exit:
-// CHECK5-NEXT: [[TMP46:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK5-NEXT: [[TMP47:%.*]] = load i32, i32* [[TMP46]], align 4
-// CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP47]])
-// CHECK5-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK5-NEXT: [[TMP49:%.*]] = icmp ne i32 [[TMP48]], 0
-// CHECK5-NEXT: br i1 [[TMP49]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK5: .omp.final.then:
-// CHECK5-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK5-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP50]], 0
-// CHECK5-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1
-// CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV16]], 1
-// CHECK5-NEXT: [[ADD17:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK5-NEXT: store i32 [[ADD17]], i32* [[I4]], align 4
-// CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK5: .omp.final.done:
-// CHECK5-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK5-NEXT: [[TMP52:%.*]] = icmp ne i32 [[TMP51]], 0
-// CHECK5-NEXT: br i1 [[TMP52]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
-// CHECK5: .omp.lastprivate.then:
-// CHECK5-NEXT: [[TMP53:%.*]] = load i32, i32* [[L_ADDR]], align 4
-// CHECK5-NEXT: store i32 [[TMP53]], i32* [[L_ADDR]], align 4
-// CHECK5-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
-// CHECK5: .omp.lastprivate.done:
-// CHECK5-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK5: omp.precond.end:
-// CHECK5-NEXT: call void @__kmpc_data_sharing_pop_stack(i8* [[TMP1]])
-// CHECK5-NEXT: ret void
-// CHECK5-LABEL: define {{[^@]+}}@__omp_outlined__1
-// CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0]] {
-// CHECK5-NEXT: entry:
-// CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK5-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK5-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK5-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK5-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK5-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK5-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
-// CHECK5-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK5-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK5-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK5-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK5-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK5-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK5-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK5-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK5-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK5: omp.precond.then:
-// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK5-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
-// CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
-// CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
-// CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK5-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 32)
-// CHECK5-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
-// CHECK5: omp.dispatch.cond:
-// CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK5-NEXT: [[CMP4:%.*]] = icmp ugt i32 [[TMP9]], [[TMP10]]
-// CHECK5-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK5: cond.true:
-// CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK5-NEXT: br label [[COND_END:%.*]]
-// CHECK5: cond.false:
-// CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK5-NEXT: br label [[COND_END]]
-// CHECK5: cond.end:
-// CHECK5-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
-// CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
-// CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK5-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK5-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
-// CHECK5-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
-// CHECK5: omp.dispatch.body:
-// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK5: omp.inner.for.cond:
-// CHECK5-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK5-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
-// CHECK5-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK5: omp.inner.for.body:
-// CHECK5-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
-// CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK5-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
-// CHECK5-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4
-// CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 [[TMP19]]
-// CHECK5-NEXT: store i32 1, i32* [[ARRAYIDX]], align 4
-// CHECK5-NEXT: [[TMP20:%.*]] = load i32, i32* [[I3]], align 4
-// CHECK5-NEXT: store i32 [[TMP20]], i32* [[L_ADDR]], align 4
-// CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK5: omp.body.continue:
-// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK5: omp.inner.for.inc:
-// CHECK5-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP21]], 1
-// CHECK5-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
-// CHECK5: omp.inner.for.end:
-// CHECK5-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
-// CHECK5: omp.dispatch.inc:
-// CHECK5-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK5-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK5-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
-// CHECK5-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4
-// CHECK5-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK5-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK5-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
-// CHECK5-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4
-// CHECK5-NEXT: br label [[OMP_DISPATCH_COND]]
-// CHECK5: omp.dispatch.end:
-// CHECK5-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK5-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
-// CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP27]])
-// CHECK5-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK5-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
-// CHECK5-NEXT: br i1 [[TMP29]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK5: .omp.final.then:
-// CHECK5-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK5-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP30]], 0
-// CHECK5-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1
-// CHECK5-NEXT: [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 1
-// CHECK5-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]]
-// CHECK5-NEXT: store i32 [[ADD13]], i32* [[I3]], align 4
-// CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK5: .omp.final.done:
-// CHECK5-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK5-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
-// CHECK5-NEXT: br i1 [[TMP32]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
-// CHECK5: .omp.lastprivate.then:
-// CHECK5-NEXT: [[TMP33:%.*]] = load i32, i32* [[L_ADDR]], align 4
-// CHECK5-NEXT: store i32 [[TMP33]], i32* [[L_ADDR]], align 4
-// CHECK5-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
-// CHECK5: .omp.lastprivate.done:
-// CHECK5-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK5: omp.precond.end:
-// CHECK5-NEXT: ret void
-// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l44
-// CHECK5-SAME: (i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
-// CHECK5-NEXT: entry:
-// CHECK5-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
-// CHECK5-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK5-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK5-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK5-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK5-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK5-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK5-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK5: .execute:
-// CHECK5-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK5-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
-// CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK5-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK5-NEXT: call void @__omp_outlined__2(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP3]], [1000 x i16]* [[TMP0]]) #[[ATTR3]]
-// CHECK5-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK5: .omp.deinit:
-// CHECK5-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK5-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK5: .exit:
-// CHECK5-NEXT: ret void
-// CHECK5-LABEL: define {{[^@]+}}@__omp_outlined__2
-// CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
-// CHECK5-NEXT: entry:
-// CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK5-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
-// CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 4
-// CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK5-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK5-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK5-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK5-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK5-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK5-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK5-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK5-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK5-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK5-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK5-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK5: omp.precond.then:
-// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK5-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK5-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK5-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
-// CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK5-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
-// CHECK5-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK5: cond.true:
-// CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK5-NEXT: br label [[COND_END:%.*]]
-// CHECK5: cond.false:
-// CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: br label [[COND_END]]
-// CHECK5: cond.end:
-// CHECK5-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
-// CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK5-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK5: omp.inner.for.cond:
-// CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1
-// CHECK5-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]
-// CHECK5-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK5: omp.inner.for.body:
-// CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: [[TMP16:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK5-NEXT: store i32 [[TMP16]], i32* [[N_CASTED]], align 4
-// CHECK5-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK5-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK5-NEXT: [[TMP19:%.*]] = inttoptr i32 [[TMP14]] to i8*
-// CHECK5-NEXT: store i8* [[TMP19]], i8** [[TMP18]], align 4
-// CHECK5-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK5-NEXT: [[TMP21:%.*]] = inttoptr i32 [[TMP15]] to i8*
-// CHECK5-NEXT: store i8* [[TMP21]], i8** [[TMP20]], align 4
-// CHECK5-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK5-NEXT: [[TMP23:%.*]] = inttoptr i32 [[TMP17]] to i8*
-// CHECK5-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 4
-// CHECK5-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
-// CHECK5-NEXT: [[TMP25:%.*]] = bitcast [1000 x i16]* [[TMP0]] to i8*
-// CHECK5-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 4
-// CHECK5-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK5-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
-// CHECK5-NEXT: [[TMP28:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK5-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP27]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i16]*)* @__omp_outlined__3 to i8*), i8* null, i8** [[TMP28]], i32 4)
-// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK5: omp.inner.for.inc:
-// CHECK5-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK5-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP29]], [[TMP30]]
-// CHECK5-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK5-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK5-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP31]], [[TMP32]]
-// CHECK5-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK5-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK5-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP33]], [[TMP34]]
-// CHECK5-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK5-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP35]], [[TMP36]]
-// CHECK5-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]]
-// CHECK5: cond.true10:
-// CHECK5-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK5-NEXT: br label [[COND_END12:%.*]]
-// CHECK5: cond.false11:
-// CHECK5-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: br label [[COND_END12]]
-// CHECK5: cond.end12:
-// CHECK5-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP37]], [[COND_TRUE10]] ], [ [[TMP38]], [[COND_FALSE11]] ]
-// CHECK5-NEXT: store i32 [[COND13]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK5-NEXT: store i32 [[TMP39]], i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
-// CHECK5: omp.inner.for.end:
-// CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK5: omp.loop.exit:
-// CHECK5-NEXT: [[TMP40:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK5-NEXT: [[TMP41:%.*]] = load i32, i32* [[TMP40]], align 4
-// CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP41]])
-// CHECK5-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK5-NEXT: [[TMP43:%.*]] = icmp ne i32 [[TMP42]], 0
-// CHECK5-NEXT: br i1 [[TMP43]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK5: .omp.final.then:
-// CHECK5-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK5-NEXT: [[SUB14:%.*]] = sub nsw i32 [[TMP44]], 0
-// CHECK5-NEXT: [[DIV15:%.*]] = sdiv i32 [[SUB14]], 1
-// CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV15]], 1
-// CHECK5-NEXT: [[ADD16:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK5-NEXT: store i32 [[ADD16]], i32* [[I3]], align 4
-// CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK5: .omp.final.done:
-// CHECK5-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK5: omp.precond.end:
-// CHECK5-NEXT: ret void
-// CHECK5-LABEL: define {{[^@]+}}@__omp_outlined__3
-// CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
-// CHECK5-NEXT: entry:
-// CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
-// CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK5-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK5-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK5-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK5-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK5-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK5-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK5-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK5-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK5-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK5-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK5-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK5-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK5-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK5: omp.precond.then:
-// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK5-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
-// CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
-// CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
-// CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK5-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK5-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK5: omp.inner.for.cond:
-// CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK5-NEXT: [[CMP4:%.*]] = icmp ule i32 [[TMP10]], [[TMP11]]
-// CHECK5-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK5: omp.inner.for.body:
-// CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
-// CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK5-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
-// CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[I3]], align 4
-// CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i16], [1000 x i16]* [[TMP0]], i32 0, i32 [[TMP13]]
-// CHECK5-NEXT: [[TMP14:%.*]] = load i16, i16* [[ARRAYIDX]], align 2
-// CHECK5-NEXT: [[CONV:%.*]] = sext i16 [[TMP14]] to i32
-// CHECK5-NEXT: [[ADD5:%.*]] = add nsw i32 [[CONV]], 1
-// CHECK5-NEXT: [[CONV6:%.*]] = trunc i32 [[ADD5]] to i16
-// CHECK5-NEXT: store i16 [[CONV6]], i16* [[ARRAYIDX]], align 2
-// CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK5: omp.body.continue:
-// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK5: omp.inner.for.inc:
-// CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK5-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
-// CHECK5-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
-// CHECK5: omp.inner.for.end:
-// CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK5: omp.loop.exit:
-// CHECK5-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK5-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
-// CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]])
-// CHECK5-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK5-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
-// CHECK5-NEXT: br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK5: .omp.final.then:
-// CHECK5-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK5-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP21]], 0
-// CHECK5-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1
-// CHECK5-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1
-// CHECK5-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
-// CHECK5-NEXT: store i32 [[ADD11]], i32* [[I3]], align 4
-// CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK5: .omp.final.done:
-// CHECK5-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK5: omp.precond.end:
-// CHECK5-NEXT: ret void
-// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l49
-// CHECK5-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
-// CHECK5-NEXT: entry:
-// CHECK5-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
-// CHECK5-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK5-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
-// CHECK5-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
-// CHECK5-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK5-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK5-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK5: .execute:
-// CHECK5-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK5-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK5-NEXT: call void @__omp_outlined__4(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x i32]* [[TMP0]]) #[[ATTR3]]
-// CHECK5-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK5: .omp.deinit:
-// CHECK5-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK5-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK5: .exit:
-// CHECK5-NEXT: ret void
-// CHECK5-LABEL: define {{[^@]+}}@__omp_outlined__4
-// CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
-// CHECK5-NEXT: entry:
-// CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK5-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
-// CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [3 x i8*], align 4
-// CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK5-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
-// CHECK5-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
-// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK5-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK5-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK5-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
-// CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
-// CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK5: cond.true:
-// CHECK5-NEXT: br label [[COND_END:%.*]]
-// CHECK5: cond.false:
-// CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: br label [[COND_END]]
-// CHECK5: cond.end:
-// CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
-// CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK5: omp.inner.for.cond:
-// CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP6]], 10
-// CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK5: omp.inner.for.body:
-// CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK5-NEXT: [[TMP10:%.*]] = inttoptr i32 [[TMP7]] to i8*
-// CHECK5-NEXT: store i8* [[TMP10]], i8** [[TMP9]], align 4
-// CHECK5-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK5-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP8]] to i8*
-// CHECK5-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 4
-// CHECK5-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK5-NEXT: [[TMP14:%.*]] = bitcast [10 x i32]* [[TMP0]] to i8*
-// CHECK5-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 4
-// CHECK5-NEXT: [[TMP15:%.*]] = bitcast [3 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK5-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @__omp_outlined__5 to i8*), i8* null, i8** [[TMP15]], i32 3)
-// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK5: omp.inner.for.inc:
-// CHECK5-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
-// CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK5-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK5-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
-// CHECK5-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK5-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
-// CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP22]], 9
-// CHECK5-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
-// CHECK5: cond.true5:
-// CHECK5-NEXT: br label [[COND_END7:%.*]]
-// CHECK5: cond.false6:
-// CHECK5-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: br label [[COND_END7]]
-// CHECK5: cond.end7:
-// CHECK5-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP23]], [[COND_FALSE6]] ]
-// CHECK5-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK5-NEXT: store i32 [[TMP24]], i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
-// CHECK5: omp.inner.for.end:
-// CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK5: omp.loop.exit:
-// CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
-// CHECK5-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK5-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
-// CHECK5-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK5: .omp.final.then:
-// CHECK5-NEXT: store i32 10, i32* [[I]], align 4
-// CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK5: .omp.final.done:
-// CHECK5-NEXT: ret void
-// CHECK5-LABEL: define {{[^@]+}}@__omp_outlined__5
-// CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
-// CHECK5-NEXT: entry:
-// CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
-// CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK5-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK5-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK5-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
-// CHECK5-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
-// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK5-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
-// CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK5-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
-// CHECK5-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
-// CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK5-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
-// CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK5: omp.inner.for.cond:
-// CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK5-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP6]], [[TMP7]]
-// CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK5: omp.inner.for.body:
-// CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
-// CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4
-// CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
-// CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]]
-// CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
-// CHECK5-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP10]], 1
-// CHECK5-NEXT: store i32 [[ADD1]], i32* [[ARRAYIDX]], align 4
-// CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK5: omp.body.continue:
-// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK5: omp.inner.for.inc:
-// CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK5-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
-// CHECK5-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
-// CHECK5: omp.inner.for.end:
-// CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK5: omp.loop.exit:
-// CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
-// CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK5-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
-// CHECK5-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK5: .omp.final.then:
-// CHECK5-NEXT: store i32 10, i32* [[I]], align 4
-// CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK5: .omp.final.done:
-// CHECK5-NEXT: ret void
-// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l54
-// CHECK5-SAME: ([10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
-// CHECK5-NEXT: entry:
-// CHECK5-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK5-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[F_CASTED:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK5-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK5-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
-// CHECK5-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK5-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK5-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK5-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK5: .execute:
-// CHECK5-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[F_ADDR]], align 4
-// CHECK5-NEXT: store i32 [[TMP2]], i32* [[F_CASTED]], align 4
-// CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[F_CASTED]], align 4
-// CHECK5-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK5-NEXT: call void @__omp_outlined__6(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x [10 x i32]]* [[TMP0]], i32 [[TMP3]]) #[[ATTR3]]
-// CHECK5-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK5: .omp.deinit:
-// CHECK5-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK5-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK5: .exit:
-// CHECK5-NEXT: ret void
-// CHECK5-LABEL: define {{[^@]+}}@__omp_outlined__6
-// CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
-// CHECK5-NEXT: entry:
-// CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK5-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK5-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[K:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[J:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[F_CASTED:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 4
-// CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK5-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK5-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
-// CHECK5-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK5-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK5-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK5-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
-// CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
-// CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK5: cond.true:
-// CHECK5-NEXT: br label [[COND_END:%.*]]
-// CHECK5: cond.false:
-// CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: br label [[COND_END]]
-// CHECK5: cond.end:
-// CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
-// CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK5: omp.inner.for.cond:
-// CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP6]], 100
-// CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK5: omp.inner.for.body:
-// CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[F_ADDR]], align 4
-// CHECK5-NEXT: store i32 [[TMP9]], i32* [[F_CASTED]], align 4
-// CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[F_CASTED]], align 4
-// CHECK5-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK5-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP7]] to i8*
-// CHECK5-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 4
-// CHECK5-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK5-NEXT: [[TMP14:%.*]] = inttoptr i32 [[TMP8]] to i8*
-// CHECK5-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 4
-// CHECK5-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK5-NEXT: [[TMP16:%.*]] = bitcast [10 x [10 x i32]]* [[TMP0]] to i8*
-// CHECK5-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 4
-// CHECK5-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
-// CHECK5-NEXT: [[TMP18:%.*]] = inttoptr i32 [[TMP10]] to i8*
-// CHECK5-NEXT: store i8* [[TMP18]], i8** [[TMP17]], align 4
-// CHECK5-NEXT: [[TMP19:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK5-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, [10 x [10 x i32]]*, i32)* @__omp_outlined__7 to i8*), i8* null, i8** [[TMP19]], i32 4)
-// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK5: omp.inner.for.inc:
-// CHECK5-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
-// CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK5-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
-// CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK5-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK5-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
-// CHECK5-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP26]], 99
-// CHECK5-NEXT: br i1 [[CMP5]], label [[COND_TRUE6:%.*]], label [[COND_FALSE7:%.*]]
-// CHECK5: cond.true6:
-// CHECK5-NEXT: br label [[COND_END8:%.*]]
-// CHECK5: cond.false7:
-// CHECK5-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: br label [[COND_END8]]
-// CHECK5: cond.end8:
-// CHECK5-NEXT: [[COND9:%.*]] = phi i32 [ 99, [[COND_TRUE6]] ], [ [[TMP27]], [[COND_FALSE7]] ]
-// CHECK5-NEXT: store i32 [[COND9]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK5-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK5-NEXT: store i32 [[TMP28]], i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]
-// CHECK5: omp.inner.for.end:
-// CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK5: omp.loop.exit:
-// CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
-// CHECK5-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK5-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0
-// CHECK5-NEXT: br i1 [[TMP30]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK5: .omp.final.then:
-// CHECK5-NEXT: store i32 10, i32* [[I]], align 4
-// CHECK5-NEXT: store i32 10, i32* [[J]], align 4
-// CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK5: .omp.final.done:
-// CHECK5-NEXT: ret void
-// CHECK5-LABEL: define {{[^@]+}}@__omp_outlined__7
-// CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
-// CHECK5-NEXT: entry:
-// CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK5-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[K:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: [[J:%.*]] = alloca i32, align 4
-// CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK5-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK5-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK5-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK5-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
-// CHECK5-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
-// CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK5-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
-// CHECK5-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
-// CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK5-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
-// CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK5: omp.inner.for.cond:
-// CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK5-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP6]], [[TMP7]]
-// CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK5: omp.inner.for.body:
-// CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP8]], 10
-// CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
-// CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4
-// CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: [[DIV2:%.*]] = sdiv i32 [[TMP10]], 10
-// CHECK5-NEXT: [[MUL3:%.*]] = mul nsw i32 [[DIV2]], 10
-// CHECK5-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL3]]
-// CHECK5-NEXT: [[MUL4:%.*]] = mul nsw i32 [[SUB]], 1
-// CHECK5-NEXT: [[ADD5:%.*]] = add nsw i32 0, [[MUL4]]
-// CHECK5-NEXT: store i32 [[ADD5]], i32* [[J]], align 4
-// CHECK5-NEXT: store i32 10, i32* [[K]], align 4
-// CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
-// CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[J]], align 4
-// CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[F_ADDR]], align 4
-// CHECK5-NEXT: [[MUL6:%.*]] = mul nsw i32 [[TMP12]], [[TMP13]]
-// CHECK5-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP11]], [[MUL6]]
-// CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[K]], align 4
-// CHECK5-NEXT: [[ADD8:%.*]] = add nsw i32 [[ADD7]], [[TMP14]]
-// CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4
-// CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [10 x i32]], [10 x [10 x i32]]* [[TMP0]], i32 0, i32 [[TMP15]]
-// CHECK5-NEXT: [[TMP16:%.*]] = load i32, i32* [[J]], align 4
-// CHECK5-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP16]]
-// CHECK5-NEXT: store i32 [[ADD8]], i32* [[ARRAYIDX9]], align 4
-// CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK5: omp.body.continue:
-// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK5: omp.inner.for.inc:
-// CHECK5-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK5-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
-// CHECK5-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]]
-// CHECK5: omp.inner.for.end:
-// CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK5: omp.loop.exit:
-// CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
-// CHECK5-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK5-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
-// CHECK5-NEXT: br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK5: .omp.final.then:
-// CHECK5-NEXT: store i32 10, i32* [[I]], align 4
-// CHECK5-NEXT: store i32 10, i32* [[J]], align 4
-// CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK5: .omp.final.done:
-// CHECK5-NEXT: ret void
-// CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l38
-// CHECK6-SAME: (i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0:[0-9]+]] {
-// CHECK6-NEXT: entry:
-// CHECK6-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK6-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[L_CASTED:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK6-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK6-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK6-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
-// CHECK6-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK6-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK6-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK6-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK6: .execute:
-// CHECK6-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]])
-// CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK6-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
-// CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[L_ADDR]], align 4
-// CHECK6-NEXT: store i32 [[TMP4]], i32* [[L_CASTED]], align 4
-// CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[L_CASTED]], align 4
-// CHECK6-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK6-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP3]], [1000 x i32]* [[TMP0]], i32 [[TMP5]]) #[[ATTR3:[0-9]+]]
-// CHECK6-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK6: .omp.deinit:
-// CHECK6-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK6-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK6: .exit:
-// CHECK6-NEXT: ret void
-// CHECK6-LABEL: define {{[^@]+}}@__omp_outlined__
-// CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0]] {
-// CHECK6-NEXT: entry:
-// CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK6-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK6-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[I4:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[L_CASTED:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [5 x i8*], align 4
-// CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK6-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK6-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK6-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
-// CHECK6-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK6-NEXT: [[TMP1:%.*]] = call i8* @__kmpc_data_sharing_push_stack(i32 4, i16 1)
-// CHECK6-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to %struct._globalized_locals_ty*
-// CHECK6-NEXT: [[L1:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY:%.*]], %struct._globalized_locals_ty* [[TMP2]], i32 0, i32 0
-// CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK6-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK6-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
-// CHECK6-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK6-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK6-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK6-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK6-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
-// CHECK6-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK6: omp.precond.then:
-// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK6-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK6-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 128)
-// CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK6-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
-// CHECK6-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK6: cond.true:
-// CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK6-NEXT: br label [[COND_END:%.*]]
-// CHECK6: cond.false:
-// CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: br label [[COND_END]]
-// CHECK6: cond.end:
-// CHECK6-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
-// CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK6-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK6: omp.inner.for.cond:
-// CHECK6-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], 1
-// CHECK6-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP14]], [[ADD]]
-// CHECK6-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK6: omp.inner.for.body:
-// CHECK6-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK6-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: [[TMP18:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK6-NEXT: store i32 [[TMP18]], i32* [[N_CASTED]], align 4
-// CHECK6-NEXT: [[TMP19:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK6-NEXT: [[TMP20:%.*]] = load i32, i32* [[L_ADDR]], align 4
-// CHECK6-NEXT: store i32 [[TMP20]], i32* [[L_CASTED]], align 4
-// CHECK6-NEXT: [[TMP21:%.*]] = load i32, i32* [[L_CASTED]], align 4
-// CHECK6-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK6-NEXT: [[TMP23:%.*]] = inttoptr i32 [[TMP16]] to i8*
-// CHECK6-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 4
-// CHECK6-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK6-NEXT: [[TMP25:%.*]] = inttoptr i32 [[TMP17]] to i8*
-// CHECK6-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 4
-// CHECK6-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK6-NEXT: [[TMP27:%.*]] = inttoptr i32 [[TMP19]] to i8*
-// CHECK6-NEXT: store i8* [[TMP27]], i8** [[TMP26]], align 4
-// CHECK6-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
-// CHECK6-NEXT: [[TMP29:%.*]] = bitcast [1000 x i32]* [[TMP0]] to i8*
-// CHECK6-NEXT: store i8* [[TMP29]], i8** [[TMP28]], align 4
-// CHECK6-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 4
-// CHECK6-NEXT: [[TMP31:%.*]] = inttoptr i32 [[TMP21]] to i8*
-// CHECK6-NEXT: store i8* [[TMP31]], i8** [[TMP30]], align 4
-// CHECK6-NEXT: [[TMP32:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK6-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4
-// CHECK6-NEXT: [[TMP34:%.*]] = bitcast [5 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK6-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP33]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i32]*, i32)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP34]], i32 5)
-// CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK6: omp.inner.for.inc:
-// CHECK6-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK6-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP35]], [[TMP36]]
-// CHECK6-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK6-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK6-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP37]], [[TMP38]]
-// CHECK6-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK6-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK6-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP39]], [[TMP40]]
-// CHECK6-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK6-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP41]], [[TMP42]]
-// CHECK6-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
-// CHECK6: cond.true11:
-// CHECK6-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK6-NEXT: br label [[COND_END13:%.*]]
-// CHECK6: cond.false12:
-// CHECK6-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: br label [[COND_END13]]
-// CHECK6: cond.end13:
-// CHECK6-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP43]], [[COND_TRUE11]] ], [ [[TMP44]], [[COND_FALSE12]] ]
-// CHECK6-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK6-NEXT: store i32 [[TMP45]], i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
-// CHECK6: omp.inner.for.end:
-// CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK6: omp.loop.exit:
-// CHECK6-NEXT: [[TMP46:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK6-NEXT: [[TMP47:%.*]] = load i32, i32* [[TMP46]], align 4
-// CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP47]])
-// CHECK6-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK6-NEXT: [[TMP49:%.*]] = icmp ne i32 [[TMP48]], 0
-// CHECK6-NEXT: br i1 [[TMP49]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK6: .omp.final.then:
-// CHECK6-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK6-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP50]], 0
-// CHECK6-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1
-// CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV16]], 1
-// CHECK6-NEXT: [[ADD17:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK6-NEXT: store i32 [[ADD17]], i32* [[I4]], align 4
-// CHECK6-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK6: .omp.final.done:
-// CHECK6-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK6-NEXT: [[TMP52:%.*]] = icmp ne i32 [[TMP51]], 0
-// CHECK6-NEXT: br i1 [[TMP52]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
-// CHECK6: .omp.lastprivate.then:
-// CHECK6-NEXT: [[TMP53:%.*]] = load i32, i32* [[L_ADDR]], align 4
-// CHECK6-NEXT: store i32 [[TMP53]], i32* [[L_ADDR]], align 4
-// CHECK6-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
-// CHECK6: .omp.lastprivate.done:
-// CHECK6-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK6: omp.precond.end:
-// CHECK6-NEXT: call void @__kmpc_data_sharing_pop_stack(i8* [[TMP1]])
-// CHECK6-NEXT: ret void
-// CHECK6-LABEL: define {{[^@]+}}@__omp_outlined__1
-// CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0]] {
-// CHECK6-NEXT: entry:
-// CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK6-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK6-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK6-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK6-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK6-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK6-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK6-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
-// CHECK6-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK6-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK6-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK6-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK6-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK6-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK6-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK6-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK6-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK6: omp.precond.then:
-// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK6-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
-// CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK6-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
-// CHECK6-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
-// CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK6-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 32)
-// CHECK6-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
-// CHECK6: omp.dispatch.cond:
-// CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK6-NEXT: [[CMP4:%.*]] = icmp ugt i32 [[TMP9]], [[TMP10]]
-// CHECK6-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK6: cond.true:
-// CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK6-NEXT: br label [[COND_END:%.*]]
-// CHECK6: cond.false:
-// CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK6-NEXT: br label [[COND_END]]
-// CHECK6: cond.end:
-// CHECK6-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
-// CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
-// CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK6-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK6-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
-// CHECK6-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
-// CHECK6: omp.dispatch.body:
-// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK6: omp.inner.for.cond:
-// CHECK6-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK6-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
-// CHECK6-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK6: omp.inner.for.body:
-// CHECK6-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
-// CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK6-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
-// CHECK6-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4
-// CHECK6-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 [[TMP19]]
-// CHECK6-NEXT: store i32 1, i32* [[ARRAYIDX]], align 4
-// CHECK6-NEXT: [[TMP20:%.*]] = load i32, i32* [[I3]], align 4
-// CHECK6-NEXT: store i32 [[TMP20]], i32* [[L_ADDR]], align 4
-// CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK6: omp.body.continue:
-// CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK6: omp.inner.for.inc:
-// CHECK6-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP21]], 1
-// CHECK6-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
-// CHECK6: omp.inner.for.end:
-// CHECK6-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
-// CHECK6: omp.dispatch.inc:
-// CHECK6-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK6-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK6-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
-// CHECK6-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4
-// CHECK6-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK6-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK6-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
-// CHECK6-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4
-// CHECK6-NEXT: br label [[OMP_DISPATCH_COND]]
-// CHECK6: omp.dispatch.end:
-// CHECK6-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK6-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
-// CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP27]])
-// CHECK6-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK6-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
-// CHECK6-NEXT: br i1 [[TMP29]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK6: .omp.final.then:
-// CHECK6-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK6-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP30]], 0
-// CHECK6-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1
-// CHECK6-NEXT: [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 1
-// CHECK6-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]]
-// CHECK6-NEXT: store i32 [[ADD13]], i32* [[I3]], align 4
-// CHECK6-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK6: .omp.final.done:
-// CHECK6-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK6-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
-// CHECK6-NEXT: br i1 [[TMP32]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
-// CHECK6: .omp.lastprivate.then:
-// CHECK6-NEXT: [[TMP33:%.*]] = load i32, i32* [[L_ADDR]], align 4
-// CHECK6-NEXT: store i32 [[TMP33]], i32* [[L_ADDR]], align 4
-// CHECK6-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
-// CHECK6: .omp.lastprivate.done:
-// CHECK6-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK6: omp.precond.end:
-// CHECK6-NEXT: ret void
-// CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l44
-// CHECK6-SAME: (i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
-// CHECK6-NEXT: entry:
-// CHECK6-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
-// CHECK6-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK6-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK6-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK6-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK6-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK6-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK6-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK6: .execute:
-// CHECK6-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK6-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
-// CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK6-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK6-NEXT: call void @__omp_outlined__2(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP3]], [1000 x i16]* [[TMP0]]) #[[ATTR3]]
-// CHECK6-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK6: .omp.deinit:
-// CHECK6-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK6-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK6: .exit:
-// CHECK6-NEXT: ret void
-// CHECK6-LABEL: define {{[^@]+}}@__omp_outlined__2
-// CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
-// CHECK6-NEXT: entry:
-// CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK6-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
-// CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 4
-// CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK6-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK6-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK6-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK6-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK6-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK6-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK6-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK6-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK6-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK6-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK6-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK6: omp.precond.then:
-// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK6-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK6-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK6-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
-// CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK6-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
-// CHECK6-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK6: cond.true:
-// CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK6-NEXT: br label [[COND_END:%.*]]
-// CHECK6: cond.false:
-// CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: br label [[COND_END]]
-// CHECK6: cond.end:
-// CHECK6-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
-// CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK6-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK6: omp.inner.for.cond:
-// CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1
-// CHECK6-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]
-// CHECK6-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK6: omp.inner.for.body:
-// CHECK6-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK6-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: [[TMP16:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK6-NEXT: store i32 [[TMP16]], i32* [[N_CASTED]], align 4
-// CHECK6-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK6-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK6-NEXT: [[TMP19:%.*]] = inttoptr i32 [[TMP14]] to i8*
-// CHECK6-NEXT: store i8* [[TMP19]], i8** [[TMP18]], align 4
-// CHECK6-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK6-NEXT: [[TMP21:%.*]] = inttoptr i32 [[TMP15]] to i8*
-// CHECK6-NEXT: store i8* [[TMP21]], i8** [[TMP20]], align 4
-// CHECK6-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK6-NEXT: [[TMP23:%.*]] = inttoptr i32 [[TMP17]] to i8*
-// CHECK6-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 4
-// CHECK6-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
-// CHECK6-NEXT: [[TMP25:%.*]] = bitcast [1000 x i16]* [[TMP0]] to i8*
-// CHECK6-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 4
-// CHECK6-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK6-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
-// CHECK6-NEXT: [[TMP28:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK6-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP27]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i16]*)* @__omp_outlined__3 to i8*), i8* null, i8** [[TMP28]], i32 4)
-// CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK6: omp.inner.for.inc:
-// CHECK6-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK6-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP29]], [[TMP30]]
-// CHECK6-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK6-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK6-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP31]], [[TMP32]]
-// CHECK6-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK6-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK6-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP33]], [[TMP34]]
-// CHECK6-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK6-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP35]], [[TMP36]]
-// CHECK6-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]]
-// CHECK6: cond.true10:
-// CHECK6-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK6-NEXT: br label [[COND_END12:%.*]]
-// CHECK6: cond.false11:
-// CHECK6-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: br label [[COND_END12]]
-// CHECK6: cond.end12:
-// CHECK6-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP37]], [[COND_TRUE10]] ], [ [[TMP38]], [[COND_FALSE11]] ]
-// CHECK6-NEXT: store i32 [[COND13]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK6-NEXT: store i32 [[TMP39]], i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
-// CHECK6: omp.inner.for.end:
-// CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK6: omp.loop.exit:
-// CHECK6-NEXT: [[TMP40:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK6-NEXT: [[TMP41:%.*]] = load i32, i32* [[TMP40]], align 4
-// CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP41]])
-// CHECK6-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK6-NEXT: [[TMP43:%.*]] = icmp ne i32 [[TMP42]], 0
-// CHECK6-NEXT: br i1 [[TMP43]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK6: .omp.final.then:
-// CHECK6-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK6-NEXT: [[SUB14:%.*]] = sub nsw i32 [[TMP44]], 0
-// CHECK6-NEXT: [[DIV15:%.*]] = sdiv i32 [[SUB14]], 1
-// CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV15]], 1
-// CHECK6-NEXT: [[ADD16:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK6-NEXT: store i32 [[ADD16]], i32* [[I3]], align 4
-// CHECK6-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK6: .omp.final.done:
-// CHECK6-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK6: omp.precond.end:
-// CHECK6-NEXT: ret void
-// CHECK6-LABEL: define {{[^@]+}}@__omp_outlined__3
-// CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
-// CHECK6-NEXT: entry:
-// CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK6-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
-// CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK6-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK6-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK6-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK6-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK6-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK6-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK6-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK6-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK6-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK6-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK6-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK6-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK6-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK6: omp.precond.then:
-// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK6-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
-// CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK6-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
-// CHECK6-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
-// CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK6-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK6-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK6: omp.inner.for.cond:
-// CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK6-NEXT: [[CMP4:%.*]] = icmp ule i32 [[TMP10]], [[TMP11]]
-// CHECK6-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK6: omp.inner.for.body:
-// CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
-// CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK6-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
-// CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[I3]], align 4
-// CHECK6-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i16], [1000 x i16]* [[TMP0]], i32 0, i32 [[TMP13]]
-// CHECK6-NEXT: [[TMP14:%.*]] = load i16, i16* [[ARRAYIDX]], align 2
-// CHECK6-NEXT: [[CONV:%.*]] = sext i16 [[TMP14]] to i32
-// CHECK6-NEXT: [[ADD5:%.*]] = add nsw i32 [[CONV]], 1
-// CHECK6-NEXT: [[CONV6:%.*]] = trunc i32 [[ADD5]] to i16
-// CHECK6-NEXT: store i16 [[CONV6]], i16* [[ARRAYIDX]], align 2
-// CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK6: omp.body.continue:
-// CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK6: omp.inner.for.inc:
-// CHECK6-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK6-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
-// CHECK6-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
-// CHECK6: omp.inner.for.end:
-// CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK6: omp.loop.exit:
-// CHECK6-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK6-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
-// CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]])
-// CHECK6-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK6-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
-// CHECK6-NEXT: br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK6: .omp.final.then:
-// CHECK6-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK6-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP21]], 0
-// CHECK6-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1
-// CHECK6-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1
-// CHECK6-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
-// CHECK6-NEXT: store i32 [[ADD11]], i32* [[I3]], align 4
-// CHECK6-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK6: .omp.final.done:
-// CHECK6-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK6: omp.precond.end:
-// CHECK6-NEXT: ret void
-// CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l49
-// CHECK6-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
-// CHECK6-NEXT: entry:
-// CHECK6-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
-// CHECK6-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK6-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
-// CHECK6-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
-// CHECK6-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK6-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK6-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK6: .execute:
-// CHECK6-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK6-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK6-NEXT: call void @__omp_outlined__4(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x i32]* [[TMP0]]) #[[ATTR3]]
-// CHECK6-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK6: .omp.deinit:
-// CHECK6-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK6-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK6: .exit:
-// CHECK6-NEXT: ret void
-// CHECK6-LABEL: define {{[^@]+}}@__omp_outlined__4
-// CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
-// CHECK6-NEXT: entry:
-// CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK6-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
-// CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [3 x i8*], align 4
-// CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK6-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
-// CHECK6-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
-// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK6-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK6-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK6-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
-// CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
-// CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK6: cond.true:
-// CHECK6-NEXT: br label [[COND_END:%.*]]
-// CHECK6: cond.false:
-// CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: br label [[COND_END]]
-// CHECK6: cond.end:
-// CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
-// CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK6-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK6: omp.inner.for.cond:
-// CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP6]], 10
-// CHECK6-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK6: omp.inner.for.body:
-// CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK6-NEXT: [[TMP10:%.*]] = inttoptr i32 [[TMP7]] to i8*
-// CHECK6-NEXT: store i8* [[TMP10]], i8** [[TMP9]], align 4
-// CHECK6-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK6-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP8]] to i8*
-// CHECK6-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 4
-// CHECK6-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK6-NEXT: [[TMP14:%.*]] = bitcast [10 x i32]* [[TMP0]] to i8*
-// CHECK6-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 4
-// CHECK6-NEXT: [[TMP15:%.*]] = bitcast [3 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK6-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @__omp_outlined__5 to i8*), i8* null, i8** [[TMP15]], i32 3)
-// CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK6: omp.inner.for.inc:
-// CHECK6-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
-// CHECK6-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK6-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK6-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
-// CHECK6-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK6-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK6-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
-// CHECK6-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP22]], 9
-// CHECK6-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
-// CHECK6: cond.true5:
-// CHECK6-NEXT: br label [[COND_END7:%.*]]
-// CHECK6: cond.false6:
-// CHECK6-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: br label [[COND_END7]]
-// CHECK6: cond.end7:
-// CHECK6-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP23]], [[COND_FALSE6]] ]
-// CHECK6-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK6-NEXT: store i32 [[TMP24]], i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
-// CHECK6: omp.inner.for.end:
-// CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK6: omp.loop.exit:
-// CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
-// CHECK6-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK6-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
-// CHECK6-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK6: .omp.final.then:
-// CHECK6-NEXT: store i32 10, i32* [[I]], align 4
-// CHECK6-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK6: .omp.final.done:
-// CHECK6-NEXT: ret void
-// CHECK6-LABEL: define {{[^@]+}}@__omp_outlined__5
-// CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
-// CHECK6-NEXT: entry:
-// CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK6-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
-// CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK6-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK6-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK6-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
-// CHECK6-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
-// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK6-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
-// CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK6-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
-// CHECK6-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
-// CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK6-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
-// CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK6-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK6: omp.inner.for.cond:
-// CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK6-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP6]], [[TMP7]]
-// CHECK6-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK6: omp.inner.for.body:
-// CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
-// CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4
-// CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
-// CHECK6-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]]
-// CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
-// CHECK6-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP10]], 1
-// CHECK6-NEXT: store i32 [[ADD1]], i32* [[ARRAYIDX]], align 4
-// CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK6: omp.body.continue:
-// CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK6: omp.inner.for.inc:
-// CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK6-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
-// CHECK6-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
-// CHECK6: omp.inner.for.end:
-// CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK6: omp.loop.exit:
-// CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
-// CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK6-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
-// CHECK6-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK6: .omp.final.then:
-// CHECK6-NEXT: store i32 10, i32* [[I]], align 4
-// CHECK6-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK6: .omp.final.done:
-// CHECK6-NEXT: ret void
-// CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l54
-// CHECK6-SAME: ([10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
-// CHECK6-NEXT: entry:
-// CHECK6-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK6-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[F_CASTED:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK6-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK6-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
-// CHECK6-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK6-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK6-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK6-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK6: .execute:
-// CHECK6-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[F_ADDR]], align 4
-// CHECK6-NEXT: store i32 [[TMP2]], i32* [[F_CASTED]], align 4
-// CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[F_CASTED]], align 4
-// CHECK6-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK6-NEXT: call void @__omp_outlined__6(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x [10 x i32]]* [[TMP0]], i32 [[TMP3]]) #[[ATTR3]]
-// CHECK6-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK6: .omp.deinit:
-// CHECK6-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK6-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK6: .exit:
-// CHECK6-NEXT: ret void
-// CHECK6-LABEL: define {{[^@]+}}@__omp_outlined__6
-// CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
-// CHECK6-NEXT: entry:
-// CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK6-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK6-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[K:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[J:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[F_CASTED:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 4
-// CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK6-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK6-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
-// CHECK6-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK6-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK6-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK6-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
-// CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
-// CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK6: cond.true:
-// CHECK6-NEXT: br label [[COND_END:%.*]]
-// CHECK6: cond.false:
-// CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: br label [[COND_END]]
-// CHECK6: cond.end:
-// CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
-// CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK6-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK6: omp.inner.for.cond:
-// CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP6]], 100
-// CHECK6-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK6: omp.inner.for.body:
-// CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[F_ADDR]], align 4
-// CHECK6-NEXT: store i32 [[TMP9]], i32* [[F_CASTED]], align 4
-// CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[F_CASTED]], align 4
-// CHECK6-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK6-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP7]] to i8*
-// CHECK6-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 4
-// CHECK6-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK6-NEXT: [[TMP14:%.*]] = inttoptr i32 [[TMP8]] to i8*
-// CHECK6-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 4
-// CHECK6-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK6-NEXT: [[TMP16:%.*]] = bitcast [10 x [10 x i32]]* [[TMP0]] to i8*
-// CHECK6-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 4
-// CHECK6-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
-// CHECK6-NEXT: [[TMP18:%.*]] = inttoptr i32 [[TMP10]] to i8*
-// CHECK6-NEXT: store i8* [[TMP18]], i8** [[TMP17]], align 4
-// CHECK6-NEXT: [[TMP19:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK6-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, [10 x [10 x i32]]*, i32)* @__omp_outlined__7 to i8*), i8* null, i8** [[TMP19]], i32 4)
-// CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK6: omp.inner.for.inc:
-// CHECK6-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
-// CHECK6-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK6-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK6-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
-// CHECK6-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK6-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK6-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
-// CHECK6-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP26]], 99
-// CHECK6-NEXT: br i1 [[CMP5]], label [[COND_TRUE6:%.*]], label [[COND_FALSE7:%.*]]
-// CHECK6: cond.true6:
-// CHECK6-NEXT: br label [[COND_END8:%.*]]
-// CHECK6: cond.false7:
-// CHECK6-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: br label [[COND_END8]]
-// CHECK6: cond.end8:
-// CHECK6-NEXT: [[COND9:%.*]] = phi i32 [ 99, [[COND_TRUE6]] ], [ [[TMP27]], [[COND_FALSE7]] ]
-// CHECK6-NEXT: store i32 [[COND9]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK6-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK6-NEXT: store i32 [[TMP28]], i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]
-// CHECK6: omp.inner.for.end:
-// CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK6: omp.loop.exit:
-// CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
-// CHECK6-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK6-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0
-// CHECK6-NEXT: br i1 [[TMP30]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK6: .omp.final.then:
-// CHECK6-NEXT: store i32 10, i32* [[I]], align 4
-// CHECK6-NEXT: store i32 10, i32* [[J]], align 4
-// CHECK6-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK6: .omp.final.done:
-// CHECK6-NEXT: ret void
-// CHECK6-LABEL: define {{[^@]+}}@__omp_outlined__7
-// CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
-// CHECK6-NEXT: entry:
-// CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK6-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK6-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[K:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: [[J:%.*]] = alloca i32, align 4
-// CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK6-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK6-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK6-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK6-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
-// CHECK6-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
-// CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK6-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
-// CHECK6-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
-// CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK6-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
-// CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK6-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK6: omp.inner.for.cond:
-// CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK6-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP6]], [[TMP7]]
-// CHECK6-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK6: omp.inner.for.body:
-// CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP8]], 10
-// CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
-// CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4
-// CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: [[DIV2:%.*]] = sdiv i32 [[TMP10]], 10
-// CHECK6-NEXT: [[MUL3:%.*]] = mul nsw i32 [[DIV2]], 10
-// CHECK6-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL3]]
-// CHECK6-NEXT: [[MUL4:%.*]] = mul nsw i32 [[SUB]], 1
-// CHECK6-NEXT: [[ADD5:%.*]] = add nsw i32 0, [[MUL4]]
-// CHECK6-NEXT: store i32 [[ADD5]], i32* [[J]], align 4
-// CHECK6-NEXT: store i32 10, i32* [[K]], align 4
-// CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
-// CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[J]], align 4
-// CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[F_ADDR]], align 4
-// CHECK6-NEXT: [[MUL6:%.*]] = mul nsw i32 [[TMP12]], [[TMP13]]
-// CHECK6-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP11]], [[MUL6]]
-// CHECK6-NEXT: [[TMP14:%.*]] = load i32, i32* [[K]], align 4
-// CHECK6-NEXT: [[ADD8:%.*]] = add nsw i32 [[ADD7]], [[TMP14]]
-// CHECK6-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4
-// CHECK6-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [10 x i32]], [10 x [10 x i32]]* [[TMP0]], i32 0, i32 [[TMP15]]
-// CHECK6-NEXT: [[TMP16:%.*]] = load i32, i32* [[J]], align 4
-// CHECK6-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP16]]
-// CHECK6-NEXT: store i32 [[ADD8]], i32* [[ARRAYIDX9]], align 4
-// CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK6: omp.body.continue:
-// CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK6: omp.inner.for.inc:
-// CHECK6-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK6-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
-// CHECK6-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]]
-// CHECK6: omp.inner.for.end:
-// CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK6: omp.loop.exit:
-// CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
-// CHECK6-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK6-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
-// CHECK6-NEXT: br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK6: .omp.final.then:
-// CHECK6-NEXT: store i32 10, i32* [[I]], align 4
-// CHECK6-NEXT: store i32 10, i32* [[J]], align 4
-// CHECK6-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK6: .omp.final.done:
-// CHECK6-NEXT: ret void
-// CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l38
-// CHECK7-SAME: (i64 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i64 [[L:%.*]]) #[[ATTR0:[0-9]+]] {
-// CHECK7-NEXT: entry:
-// CHECK7-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
-// CHECK7-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
-// CHECK7-NEXT: [[L_ADDR:%.*]] = alloca i64, align 8
-// CHECK7-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
-// CHECK7-NEXT: [[L_CASTED:%.*]] = alloca i64, align 8
-// CHECK7-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK7-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
-// CHECK7-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
-// CHECK7-NEXT: store i64 [[L]], i64* [[L_ADDR]], align 8
-// CHECK7-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
-// CHECK7-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
-// CHECK7-NEXT: [[CONV1:%.*]] = bitcast i64* [[L_ADDR]] to i32*
-// CHECK7-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK7-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK7-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK7: .execute:
-// CHECK7-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]])
-// CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK7-NEXT: [[CONV2:%.*]] = bitcast i64* [[N_CASTED]] to i32*
-// CHECK7-NEXT: store i32 [[TMP2]], i32* [[CONV2]], align 4
-// CHECK7-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
-// CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV1]], align 8
-// CHECK7-NEXT: [[CONV3:%.*]] = bitcast i64* [[L_CASTED]] to i32*
-// CHECK7-NEXT: store i32 [[TMP4]], i32* [[CONV3]], align 4
-// CHECK7-NEXT: [[TMP5:%.*]] = load i64, i64* [[L_CASTED]], align 8
-// CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK7-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i64 [[TMP3]], [1000 x i32]* [[TMP0]], i64 [[TMP5]]) #[[ATTR3:[0-9]+]]
-// CHECK7-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK7: .omp.deinit:
-// CHECK7-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK7-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK7: .exit:
-// CHECK7-NEXT: ret void
-// CHECK7-LABEL: define {{[^@]+}}@__omp_outlined__
-// CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i64 [[L:%.*]]) #[[ATTR0]] {
-// CHECK7-NEXT: entry:
-// CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK7-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
-// CHECK7-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
-// CHECK7-NEXT: [[L_ADDR:%.*]] = alloca i64, align 8
-// CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[I5:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
-// CHECK7-NEXT: [[L_CASTED:%.*]] = alloca i64, align 8
-// CHECK7-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [5 x i8*], align 8
-// CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
-// CHECK7-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
-// CHECK7-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
-// CHECK7-NEXT: store i64 [[L]], i64* [[L_ADDR]], align 8
-// CHECK7-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
-// CHECK7-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
-// CHECK7-NEXT: [[CONV1:%.*]] = bitcast i64* [[L_ADDR]] to i32*
-// CHECK7-NEXT: [[TMP1:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared", align 2
-// CHECK7-NEXT: [[TMP2:%.*]] = load i64, i64* @"_openmp_static_kernel$size", align 8
-// CHECK7-NEXT: call void @__kmpc_get_team_static_memory(i16 1, i8* addrspacecast (i8 addrspace(3)* getelementptr inbounds (%"union._shared_openmp_static_memory_type_$_", %"union._shared_openmp_static_memory_type_$_" addrspace(3)* @"_openmp_shared_static_glob_rd_$_", i32 0, i32 0, i32 0) to i8*), i64 [[TMP2]], i16 [[TMP1]], i8** addrspacecast (i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr" to i8**))
-// CHECK7-NEXT: [[TMP3:%.*]] = load i8*, i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr", align 8
-// CHECK7-NEXT: [[TMP4:%.*]] = getelementptr inbounds i8, i8* [[TMP3]], i64 0
-// CHECK7-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to %struct._globalized_locals_ty*
-// CHECK7-NEXT: [[L2:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY:%.*]], %struct._globalized_locals_ty* [[TMP5]], i32 0, i32 0
-// CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK7-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK7-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0
-// CHECK7-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK7-NEXT: [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK7-NEXT: store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_3]], align 4
-// CHECK7-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK7-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]]
-// CHECK7-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK7: omp.precond.then:
-// CHECK7-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
-// CHECK7-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK7-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
-// CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 128)
-// CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
-// CHECK7-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]]
-// CHECK7-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK7: cond.true:
-// CHECK7-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
-// CHECK7-NEXT: br label [[COND_END:%.*]]
-// CHECK7: cond.false:
-// CHECK7-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: br label [[COND_END]]
-// CHECK7: cond.end:
-// CHECK7-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ]
-// CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK7-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK7: omp.inner.for.cond:
-// CHECK7-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
-// CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], 1
-// CHECK7-NEXT: [[CMP7:%.*]] = icmp slt i32 [[TMP17]], [[ADD]]
-// CHECK7-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK7: omp.inner.for.body:
-// CHECK7-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK7-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64
-// CHECK7-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: [[TMP22:%.*]] = zext i32 [[TMP21]] to i64
-// CHECK7-NEXT: [[TMP23:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK7-NEXT: [[CONV8:%.*]] = bitcast i64* [[N_CASTED]] to i32*
-// CHECK7-NEXT: store i32 [[TMP23]], i32* [[CONV8]], align 4
-// CHECK7-NEXT: [[TMP24:%.*]] = load i64, i64* [[N_CASTED]], align 8
-// CHECK7-NEXT: [[TMP25:%.*]] = load i32, i32* [[CONV1]], align 8
-// CHECK7-NEXT: [[CONV9:%.*]] = bitcast i64* [[L_CASTED]] to i32*
-// CHECK7-NEXT: store i32 [[TMP25]], i32* [[CONV9]], align 4
-// CHECK7-NEXT: [[TMP26:%.*]] = load i64, i64* [[L_CASTED]], align 8
-// CHECK7-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
-// CHECK7-NEXT: [[TMP28:%.*]] = inttoptr i64 [[TMP20]] to i8*
-// CHECK7-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 8
-// CHECK7-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
-// CHECK7-NEXT: [[TMP30:%.*]] = inttoptr i64 [[TMP22]] to i8*
-// CHECK7-NEXT: store i8* [[TMP30]], i8** [[TMP29]], align 8
-// CHECK7-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
-// CHECK7-NEXT: [[TMP32:%.*]] = inttoptr i64 [[TMP24]] to i8*
-// CHECK7-NEXT: store i8* [[TMP32]], i8** [[TMP31]], align 8
-// CHECK7-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 3
-// CHECK7-NEXT: [[TMP34:%.*]] = bitcast [1000 x i32]* [[TMP0]] to i8*
-// CHECK7-NEXT: store i8* [[TMP34]], i8** [[TMP33]], align 8
-// CHECK7-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 4
-// CHECK7-NEXT: [[TMP36:%.*]] = inttoptr i64 [[TMP26]] to i8*
-// CHECK7-NEXT: store i8* [[TMP36]], i8** [[TMP35]], align 8
-// CHECK7-NEXT: [[TMP37:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK7-NEXT: [[TMP38:%.*]] = load i32, i32* [[TMP37]], align 4
-// CHECK7-NEXT: [[TMP39:%.*]] = bitcast [5 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK7-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP38]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, i64, [1000 x i32]*, i64)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP39]], i64 5)
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK7: omp.inner.for.inc:
-// CHECK7-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK7-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP40]], [[TMP41]]
-// CHECK7-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK7-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK7-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP42]], [[TMP43]]
-// CHECK7-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK7-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK7-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP44]], [[TMP45]]
-// CHECK7-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
-// CHECK7-NEXT: [[CMP13:%.*]] = icmp sgt i32 [[TMP46]], [[TMP47]]
-// CHECK7-NEXT: br i1 [[CMP13]], label [[COND_TRUE14:%.*]], label [[COND_FALSE15:%.*]]
-// CHECK7: cond.true14:
-// CHECK7-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
-// CHECK7-NEXT: br label [[COND_END16:%.*]]
-// CHECK7: cond.false15:
-// CHECK7-NEXT: [[TMP49:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: br label [[COND_END16]]
-// CHECK7: cond.end16:
-// CHECK7-NEXT: [[COND17:%.*]] = phi i32 [ [[TMP48]], [[COND_TRUE14]] ], [ [[TMP49]], [[COND_FALSE15]] ]
-// CHECK7-NEXT: store i32 [[COND17]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK7-NEXT: store i32 [[TMP50]], i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
-// CHECK7: omp.inner.for.end:
-// CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK7: omp.loop.exit:
-// CHECK7-NEXT: [[TMP51:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK7-NEXT: [[TMP52:%.*]] = load i32, i32* [[TMP51]], align 4
-// CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP52]])
-// CHECK7-NEXT: [[TMP53:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK7-NEXT: [[TMP54:%.*]] = icmp ne i32 [[TMP53]], 0
-// CHECK7-NEXT: br i1 [[TMP54]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK7: .omp.final.then:
-// CHECK7-NEXT: [[TMP55:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK7-NEXT: [[SUB18:%.*]] = sub nsw i32 [[TMP55]], 0
-// CHECK7-NEXT: [[DIV19:%.*]] = sdiv i32 [[SUB18]], 1
-// CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV19]], 1
-// CHECK7-NEXT: [[ADD20:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK7-NEXT: store i32 [[ADD20]], i32* [[I5]], align 4
-// CHECK7-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK7: .omp.final.done:
-// CHECK7-NEXT: [[TMP56:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK7-NEXT: [[TMP57:%.*]] = icmp ne i32 [[TMP56]], 0
-// CHECK7-NEXT: br i1 [[TMP57]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
-// CHECK7: .omp.lastprivate.then:
-// CHECK7-NEXT: [[TMP58:%.*]] = load i32, i32* [[CONV1]], align 8
-// CHECK7-NEXT: store i32 [[TMP58]], i32* [[CONV1]], align 8
-// CHECK7-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
-// CHECK7: .omp.lastprivate.done:
-// CHECK7-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK7: omp.precond.end:
-// CHECK7-NEXT: [[TMP59:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared", align 2
-// CHECK7-NEXT: call void @__kmpc_restore_team_static_memory(i16 1, i16 [[TMP59]])
-// CHECK7-NEXT: ret void
-// CHECK7-LABEL: define {{[^@]+}}@__omp_outlined__1
-// CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i64 [[L:%.*]]) #[[ATTR0]] {
-// CHECK7-NEXT: entry:
-// CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
-// CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
-// CHECK7-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
-// CHECK7-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
-// CHECK7-NEXT: [[L_ADDR:%.*]] = alloca i64, align 8
-// CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[I6:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
-// CHECK7-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
-// CHECK7-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK7-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
-// CHECK7-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
-// CHECK7-NEXT: store i64 [[L]], i64* [[L_ADDR]], align 8
-// CHECK7-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
-// CHECK7-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
-// CHECK7-NEXT: [[CONV1:%.*]] = bitcast i64* [[L_ADDR]] to i32*
-// CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK7-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK7-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK7-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK7-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK7-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK7-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK7-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK7: omp.precond.then:
-// CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK7-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
-// CHECK7-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
-// CHECK7-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP5]] to i32
-// CHECK7-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK7-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP6]] to i32
-// CHECK7-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4
-// CHECK7-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4
-// CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK7-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 32)
-// CHECK7-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
-// CHECK7: omp.dispatch.cond:
-// CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK7-NEXT: [[CONV7:%.*]] = sext i32 [[TMP9]] to i64
-// CHECK7-NEXT: [[TMP10:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK7-NEXT: [[CMP8:%.*]] = icmp ugt i64 [[CONV7]], [[TMP10]]
-// CHECK7-NEXT: br i1 [[CMP8]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK7: cond.true:
-// CHECK7-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK7-NEXT: br label [[COND_END:%.*]]
-// CHECK7: cond.false:
-// CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK7-NEXT: [[CONV9:%.*]] = sext i32 [[TMP12]] to i64
-// CHECK7-NEXT: br label [[COND_END]]
-// CHECK7: cond.end:
-// CHECK7-NEXT: [[COND:%.*]] = phi i64 [ [[TMP11]], [[COND_TRUE]] ], [ [[CONV9]], [[COND_FALSE]] ]
-// CHECK7-NEXT: [[CONV10:%.*]] = trunc i64 [[COND]] to i32
-// CHECK7-NEXT: store i32 [[CONV10]], i32* [[DOTOMP_UB]], align 4
-// CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK7-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK7-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
-// CHECK7-NEXT: br i1 [[CMP11]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
-// CHECK7: omp.dispatch.body:
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK7: omp.inner.for.cond:
-// CHECK7-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK7-NEXT: [[CMP12:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
-// CHECK7-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK7: omp.inner.for.body:
-// CHECK7-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
-// CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK7-NEXT: store i32 [[ADD]], i32* [[I6]], align 4
-// CHECK7-NEXT: [[TMP19:%.*]] = load i32, i32* [[I6]], align 4
-// CHECK7-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
-// CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
-// CHECK7-NEXT: store i32 1, i32* [[ARRAYIDX]], align 4
-// CHECK7-NEXT: [[TMP20:%.*]] = load i32, i32* [[I6]], align 4
-// CHECK7-NEXT: store i32 [[TMP20]], i32* [[CONV1]], align 8
-// CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK7: omp.body.continue:
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK7: omp.inner.for.inc:
-// CHECK7-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP21]], 1
-// CHECK7-NEXT: store i32 [[ADD13]], i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
-// CHECK7: omp.inner.for.end:
-// CHECK7-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
-// CHECK7: omp.dispatch.inc:
-// CHECK7-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK7-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK7-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
-// CHECK7-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_LB]], align 4
-// CHECK7-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK7-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK7-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
-// CHECK7-NEXT: store i32 [[ADD15]], i32* [[DOTOMP_UB]], align 4
-// CHECK7-NEXT: br label [[OMP_DISPATCH_COND]]
-// CHECK7: omp.dispatch.end:
-// CHECK7-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK7-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
-// CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP27]])
-// CHECK7-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK7-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
-// CHECK7-NEXT: br i1 [[TMP29]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK7: .omp.final.then:
-// CHECK7-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK7-NEXT: [[SUB16:%.*]] = sub nsw i32 [[TMP30]], 0
-// CHECK7-NEXT: [[DIV17:%.*]] = sdiv i32 [[SUB16]], 1
-// CHECK7-NEXT: [[MUL18:%.*]] = mul nsw i32 [[DIV17]], 1
-// CHECK7-NEXT: [[ADD19:%.*]] = add nsw i32 0, [[MUL18]]
-// CHECK7-NEXT: store i32 [[ADD19]], i32* [[I6]], align 4
-// CHECK7-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK7: .omp.final.done:
-// CHECK7-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK7-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
-// CHECK7-NEXT: br i1 [[TMP32]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
-// CHECK7: .omp.lastprivate.then:
-// CHECK7-NEXT: [[TMP33:%.*]] = load i32, i32* [[CONV1]], align 8
-// CHECK7-NEXT: store i32 [[TMP33]], i32* [[CONV1]], align 8
-// CHECK7-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
-// CHECK7: .omp.lastprivate.done:
-// CHECK7-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK7: omp.precond.end:
-// CHECK7-NEXT: ret void
-// CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l44
-// CHECK7-SAME: (i64 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
-// CHECK7-NEXT: entry:
-// CHECK7-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
-// CHECK7-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 8
-// CHECK7-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
-// CHECK7-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK7-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
-// CHECK7-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 8
-// CHECK7-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
-// CHECK7-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 8
-// CHECK7-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK7-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK7-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK7: .execute:
-// CHECK7-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK7-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
-// CHECK7-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
-// CHECK7-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
-// CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK7-NEXT: call void @__omp_outlined__2(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i64 [[TMP3]], [1000 x i16]* [[TMP0]]) #[[ATTR3]]
-// CHECK7-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK7: .omp.deinit:
-// CHECK7-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK7-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK7: .exit:
-// CHECK7-NEXT: ret void
-// CHECK7-LABEL: define {{[^@]+}}@__omp_outlined__2
-// CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
-// CHECK7-NEXT: entry:
-// CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK7-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
-// CHECK7-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 8
-// CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
-// CHECK7-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 8
-// CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
-// CHECK7-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
-// CHECK7-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 8
-// CHECK7-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
-// CHECK7-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 8
-// CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK7-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK7-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK7-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK7-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK7-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK7-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK7-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK7: omp.precond.then:
-// CHECK7-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK7-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK7-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK7-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
-// CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK7-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
-// CHECK7-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK7: cond.true:
-// CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK7-NEXT: br label [[COND_END:%.*]]
-// CHECK7: cond.false:
-// CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: br label [[COND_END]]
-// CHECK7: cond.end:
-// CHECK7-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
-// CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK7-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK7: omp.inner.for.cond:
-// CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1
-// CHECK7-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]
-// CHECK7-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK7: omp.inner.for.body:
-// CHECK7-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK7-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i64
-// CHECK7-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
-// CHECK7-NEXT: [[TMP18:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK7-NEXT: [[CONV6:%.*]] = bitcast i64* [[N_CASTED]] to i32*
-// CHECK7-NEXT: store i32 [[TMP18]], i32* [[CONV6]], align 4
-// CHECK7-NEXT: [[TMP19:%.*]] = load i64, i64* [[N_CASTED]], align 8
-// CHECK7-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
-// CHECK7-NEXT: [[TMP21:%.*]] = inttoptr i64 [[TMP15]] to i8*
-// CHECK7-NEXT: store i8* [[TMP21]], i8** [[TMP20]], align 8
-// CHECK7-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
-// CHECK7-NEXT: [[TMP23:%.*]] = inttoptr i64 [[TMP17]] to i8*
-// CHECK7-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 8
-// CHECK7-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
-// CHECK7-NEXT: [[TMP25:%.*]] = inttoptr i64 [[TMP19]] to i8*
-// CHECK7-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 8
-// CHECK7-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 3
-// CHECK7-NEXT: [[TMP27:%.*]] = bitcast [1000 x i16]* [[TMP0]] to i8*
-// CHECK7-NEXT: store i8* [[TMP27]], i8** [[TMP26]], align 8
-// CHECK7-NEXT: [[TMP28:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK7-NEXT: [[TMP29:%.*]] = load i32, i32* [[TMP28]], align 4
-// CHECK7-NEXT: [[TMP30:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK7-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP29]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, i64, [1000 x i16]*)* @__omp_outlined__3 to i8*), i8* null, i8** [[TMP30]], i64 4)
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK7: omp.inner.for.inc:
-// CHECK7-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK7-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP31]], [[TMP32]]
-// CHECK7-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK7-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK7-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP33]], [[TMP34]]
-// CHECK7-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK7-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK7-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP35]], [[TMP36]]
-// CHECK7-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK7-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP37]], [[TMP38]]
-// CHECK7-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
-// CHECK7: cond.true11:
-// CHECK7-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK7-NEXT: br label [[COND_END13:%.*]]
-// CHECK7: cond.false12:
-// CHECK7-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: br label [[COND_END13]]
-// CHECK7: cond.end13:
-// CHECK7-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP39]], [[COND_TRUE11]] ], [ [[TMP40]], [[COND_FALSE12]] ]
-// CHECK7-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK7-NEXT: store i32 [[TMP41]], i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
-// CHECK7: omp.inner.for.end:
-// CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK7: omp.loop.exit:
-// CHECK7-NEXT: [[TMP42:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK7-NEXT: [[TMP43:%.*]] = load i32, i32* [[TMP42]], align 4
-// CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP43]])
-// CHECK7-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK7-NEXT: [[TMP45:%.*]] = icmp ne i32 [[TMP44]], 0
-// CHECK7-NEXT: br i1 [[TMP45]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK7: .omp.final.then:
-// CHECK7-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK7-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP46]], 0
-// CHECK7-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1
-// CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV16]], 1
-// CHECK7-NEXT: [[ADD17:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK7-NEXT: store i32 [[ADD17]], i32* [[I3]], align 4
-// CHECK7-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK7: .omp.final.done:
-// CHECK7-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK7: omp.precond.end:
-// CHECK7-NEXT: ret void
-// CHECK7-LABEL: define {{[^@]+}}@__omp_outlined__3
-// CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
-// CHECK7-NEXT: entry:
-// CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
-// CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
-// CHECK7-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
-// CHECK7-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 8
-// CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[I5:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
-// CHECK7-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
-// CHECK7-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK7-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
-// CHECK7-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 8
-// CHECK7-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
-// CHECK7-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 8
-// CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK7-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK7-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK7-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK7-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK7-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK7-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK7-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK7: omp.precond.then:
-// CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK7-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
-// CHECK7-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
-// CHECK7-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP5]] to i32
-// CHECK7-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK7-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP6]] to i32
-// CHECK7-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4
-// CHECK7-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4
-// CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK7-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK7-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK7: omp.inner.for.cond:
-// CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: [[CONV6:%.*]] = sext i32 [[TMP10]] to i64
-// CHECK7-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK7-NEXT: [[CMP7:%.*]] = icmp ule i64 [[CONV6]], [[TMP11]]
-// CHECK7-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK7: omp.inner.for.body:
-// CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
-// CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK7-NEXT: store i32 [[ADD]], i32* [[I5]], align 4
-// CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[I5]], align 4
-// CHECK7-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
-// CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i16], [1000 x i16]* [[TMP0]], i64 0, i64 [[IDXPROM]]
-// CHECK7-NEXT: [[TMP14:%.*]] = load i16, i16* [[ARRAYIDX]], align 2
-// CHECK7-NEXT: [[CONV8:%.*]] = sext i16 [[TMP14]] to i32
-// CHECK7-NEXT: [[ADD9:%.*]] = add nsw i32 [[CONV8]], 1
-// CHECK7-NEXT: [[CONV10:%.*]] = trunc i32 [[ADD9]] to i16
-// CHECK7-NEXT: store i16 [[CONV10]], i16* [[ARRAYIDX]], align 2
-// CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK7: omp.body.continue:
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK7: omp.inner.for.inc:
-// CHECK7-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK7-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
-// CHECK7-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
-// CHECK7: omp.inner.for.end:
-// CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK7: omp.loop.exit:
-// CHECK7-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK7-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
-// CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]])
-// CHECK7-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK7-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
-// CHECK7-NEXT: br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK7: .omp.final.then:
-// CHECK7-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK7-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP21]], 0
-// CHECK7-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1
-// CHECK7-NEXT: [[MUL14:%.*]] = mul nsw i32 [[DIV13]], 1
-// CHECK7-NEXT: [[ADD15:%.*]] = add nsw i32 0, [[MUL14]]
-// CHECK7-NEXT: store i32 [[ADD15]], i32* [[I5]], align 4
-// CHECK7-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK7: .omp.final.done:
-// CHECK7-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK7: omp.precond.end:
-// CHECK7-NEXT: ret void
-// CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l49
-// CHECK7-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
-// CHECK7-NEXT: entry:
-// CHECK7-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8
-// CHECK7-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK7-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8
-// CHECK7-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8
-// CHECK7-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK7-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK7-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK7: .execute:
-// CHECK7-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK7-NEXT: call void @__omp_outlined__4(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x i32]* [[TMP0]]) #[[ATTR3]]
-// CHECK7-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK7: .omp.deinit:
-// CHECK7-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK7-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK7: .exit:
-// CHECK7-NEXT: ret void
-// CHECK7-LABEL: define {{[^@]+}}@__omp_outlined__4
-// CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
-// CHECK7-NEXT: entry:
-// CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK7-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8
-// CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [3 x i8*], align 8
-// CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
-// CHECK7-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8
-// CHECK7-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8
-// CHECK7-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK7-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK7-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK7-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
-// CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
-// CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK7: cond.true:
-// CHECK7-NEXT: br label [[COND_END:%.*]]
-// CHECK7: cond.false:
-// CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: br label [[COND_END]]
-// CHECK7: cond.end:
-// CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
-// CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK7: omp.inner.for.cond:
-// CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP6]], 10
-// CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK7: omp.inner.for.body:
-// CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK7-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
-// CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
-// CHECK7-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
-// CHECK7-NEXT: [[TMP12:%.*]] = inttoptr i64 [[TMP8]] to i8*
-// CHECK7-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 8
-// CHECK7-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
-// CHECK7-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP10]] to i8*
-// CHECK7-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 8
-// CHECK7-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
-// CHECK7-NEXT: [[TMP16:%.*]] = bitcast [10 x i32]* [[TMP0]] to i8*
-// CHECK7-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 8
-// CHECK7-NEXT: [[TMP17:%.*]] = bitcast [3 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK7-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @__omp_outlined__5 to i8*), i8* null, i8** [[TMP17]], i64 3)
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK7: omp.inner.for.inc:
-// CHECK7-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
-// CHECK7-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK7-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK7-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
-// CHECK7-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK7-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK7-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
-// CHECK7-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP24]], 9
-// CHECK7-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
-// CHECK7: cond.true5:
-// CHECK7-NEXT: br label [[COND_END7:%.*]]
-// CHECK7: cond.false6:
-// CHECK7-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: br label [[COND_END7]]
-// CHECK7: cond.end7:
-// CHECK7-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP25]], [[COND_FALSE6]] ]
-// CHECK7-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK7-NEXT: store i32 [[TMP26]], i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
-// CHECK7: omp.inner.for.end:
-// CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK7: omp.loop.exit:
-// CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
-// CHECK7-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK7-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0
-// CHECK7-NEXT: br i1 [[TMP28]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK7: .omp.final.then:
-// CHECK7-NEXT: store i32 10, i32* [[I]], align 4
-// CHECK7-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK7: .omp.final.done:
-// CHECK7-NEXT: ret void
-// CHECK7-LABEL: define {{[^@]+}}@__omp_outlined__5
-// CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
-// CHECK7-NEXT: entry:
-// CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
-// CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
-// CHECK7-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8
-// CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
-// CHECK7-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
-// CHECK7-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK7-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8
-// CHECK7-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8
-// CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK7-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
-// CHECK7-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
-// CHECK7-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
-// CHECK7-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK7-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
-// CHECK7-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
-// CHECK7-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
-// CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK7-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
-// CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK7: omp.inner.for.cond:
-// CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: [[CONV2:%.*]] = sext i32 [[TMP6]] to i64
-// CHECK7-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK7-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV2]], [[TMP7]]
-// CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK7: omp.inner.for.body:
-// CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
-// CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4
-// CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
-// CHECK7-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64
-// CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
-// CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
-// CHECK7-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
-// CHECK7-NEXT: store i32 [[ADD3]], i32* [[ARRAYIDX]], align 4
-// CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK7: omp.body.continue:
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK7: omp.inner.for.inc:
-// CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK7-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
-// CHECK7-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
-// CHECK7: omp.inner.for.end:
-// CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK7: omp.loop.exit:
-// CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
-// CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK7-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
-// CHECK7-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK7: .omp.final.then:
-// CHECK7-NEXT: store i32 10, i32* [[I]], align 4
-// CHECK7-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK7: .omp.final.done:
-// CHECK7-NEXT: ret void
-// CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l54
-// CHECK7-SAME: ([10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i64 [[F:%.*]]) #[[ATTR0]] {
-// CHECK7-NEXT: entry:
-// CHECK7-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 8
-// CHECK7-NEXT: [[F_ADDR:%.*]] = alloca i64, align 8
-// CHECK7-NEXT: [[F_CASTED:%.*]] = alloca i64, align 8
-// CHECK7-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK7-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 8
-// CHECK7-NEXT: store i64 [[F]], i64* [[F_ADDR]], align 8
-// CHECK7-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 8
-// CHECK7-NEXT: [[CONV:%.*]] = bitcast i64* [[F_ADDR]] to i32*
-// CHECK7-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK7-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK7-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK7: .execute:
-// CHECK7-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK7-NEXT: [[CONV1:%.*]] = bitcast i64* [[F_CASTED]] to i32*
-// CHECK7-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
-// CHECK7-NEXT: [[TMP3:%.*]] = load i64, i64* [[F_CASTED]], align 8
-// CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK7-NEXT: call void @__omp_outlined__6(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x [10 x i32]]* [[TMP0]], i64 [[TMP3]]) #[[ATTR3]]
-// CHECK7-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK7: .omp.deinit:
-// CHECK7-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK7-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK7: .exit:
-// CHECK7-NEXT: ret void
-// CHECK7-LABEL: define {{[^@]+}}@__omp_outlined__6
-// CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i64 [[F:%.*]]) #[[ATTR0]] {
-// CHECK7-NEXT: entry:
-// CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK7-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 8
-// CHECK7-NEXT: [[F_ADDR:%.*]] = alloca i64, align 8
-// CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[K:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[J:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[F_CASTED:%.*]] = alloca i64, align 8
-// CHECK7-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 8
-// CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
-// CHECK7-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 8
-// CHECK7-NEXT: store i64 [[F]], i64* [[F_ADDR]], align 8
-// CHECK7-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 8
-// CHECK7-NEXT: [[CONV:%.*]] = bitcast i64* [[F_ADDR]] to i32*
-// CHECK7-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK7-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK7-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK7-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
-// CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
-// CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK7: cond.true:
-// CHECK7-NEXT: br label [[COND_END:%.*]]
-// CHECK7: cond.false:
-// CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: br label [[COND_END]]
-// CHECK7: cond.end:
-// CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
-// CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK7: omp.inner.for.cond:
-// CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP6]], 100
-// CHECK7-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK7: omp.inner.for.body:
-// CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK7-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
-// CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
-// CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK7-NEXT: [[CONV3:%.*]] = bitcast i64* [[F_CASTED]] to i32*
-// CHECK7-NEXT: store i32 [[TMP11]], i32* [[CONV3]], align 4
-// CHECK7-NEXT: [[TMP12:%.*]] = load i64, i64* [[F_CASTED]], align 8
-// CHECK7-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
-// CHECK7-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP8]] to i8*
-// CHECK7-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 8
-// CHECK7-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
-// CHECK7-NEXT: [[TMP16:%.*]] = inttoptr i64 [[TMP10]] to i8*
-// CHECK7-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 8
-// CHECK7-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
-// CHECK7-NEXT: [[TMP18:%.*]] = bitcast [10 x [10 x i32]]* [[TMP0]] to i8*
-// CHECK7-NEXT: store i8* [[TMP18]], i8** [[TMP17]], align 8
-// CHECK7-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 3
-// CHECK7-NEXT: [[TMP20:%.*]] = inttoptr i64 [[TMP12]] to i8*
-// CHECK7-NEXT: store i8* [[TMP20]], i8** [[TMP19]], align 8
-// CHECK7-NEXT: [[TMP21:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK7-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, [10 x [10 x i32]]*, i64)* @__omp_outlined__7 to i8*), i8* null, i8** [[TMP21]], i64 4)
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK7: omp.inner.for.inc:
-// CHECK7-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
-// CHECK7-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK7-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK7-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
-// CHECK7-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK7-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK7-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP26]], [[TMP27]]
-// CHECK7-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP28]], 99
-// CHECK7-NEXT: br i1 [[CMP6]], label [[COND_TRUE7:%.*]], label [[COND_FALSE8:%.*]]
-// CHECK7: cond.true7:
-// CHECK7-NEXT: br label [[COND_END9:%.*]]
-// CHECK7: cond.false8:
-// CHECK7-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: br label [[COND_END9]]
-// CHECK7: cond.end9:
-// CHECK7-NEXT: [[COND10:%.*]] = phi i32 [ 99, [[COND_TRUE7]] ], [ [[TMP29]], [[COND_FALSE8]] ]
-// CHECK7-NEXT: store i32 [[COND10]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK7-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK7-NEXT: store i32 [[TMP30]], i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]
-// CHECK7: omp.inner.for.end:
-// CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK7: omp.loop.exit:
-// CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
-// CHECK7-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK7-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
-// CHECK7-NEXT: br i1 [[TMP32]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK7: .omp.final.then:
-// CHECK7-NEXT: store i32 10, i32* [[I]], align 4
-// CHECK7-NEXT: store i32 10, i32* [[J]], align 4
-// CHECK7-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK7: .omp.final.done:
-// CHECK7-NEXT: ret void
-// CHECK7-LABEL: define {{[^@]+}}@__omp_outlined__7
-// CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i64 [[F:%.*]]) #[[ATTR0]] {
-// CHECK7-NEXT: entry:
-// CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
-// CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
-// CHECK7-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 8
-// CHECK7-NEXT: [[F_ADDR:%.*]] = alloca i64, align 8
-// CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[K:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: [[J:%.*]] = alloca i32, align 4
-// CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
-// CHECK7-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
-// CHECK7-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK7-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 8
-// CHECK7-NEXT: store i64 [[F]], i64* [[F_ADDR]], align 8
-// CHECK7-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 8
-// CHECK7-NEXT: [[CONV:%.*]] = bitcast i64* [[F_ADDR]] to i32*
-// CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK7-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
-// CHECK7-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
-// CHECK7-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32
-// CHECK7-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK7-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP2]] to i32
-// CHECK7-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_LB]], align 4
-// CHECK7-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4
-// CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK7-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
-// CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK7: omp.inner.for.cond:
-// CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: [[CONV4:%.*]] = sext i32 [[TMP6]] to i64
-// CHECK7-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK7-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV4]], [[TMP7]]
-// CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK7: omp.inner.for.body:
-// CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP8]], 10
-// CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
-// CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4
-// CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: [[DIV5:%.*]] = sdiv i32 [[TMP10]], 10
-// CHECK7-NEXT: [[MUL6:%.*]] = mul nsw i32 [[DIV5]], 10
-// CHECK7-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL6]]
-// CHECK7-NEXT: [[MUL7:%.*]] = mul nsw i32 [[SUB]], 1
-// CHECK7-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL7]]
-// CHECK7-NEXT: store i32 [[ADD8]], i32* [[J]], align 4
-// CHECK7-NEXT: store i32 10, i32* [[K]], align 4
-// CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
-// CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[J]], align 4
-// CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK7-NEXT: [[MUL9:%.*]] = mul nsw i32 [[TMP12]], [[TMP13]]
-// CHECK7-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP11]], [[MUL9]]
-// CHECK7-NEXT: [[TMP14:%.*]] = load i32, i32* [[K]], align 4
-// CHECK7-NEXT: [[ADD11:%.*]] = add nsw i32 [[ADD10]], [[TMP14]]
-// CHECK7-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4
-// CHECK7-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64
-// CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [10 x i32]], [10 x [10 x i32]]* [[TMP0]], i64 0, i64 [[IDXPROM]]
-// CHECK7-NEXT: [[TMP16:%.*]] = load i32, i32* [[J]], align 4
-// CHECK7-NEXT: [[IDXPROM12:%.*]] = sext i32 [[TMP16]] to i64
-// CHECK7-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[ARRAYIDX]], i64 0, i64 [[IDXPROM12]]
-// CHECK7-NEXT: store i32 [[ADD11]], i32* [[ARRAYIDX13]], align 4
-// CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK7: omp.body.continue:
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK7: omp.inner.for.inc:
-// CHECK7-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK7-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
-// CHECK7-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV]], align 4
-// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]]
-// CHECK7: omp.inner.for.end:
-// CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK7: omp.loop.exit:
-// CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
-// CHECK7-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK7-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
-// CHECK7-NEXT: br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK7: .omp.final.then:
-// CHECK7-NEXT: store i32 10, i32* [[I]], align 4
-// CHECK7-NEXT: store i32 10, i32* [[J]], align 4
-// CHECK7-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK7: .omp.final.done:
-// CHECK7-NEXT: ret void
-// CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l38
-// CHECK8-SAME: (i64 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i64 [[L:%.*]]) #[[ATTR0:[0-9]+]] {
-// CHECK8-NEXT: entry:
-// CHECK8-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
-// CHECK8-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
-// CHECK8-NEXT: [[L_ADDR:%.*]] = alloca i64, align 8
-// CHECK8-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
-// CHECK8-NEXT: [[L_CASTED:%.*]] = alloca i64, align 8
-// CHECK8-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK8-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
-// CHECK8-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
-// CHECK8-NEXT: store i64 [[L]], i64* [[L_ADDR]], align 8
-// CHECK8-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
-// CHECK8-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
-// CHECK8-NEXT: [[CONV1:%.*]] = bitcast i64* [[L_ADDR]] to i32*
-// CHECK8-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK8-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK8-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK8: .execute:
-// CHECK8-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]])
-// CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK8-NEXT: [[CONV2:%.*]] = bitcast i64* [[N_CASTED]] to i32*
-// CHECK8-NEXT: store i32 [[TMP2]], i32* [[CONV2]], align 4
-// CHECK8-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
-// CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV1]], align 8
-// CHECK8-NEXT: [[CONV3:%.*]] = bitcast i64* [[L_CASTED]] to i32*
-// CHECK8-NEXT: store i32 [[TMP4]], i32* [[CONV3]], align 4
-// CHECK8-NEXT: [[TMP5:%.*]] = load i64, i64* [[L_CASTED]], align 8
-// CHECK8-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK8-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i64 [[TMP3]], [1000 x i32]* [[TMP0]], i64 [[TMP5]]) #[[ATTR3:[0-9]+]]
-// CHECK8-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK8: .omp.deinit:
-// CHECK8-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK8-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK8: .exit:
-// CHECK8-NEXT: ret void
-// CHECK8-LABEL: define {{[^@]+}}@__omp_outlined__
-// CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i64 [[L:%.*]]) #[[ATTR0]] {
-// CHECK8-NEXT: entry:
-// CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK8-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
-// CHECK8-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
-// CHECK8-NEXT: [[L_ADDR:%.*]] = alloca i64, align 8
-// CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[I5:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
-// CHECK8-NEXT: [[L_CASTED:%.*]] = alloca i64, align 8
-// CHECK8-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [5 x i8*], align 8
-// CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
-// CHECK8-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
-// CHECK8-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
-// CHECK8-NEXT: store i64 [[L]], i64* [[L_ADDR]], align 8
-// CHECK8-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
-// CHECK8-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
-// CHECK8-NEXT: [[CONV1:%.*]] = bitcast i64* [[L_ADDR]] to i32*
-// CHECK8-NEXT: [[TMP1:%.*]] = call i8* @__kmpc_data_sharing_push_stack(i64 4, i16 1)
-// CHECK8-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to %struct._globalized_locals_ty*
-// CHECK8-NEXT: [[L2:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY:%.*]], %struct._globalized_locals_ty* [[TMP2]], i32 0, i32 0
-// CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK8-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK8-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
-// CHECK8-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK8-NEXT: [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK8-NEXT: store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_3]], align 4
-// CHECK8-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK8-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
-// CHECK8-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK8: omp.precond.then:
-// CHECK8-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
-// CHECK8-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK8-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 128)
-// CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
-// CHECK8-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
-// CHECK8-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK8: cond.true:
-// CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
-// CHECK8-NEXT: br label [[COND_END:%.*]]
-// CHECK8: cond.false:
-// CHECK8-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: br label [[COND_END]]
-// CHECK8: cond.end:
-// CHECK8-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
-// CHECK8-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK8-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK8: omp.inner.for.cond:
-// CHECK8-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
-// CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], 1
-// CHECK8-NEXT: [[CMP7:%.*]] = icmp slt i32 [[TMP14]], [[ADD]]
-// CHECK8-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK8: omp.inner.for.body:
-// CHECK8-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK8-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
-// CHECK8-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
-// CHECK8-NEXT: [[TMP20:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK8-NEXT: [[CONV8:%.*]] = bitcast i64* [[N_CASTED]] to i32*
-// CHECK8-NEXT: store i32 [[TMP20]], i32* [[CONV8]], align 4
-// CHECK8-NEXT: [[TMP21:%.*]] = load i64, i64* [[N_CASTED]], align 8
-// CHECK8-NEXT: [[TMP22:%.*]] = load i32, i32* [[CONV1]], align 8
-// CHECK8-NEXT: [[CONV9:%.*]] = bitcast i64* [[L_CASTED]] to i32*
-// CHECK8-NEXT: store i32 [[TMP22]], i32* [[CONV9]], align 4
-// CHECK8-NEXT: [[TMP23:%.*]] = load i64, i64* [[L_CASTED]], align 8
-// CHECK8-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
-// CHECK8-NEXT: [[TMP25:%.*]] = inttoptr i64 [[TMP17]] to i8*
-// CHECK8-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 8
-// CHECK8-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
-// CHECK8-NEXT: [[TMP27:%.*]] = inttoptr i64 [[TMP19]] to i8*
-// CHECK8-NEXT: store i8* [[TMP27]], i8** [[TMP26]], align 8
-// CHECK8-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
-// CHECK8-NEXT: [[TMP29:%.*]] = inttoptr i64 [[TMP21]] to i8*
-// CHECK8-NEXT: store i8* [[TMP29]], i8** [[TMP28]], align 8
-// CHECK8-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 3
-// CHECK8-NEXT: [[TMP31:%.*]] = bitcast [1000 x i32]* [[TMP0]] to i8*
-// CHECK8-NEXT: store i8* [[TMP31]], i8** [[TMP30]], align 8
-// CHECK8-NEXT: [[TMP32:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 4
-// CHECK8-NEXT: [[TMP33:%.*]] = inttoptr i64 [[TMP23]] to i8*
-// CHECK8-NEXT: store i8* [[TMP33]], i8** [[TMP32]], align 8
-// CHECK8-NEXT: [[TMP34:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK8-NEXT: [[TMP35:%.*]] = load i32, i32* [[TMP34]], align 4
-// CHECK8-NEXT: [[TMP36:%.*]] = bitcast [5 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK8-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP35]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, i64, [1000 x i32]*, i64)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP36]], i64 5)
-// CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK8: omp.inner.for.inc:
-// CHECK8-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK8-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP37]], [[TMP38]]
-// CHECK8-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK8-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK8-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP39]], [[TMP40]]
-// CHECK8-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK8-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK8-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP41]], [[TMP42]]
-// CHECK8-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
-// CHECK8-NEXT: [[CMP13:%.*]] = icmp sgt i32 [[TMP43]], [[TMP44]]
-// CHECK8-NEXT: br i1 [[CMP13]], label [[COND_TRUE14:%.*]], label [[COND_FALSE15:%.*]]
-// CHECK8: cond.true14:
-// CHECK8-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
-// CHECK8-NEXT: br label [[COND_END16:%.*]]
-// CHECK8: cond.false15:
-// CHECK8-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: br label [[COND_END16]]
-// CHECK8: cond.end16:
-// CHECK8-NEXT: [[COND17:%.*]] = phi i32 [ [[TMP45]], [[COND_TRUE14]] ], [ [[TMP46]], [[COND_FALSE15]] ]
-// CHECK8-NEXT: store i32 [[COND17]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK8-NEXT: store i32 [[TMP47]], i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
-// CHECK8: omp.inner.for.end:
-// CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK8: omp.loop.exit:
-// CHECK8-NEXT: [[TMP48:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK8-NEXT: [[TMP49:%.*]] = load i32, i32* [[TMP48]], align 4
-// CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP49]])
-// CHECK8-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK8-NEXT: [[TMP51:%.*]] = icmp ne i32 [[TMP50]], 0
-// CHECK8-NEXT: br i1 [[TMP51]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK8: .omp.final.then:
-// CHECK8-NEXT: [[TMP52:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK8-NEXT: [[SUB18:%.*]] = sub nsw i32 [[TMP52]], 0
-// CHECK8-NEXT: [[DIV19:%.*]] = sdiv i32 [[SUB18]], 1
-// CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV19]], 1
-// CHECK8-NEXT: [[ADD20:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK8-NEXT: store i32 [[ADD20]], i32* [[I5]], align 4
-// CHECK8-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK8: .omp.final.done:
-// CHECK8-NEXT: [[TMP53:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK8-NEXT: [[TMP54:%.*]] = icmp ne i32 [[TMP53]], 0
-// CHECK8-NEXT: br i1 [[TMP54]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
-// CHECK8: .omp.lastprivate.then:
-// CHECK8-NEXT: [[TMP55:%.*]] = load i32, i32* [[CONV1]], align 8
-// CHECK8-NEXT: store i32 [[TMP55]], i32* [[CONV1]], align 8
-// CHECK8-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
-// CHECK8: .omp.lastprivate.done:
-// CHECK8-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK8: omp.precond.end:
-// CHECK8-NEXT: call void @__kmpc_data_sharing_pop_stack(i8* [[TMP1]])
-// CHECK8-NEXT: ret void
-// CHECK8-LABEL: define {{[^@]+}}@__omp_outlined__1
-// CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i64 [[L:%.*]]) #[[ATTR0]] {
-// CHECK8-NEXT: entry:
-// CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK8-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
-// CHECK8-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
-// CHECK8-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
-// CHECK8-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
-// CHECK8-NEXT: [[L_ADDR:%.*]] = alloca i64, align 8
-// CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[I6:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
-// CHECK8-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
-// CHECK8-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK8-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
-// CHECK8-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
-// CHECK8-NEXT: store i64 [[L]], i64* [[L_ADDR]], align 8
-// CHECK8-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
-// CHECK8-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
-// CHECK8-NEXT: [[CONV1:%.*]] = bitcast i64* [[L_ADDR]] to i32*
-// CHECK8-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK8-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK8-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK8-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK8-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK8-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK8-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK8-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK8-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK8: omp.precond.then:
-// CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK8-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
-// CHECK8-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
-// CHECK8-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP5]] to i32
-// CHECK8-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK8-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP6]] to i32
-// CHECK8-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4
-// CHECK8-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4
-// CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK8-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 32)
-// CHECK8-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
-// CHECK8: omp.dispatch.cond:
-// CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK8-NEXT: [[CONV7:%.*]] = sext i32 [[TMP9]] to i64
-// CHECK8-NEXT: [[TMP10:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK8-NEXT: [[CMP8:%.*]] = icmp ugt i64 [[CONV7]], [[TMP10]]
-// CHECK8-NEXT: br i1 [[CMP8]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK8: cond.true:
-// CHECK8-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK8-NEXT: br label [[COND_END:%.*]]
-// CHECK8: cond.false:
-// CHECK8-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK8-NEXT: [[CONV9:%.*]] = sext i32 [[TMP12]] to i64
-// CHECK8-NEXT: br label [[COND_END]]
-// CHECK8: cond.end:
-// CHECK8-NEXT: [[COND:%.*]] = phi i64 [ [[TMP11]], [[COND_TRUE]] ], [ [[CONV9]], [[COND_FALSE]] ]
-// CHECK8-NEXT: [[CONV10:%.*]] = trunc i64 [[COND]] to i32
-// CHECK8-NEXT: store i32 [[CONV10]], i32* [[DOTOMP_UB]], align 4
-// CHECK8-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK8-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK8-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
-// CHECK8-NEXT: br i1 [[CMP11]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
-// CHECK8: omp.dispatch.body:
-// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK8: omp.inner.for.cond:
-// CHECK8-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK8-NEXT: [[CMP12:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
-// CHECK8-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK8: omp.inner.for.body:
-// CHECK8-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
-// CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK8-NEXT: store i32 [[ADD]], i32* [[I6]], align 4
-// CHECK8-NEXT: [[TMP19:%.*]] = load i32, i32* [[I6]], align 4
-// CHECK8-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
-// CHECK8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
-// CHECK8-NEXT: store i32 1, i32* [[ARRAYIDX]], align 4
-// CHECK8-NEXT: [[TMP20:%.*]] = load i32, i32* [[I6]], align 4
-// CHECK8-NEXT: store i32 [[TMP20]], i32* [[CONV1]], align 8
-// CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK8: omp.body.continue:
-// CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK8: omp.inner.for.inc:
-// CHECK8-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP21]], 1
-// CHECK8-NEXT: store i32 [[ADD13]], i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
-// CHECK8: omp.inner.for.end:
-// CHECK8-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
-// CHECK8: omp.dispatch.inc:
-// CHECK8-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK8-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK8-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
-// CHECK8-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_LB]], align 4
-// CHECK8-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK8-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK8-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
-// CHECK8-NEXT: store i32 [[ADD15]], i32* [[DOTOMP_UB]], align 4
-// CHECK8-NEXT: br label [[OMP_DISPATCH_COND]]
-// CHECK8: omp.dispatch.end:
-// CHECK8-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK8-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
-// CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP27]])
-// CHECK8-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK8-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
-// CHECK8-NEXT: br i1 [[TMP29]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK8: .omp.final.then:
-// CHECK8-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK8-NEXT: [[SUB16:%.*]] = sub nsw i32 [[TMP30]], 0
-// CHECK8-NEXT: [[DIV17:%.*]] = sdiv i32 [[SUB16]], 1
-// CHECK8-NEXT: [[MUL18:%.*]] = mul nsw i32 [[DIV17]], 1
-// CHECK8-NEXT: [[ADD19:%.*]] = add nsw i32 0, [[MUL18]]
-// CHECK8-NEXT: store i32 [[ADD19]], i32* [[I6]], align 4
-// CHECK8-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK8: .omp.final.done:
-// CHECK8-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK8-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
-// CHECK8-NEXT: br i1 [[TMP32]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
-// CHECK8: .omp.lastprivate.then:
-// CHECK8-NEXT: [[TMP33:%.*]] = load i32, i32* [[CONV1]], align 8
-// CHECK8-NEXT: store i32 [[TMP33]], i32* [[CONV1]], align 8
-// CHECK8-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
-// CHECK8: .omp.lastprivate.done:
-// CHECK8-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK8: omp.precond.end:
-// CHECK8-NEXT: ret void
-// CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l44
-// CHECK8-SAME: (i64 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
-// CHECK8-NEXT: entry:
-// CHECK8-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
-// CHECK8-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 8
-// CHECK8-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
-// CHECK8-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK8-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
-// CHECK8-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 8
-// CHECK8-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
-// CHECK8-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 8
-// CHECK8-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK8-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK8-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK8: .execute:
-// CHECK8-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK8-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
-// CHECK8-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
-// CHECK8-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
-// CHECK8-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK8-NEXT: call void @__omp_outlined__2(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i64 [[TMP3]], [1000 x i16]* [[TMP0]]) #[[ATTR3]]
-// CHECK8-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK8: .omp.deinit:
-// CHECK8-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK8-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK8: .exit:
-// CHECK8-NEXT: ret void
-// CHECK8-LABEL: define {{[^@]+}}@__omp_outlined__2
-// CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
-// CHECK8-NEXT: entry:
-// CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK8-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
-// CHECK8-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 8
-// CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
-// CHECK8-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 8
-// CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
-// CHECK8-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
-// CHECK8-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 8
-// CHECK8-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
-// CHECK8-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 8
-// CHECK8-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK8-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK8-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK8-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK8-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK8-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK8-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK8-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK8-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK8: omp.precond.then:
-// CHECK8-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK8-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK8-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK8-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
-// CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK8-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
-// CHECK8-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK8: cond.true:
-// CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK8-NEXT: br label [[COND_END:%.*]]
-// CHECK8: cond.false:
-// CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: br label [[COND_END]]
-// CHECK8: cond.end:
-// CHECK8-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
-// CHECK8-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK8-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK8: omp.inner.for.cond:
-// CHECK8-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1
-// CHECK8-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]
-// CHECK8-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK8: omp.inner.for.body:
-// CHECK8-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK8-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i64
-// CHECK8-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
-// CHECK8-NEXT: [[TMP18:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK8-NEXT: [[CONV6:%.*]] = bitcast i64* [[N_CASTED]] to i32*
-// CHECK8-NEXT: store i32 [[TMP18]], i32* [[CONV6]], align 4
-// CHECK8-NEXT: [[TMP19:%.*]] = load i64, i64* [[N_CASTED]], align 8
-// CHECK8-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
-// CHECK8-NEXT: [[TMP21:%.*]] = inttoptr i64 [[TMP15]] to i8*
-// CHECK8-NEXT: store i8* [[TMP21]], i8** [[TMP20]], align 8
-// CHECK8-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
-// CHECK8-NEXT: [[TMP23:%.*]] = inttoptr i64 [[TMP17]] to i8*
-// CHECK8-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 8
-// CHECK8-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
-// CHECK8-NEXT: [[TMP25:%.*]] = inttoptr i64 [[TMP19]] to i8*
-// CHECK8-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 8
-// CHECK8-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 3
-// CHECK8-NEXT: [[TMP27:%.*]] = bitcast [1000 x i16]* [[TMP0]] to i8*
-// CHECK8-NEXT: store i8* [[TMP27]], i8** [[TMP26]], align 8
-// CHECK8-NEXT: [[TMP28:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK8-NEXT: [[TMP29:%.*]] = load i32, i32* [[TMP28]], align 4
-// CHECK8-NEXT: [[TMP30:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK8-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP29]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, i64, [1000 x i16]*)* @__omp_outlined__3 to i8*), i8* null, i8** [[TMP30]], i64 4)
-// CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK8: omp.inner.for.inc:
-// CHECK8-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK8-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP31]], [[TMP32]]
-// CHECK8-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK8-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK8-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP33]], [[TMP34]]
-// CHECK8-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK8-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK8-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP35]], [[TMP36]]
-// CHECK8-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK8-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP37]], [[TMP38]]
-// CHECK8-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
-// CHECK8: cond.true11:
-// CHECK8-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK8-NEXT: br label [[COND_END13:%.*]]
-// CHECK8: cond.false12:
-// CHECK8-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: br label [[COND_END13]]
-// CHECK8: cond.end13:
-// CHECK8-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP39]], [[COND_TRUE11]] ], [ [[TMP40]], [[COND_FALSE12]] ]
-// CHECK8-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK8-NEXT: store i32 [[TMP41]], i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
-// CHECK8: omp.inner.for.end:
-// CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK8: omp.loop.exit:
-// CHECK8-NEXT: [[TMP42:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK8-NEXT: [[TMP43:%.*]] = load i32, i32* [[TMP42]], align 4
-// CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP43]])
-// CHECK8-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK8-NEXT: [[TMP45:%.*]] = icmp ne i32 [[TMP44]], 0
-// CHECK8-NEXT: br i1 [[TMP45]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK8: .omp.final.then:
-// CHECK8-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK8-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP46]], 0
-// CHECK8-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1
-// CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV16]], 1
-// CHECK8-NEXT: [[ADD17:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK8-NEXT: store i32 [[ADD17]], i32* [[I3]], align 4
-// CHECK8-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK8: .omp.final.done:
-// CHECK8-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK8: omp.precond.end:
-// CHECK8-NEXT: ret void
-// CHECK8-LABEL: define {{[^@]+}}@__omp_outlined__3
-// CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
-// CHECK8-NEXT: entry:
-// CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK8-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
-// CHECK8-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
-// CHECK8-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
-// CHECK8-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 8
-// CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[I5:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
-// CHECK8-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
-// CHECK8-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK8-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
-// CHECK8-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 8
-// CHECK8-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
-// CHECK8-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 8
-// CHECK8-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK8-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK8-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK8-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK8-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK8-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK8-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK8-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK8-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK8: omp.precond.then:
-// CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK8-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
-// CHECK8-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
-// CHECK8-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP5]] to i32
-// CHECK8-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK8-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP6]] to i32
-// CHECK8-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4
-// CHECK8-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4
-// CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK8-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK8-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK8: omp.inner.for.cond:
-// CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: [[CONV6:%.*]] = sext i32 [[TMP10]] to i64
-// CHECK8-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK8-NEXT: [[CMP7:%.*]] = icmp ule i64 [[CONV6]], [[TMP11]]
-// CHECK8-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK8: omp.inner.for.body:
-// CHECK8-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
-// CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK8-NEXT: store i32 [[ADD]], i32* [[I5]], align 4
-// CHECK8-NEXT: [[TMP13:%.*]] = load i32, i32* [[I5]], align 4
-// CHECK8-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
-// CHECK8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i16], [1000 x i16]* [[TMP0]], i64 0, i64 [[IDXPROM]]
-// CHECK8-NEXT: [[TMP14:%.*]] = load i16, i16* [[ARRAYIDX]], align 2
-// CHECK8-NEXT: [[CONV8:%.*]] = sext i16 [[TMP14]] to i32
-// CHECK8-NEXT: [[ADD9:%.*]] = add nsw i32 [[CONV8]], 1
-// CHECK8-NEXT: [[CONV10:%.*]] = trunc i32 [[ADD9]] to i16
-// CHECK8-NEXT: store i16 [[CONV10]], i16* [[ARRAYIDX]], align 2
-// CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK8: omp.body.continue:
-// CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK8: omp.inner.for.inc:
-// CHECK8-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK8-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
-// CHECK8-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
-// CHECK8: omp.inner.for.end:
-// CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK8: omp.loop.exit:
-// CHECK8-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK8-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
-// CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]])
-// CHECK8-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK8-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
-// CHECK8-NEXT: br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK8: .omp.final.then:
-// CHECK8-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK8-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP21]], 0
-// CHECK8-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1
-// CHECK8-NEXT: [[MUL14:%.*]] = mul nsw i32 [[DIV13]], 1
-// CHECK8-NEXT: [[ADD15:%.*]] = add nsw i32 0, [[MUL14]]
-// CHECK8-NEXT: store i32 [[ADD15]], i32* [[I5]], align 4
-// CHECK8-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK8: .omp.final.done:
-// CHECK8-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK8: omp.precond.end:
-// CHECK8-NEXT: ret void
-// CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l49
-// CHECK8-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
-// CHECK8-NEXT: entry:
-// CHECK8-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8
-// CHECK8-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK8-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8
-// CHECK8-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8
-// CHECK8-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK8-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK8-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK8: .execute:
-// CHECK8-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK8-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK8-NEXT: call void @__omp_outlined__4(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x i32]* [[TMP0]]) #[[ATTR3]]
-// CHECK8-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK8: .omp.deinit:
-// CHECK8-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK8-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK8: .exit:
-// CHECK8-NEXT: ret void
-// CHECK8-LABEL: define {{[^@]+}}@__omp_outlined__4
-// CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
-// CHECK8-NEXT: entry:
-// CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK8-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8
-// CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [3 x i8*], align 8
-// CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
-// CHECK8-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8
-// CHECK8-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8
-// CHECK8-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK8-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK8-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK8-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
-// CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
-// CHECK8-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK8: cond.true:
-// CHECK8-NEXT: br label [[COND_END:%.*]]
-// CHECK8: cond.false:
-// CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: br label [[COND_END]]
-// CHECK8: cond.end:
-// CHECK8-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
-// CHECK8-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK8-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK8: omp.inner.for.cond:
-// CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP6]], 10
-// CHECK8-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK8: omp.inner.for.body:
-// CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK8-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
-// CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
-// CHECK8-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
-// CHECK8-NEXT: [[TMP12:%.*]] = inttoptr i64 [[TMP8]] to i8*
-// CHECK8-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 8
-// CHECK8-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
-// CHECK8-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP10]] to i8*
-// CHECK8-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 8
-// CHECK8-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
-// CHECK8-NEXT: [[TMP16:%.*]] = bitcast [10 x i32]* [[TMP0]] to i8*
-// CHECK8-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 8
-// CHECK8-NEXT: [[TMP17:%.*]] = bitcast [3 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK8-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @__omp_outlined__5 to i8*), i8* null, i8** [[TMP17]], i64 3)
-// CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK8: omp.inner.for.inc:
-// CHECK8-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
-// CHECK8-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK8-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK8-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
-// CHECK8-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK8-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK8-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
-// CHECK8-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP24]], 9
-// CHECK8-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
-// CHECK8: cond.true5:
-// CHECK8-NEXT: br label [[COND_END7:%.*]]
-// CHECK8: cond.false6:
-// CHECK8-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: br label [[COND_END7]]
-// CHECK8: cond.end7:
-// CHECK8-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP25]], [[COND_FALSE6]] ]
-// CHECK8-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK8-NEXT: store i32 [[TMP26]], i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
-// CHECK8: omp.inner.for.end:
-// CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK8: omp.loop.exit:
-// CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
-// CHECK8-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK8-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0
-// CHECK8-NEXT: br i1 [[TMP28]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK8: .omp.final.then:
-// CHECK8-NEXT: store i32 10, i32* [[I]], align 4
-// CHECK8-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK8: .omp.final.done:
-// CHECK8-NEXT: ret void
-// CHECK8-LABEL: define {{[^@]+}}@__omp_outlined__5
-// CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
-// CHECK8-NEXT: entry:
-// CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK8-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
-// CHECK8-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
-// CHECK8-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8
-// CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
-// CHECK8-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
-// CHECK8-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK8-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8
-// CHECK8-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8
-// CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK8-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
-// CHECK8-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
-// CHECK8-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
-// CHECK8-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK8-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
-// CHECK8-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
-// CHECK8-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
-// CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK8-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
-// CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK8-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK8: omp.inner.for.cond:
-// CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: [[CONV2:%.*]] = sext i32 [[TMP6]] to i64
-// CHECK8-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK8-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV2]], [[TMP7]]
-// CHECK8-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK8: omp.inner.for.body:
-// CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
-// CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK8-NEXT: store i32 [[ADD]], i32* [[I]], align 4
-// CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
-// CHECK8-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64
-// CHECK8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
-// CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
-// CHECK8-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
-// CHECK8-NEXT: store i32 [[ADD3]], i32* [[ARRAYIDX]], align 4
-// CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK8: omp.body.continue:
-// CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK8: omp.inner.for.inc:
-// CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK8-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
-// CHECK8-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
-// CHECK8: omp.inner.for.end:
-// CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK8: omp.loop.exit:
-// CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
-// CHECK8-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK8-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
-// CHECK8-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK8: .omp.final.then:
-// CHECK8-NEXT: store i32 10, i32* [[I]], align 4
-// CHECK8-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK8: .omp.final.done:
-// CHECK8-NEXT: ret void
-// CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l54
-// CHECK8-SAME: ([10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i64 [[F:%.*]]) #[[ATTR0]] {
-// CHECK8-NEXT: entry:
-// CHECK8-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 8
-// CHECK8-NEXT: [[F_ADDR:%.*]] = alloca i64, align 8
-// CHECK8-NEXT: [[F_CASTED:%.*]] = alloca i64, align 8
-// CHECK8-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK8-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 8
-// CHECK8-NEXT: store i64 [[F]], i64* [[F_ADDR]], align 8
-// CHECK8-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 8
-// CHECK8-NEXT: [[CONV:%.*]] = bitcast i64* [[F_ADDR]] to i32*
-// CHECK8-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK8-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK8-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK8: .execute:
-// CHECK8-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK8-NEXT: [[CONV1:%.*]] = bitcast i64* [[F_CASTED]] to i32*
-// CHECK8-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
-// CHECK8-NEXT: [[TMP3:%.*]] = load i64, i64* [[F_CASTED]], align 8
-// CHECK8-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK8-NEXT: call void @__omp_outlined__6(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x [10 x i32]]* [[TMP0]], i64 [[TMP3]]) #[[ATTR3]]
-// CHECK8-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK8: .omp.deinit:
-// CHECK8-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK8-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK8: .exit:
-// CHECK8-NEXT: ret void
-// CHECK8-LABEL: define {{[^@]+}}@__omp_outlined__6
-// CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i64 [[F:%.*]]) #[[ATTR0]] {
-// CHECK8-NEXT: entry:
-// CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK8-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 8
-// CHECK8-NEXT: [[F_ADDR:%.*]] = alloca i64, align 8
-// CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[K:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[J:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[F_CASTED:%.*]] = alloca i64, align 8
-// CHECK8-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 8
-// CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
-// CHECK8-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 8
-// CHECK8-NEXT: store i64 [[F]], i64* [[F_ADDR]], align 8
-// CHECK8-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 8
-// CHECK8-NEXT: [[CONV:%.*]] = bitcast i64* [[F_ADDR]] to i32*
-// CHECK8-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK8-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK8-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK8-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
-// CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
-// CHECK8-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK8: cond.true:
-// CHECK8-NEXT: br label [[COND_END:%.*]]
-// CHECK8: cond.false:
-// CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: br label [[COND_END]]
-// CHECK8: cond.end:
-// CHECK8-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
-// CHECK8-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK8-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK8: omp.inner.for.cond:
-// CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP6]], 100
-// CHECK8-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK8: omp.inner.for.body:
-// CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK8-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
-// CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
-// CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK8-NEXT: [[CONV3:%.*]] = bitcast i64* [[F_CASTED]] to i32*
-// CHECK8-NEXT: store i32 [[TMP11]], i32* [[CONV3]], align 4
-// CHECK8-NEXT: [[TMP12:%.*]] = load i64, i64* [[F_CASTED]], align 8
-// CHECK8-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
-// CHECK8-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP8]] to i8*
-// CHECK8-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 8
-// CHECK8-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
-// CHECK8-NEXT: [[TMP16:%.*]] = inttoptr i64 [[TMP10]] to i8*
-// CHECK8-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 8
-// CHECK8-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
-// CHECK8-NEXT: [[TMP18:%.*]] = bitcast [10 x [10 x i32]]* [[TMP0]] to i8*
-// CHECK8-NEXT: store i8* [[TMP18]], i8** [[TMP17]], align 8
-// CHECK8-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 3
-// CHECK8-NEXT: [[TMP20:%.*]] = inttoptr i64 [[TMP12]] to i8*
-// CHECK8-NEXT: store i8* [[TMP20]], i8** [[TMP19]], align 8
-// CHECK8-NEXT: [[TMP21:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK8-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, [10 x [10 x i32]]*, i64)* @__omp_outlined__7 to i8*), i8* null, i8** [[TMP21]], i64 4)
-// CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK8: omp.inner.for.inc:
-// CHECK8-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
-// CHECK8-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK8-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK8-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
-// CHECK8-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK8-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK8-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP26]], [[TMP27]]
-// CHECK8-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP28]], 99
-// CHECK8-NEXT: br i1 [[CMP6]], label [[COND_TRUE7:%.*]], label [[COND_FALSE8:%.*]]
-// CHECK8: cond.true7:
-// CHECK8-NEXT: br label [[COND_END9:%.*]]
-// CHECK8: cond.false8:
-// CHECK8-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: br label [[COND_END9]]
-// CHECK8: cond.end9:
-// CHECK8-NEXT: [[COND10:%.*]] = phi i32 [ 99, [[COND_TRUE7]] ], [ [[TMP29]], [[COND_FALSE8]] ]
-// CHECK8-NEXT: store i32 [[COND10]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK8-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK8-NEXT: store i32 [[TMP30]], i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]
-// CHECK8: omp.inner.for.end:
-// CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK8: omp.loop.exit:
-// CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
-// CHECK8-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK8-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
-// CHECK8-NEXT: br i1 [[TMP32]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK8: .omp.final.then:
-// CHECK8-NEXT: store i32 10, i32* [[I]], align 4
-// CHECK8-NEXT: store i32 10, i32* [[J]], align 4
-// CHECK8-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK8: .omp.final.done:
-// CHECK8-NEXT: ret void
-// CHECK8-LABEL: define {{[^@]+}}@__omp_outlined__7
-// CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i64 [[F:%.*]]) #[[ATTR0]] {
-// CHECK8-NEXT: entry:
-// CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
-// CHECK8-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
-// CHECK8-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
-// CHECK8-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 8
-// CHECK8-NEXT: [[F_ADDR:%.*]] = alloca i64, align 8
-// CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[K:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: [[J:%.*]] = alloca i32, align 4
-// CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
-// CHECK8-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
-// CHECK8-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK8-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 8
-// CHECK8-NEXT: store i64 [[F]], i64* [[F_ADDR]], align 8
-// CHECK8-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 8
-// CHECK8-NEXT: [[CONV:%.*]] = bitcast i64* [[F_ADDR]] to i32*
-// CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK8-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
-// CHECK8-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
-// CHECK8-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32
-// CHECK8-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK8-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP2]] to i32
-// CHECK8-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_LB]], align 4
-// CHECK8-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4
-// CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK8-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
-// CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK8-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK8: omp.inner.for.cond:
-// CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: [[CONV4:%.*]] = sext i32 [[TMP6]] to i64
-// CHECK8-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
-// CHECK8-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV4]], [[TMP7]]
-// CHECK8-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK8: omp.inner.for.body:
-// CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP8]], 10
-// CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
-// CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK8-NEXT: store i32 [[ADD]], i32* [[I]], align 4
-// CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: [[DIV5:%.*]] = sdiv i32 [[TMP10]], 10
-// CHECK8-NEXT: [[MUL6:%.*]] = mul nsw i32 [[DIV5]], 10
-// CHECK8-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL6]]
-// CHECK8-NEXT: [[MUL7:%.*]] = mul nsw i32 [[SUB]], 1
-// CHECK8-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL7]]
-// CHECK8-NEXT: store i32 [[ADD8]], i32* [[J]], align 4
-// CHECK8-NEXT: store i32 10, i32* [[K]], align 4
-// CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
-// CHECK8-NEXT: [[TMP12:%.*]] = load i32, i32* [[J]], align 4
-// CHECK8-NEXT: [[TMP13:%.*]] = load i32, i32* [[CONV]], align 8
-// CHECK8-NEXT: [[MUL9:%.*]] = mul nsw i32 [[TMP12]], [[TMP13]]
-// CHECK8-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP11]], [[MUL9]]
-// CHECK8-NEXT: [[TMP14:%.*]] = load i32, i32* [[K]], align 4
-// CHECK8-NEXT: [[ADD11:%.*]] = add nsw i32 [[ADD10]], [[TMP14]]
-// CHECK8-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4
-// CHECK8-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64
-// CHECK8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [10 x i32]], [10 x [10 x i32]]* [[TMP0]], i64 0, i64 [[IDXPROM]]
-// CHECK8-NEXT: [[TMP16:%.*]] = load i32, i32* [[J]], align 4
-// CHECK8-NEXT: [[IDXPROM12:%.*]] = sext i32 [[TMP16]] to i64
-// CHECK8-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[ARRAYIDX]], i64 0, i64 [[IDXPROM12]]
-// CHECK8-NEXT: store i32 [[ADD11]], i32* [[ARRAYIDX13]], align 4
-// CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK8: omp.body.continue:
-// CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK8: omp.inner.for.inc:
-// CHECK8-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK8-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
-// CHECK8-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV]], align 4
-// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]]
-// CHECK8: omp.inner.for.end:
-// CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK8: omp.loop.exit:
-// CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
-// CHECK8-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK8-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
-// CHECK8-NEXT: br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK8: .omp.final.then:
-// CHECK8-NEXT: store i32 10, i32* [[I]], align 4
-// CHECK8-NEXT: store i32 10, i32* [[J]], align 4
-// CHECK8-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK8: .omp.final.done:
-// CHECK8-NEXT: ret void
-// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l38
-// CHECK9-SAME: (i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0:[0-9]+]] {
-// CHECK9-NEXT: entry:
-// CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK9-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[L_CASTED:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK9-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK9-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK9-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
-// CHECK9-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK9-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK9-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK9-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK9: .execute:
-// CHECK9-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]])
-// CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK9-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
-// CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[L_ADDR]], align 4
-// CHECK9-NEXT: store i32 [[TMP4]], i32* [[L_CASTED]], align 4
-// CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[L_CASTED]], align 4
-// CHECK9-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK9-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP3]], [1000 x i32]* [[TMP0]], i32 [[TMP5]]) #[[ATTR3:[0-9]+]]
-// CHECK9-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK9: .omp.deinit:
-// CHECK9-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK9-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK9: .exit:
-// CHECK9-NEXT: ret void
-// CHECK9-LABEL: define {{[^@]+}}@__omp_outlined__
-// CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0]] {
-// CHECK9-NEXT: entry:
-// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK9-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[I4:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[L_CASTED:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [5 x i8*], align 4
-// CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK9-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK9-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK9-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
-// CHECK9-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK9-NEXT: [[TMP1:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared", align 2
-// CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* @"_openmp_static_kernel$size", align 4
-// CHECK9-NEXT: call void @__kmpc_get_team_static_memory(i16 1, i8* addrspacecast (i8 addrspace(3)* getelementptr inbounds (%"union._shared_openmp_static_memory_type_$_", %"union._shared_openmp_static_memory_type_$_" addrspace(3)* @"_openmp_shared_static_glob_rd_$_", i32 0, i32 0, i32 0) to i8*), i32 [[TMP2]], i16 [[TMP1]], i8** addrspacecast (i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr" to i8**))
-// CHECK9-NEXT: [[TMP3:%.*]] = load i8*, i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr", align 4
-// CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds i8, i8* [[TMP3]], i32 0
-// CHECK9-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to %struct._globalized_locals_ty*
-// CHECK9-NEXT: [[L1:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY:%.*]], %struct._globalized_locals_ty* [[TMP5]], i32 0, i32 0
-// CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0
-// CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK9-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK9-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK9-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]]
-// CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK9: omp.precond.then:
-// CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK9-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK9-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
-// CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 128)
-// CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK9-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]]
-// CHECK9-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK9: cond.true:
-// CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK9-NEXT: br label [[COND_END:%.*]]
-// CHECK9: cond.false:
-// CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: br label [[COND_END]]
-// CHECK9: cond.end:
-// CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ]
-// CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK9-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK9: omp.inner.for.cond:
-// CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], 1
-// CHECK9-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP17]], [[ADD]]
-// CHECK9-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK9: omp.inner.for.body:
-// CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK9-NEXT: store i32 [[TMP21]], i32* [[N_CASTED]], align 4
-// CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[L_ADDR]], align 4
-// CHECK9-NEXT: store i32 [[TMP23]], i32* [[L_CASTED]], align 4
-// CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[L_CASTED]], align 4
-// CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK9-NEXT: [[TMP26:%.*]] = inttoptr i32 [[TMP19]] to i8*
-// CHECK9-NEXT: store i8* [[TMP26]], i8** [[TMP25]], align 4
-// CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK9-NEXT: [[TMP28:%.*]] = inttoptr i32 [[TMP20]] to i8*
-// CHECK9-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 4
-// CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK9-NEXT: [[TMP30:%.*]] = inttoptr i32 [[TMP22]] to i8*
-// CHECK9-NEXT: store i8* [[TMP30]], i8** [[TMP29]], align 4
-// CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
-// CHECK9-NEXT: [[TMP32:%.*]] = bitcast [1000 x i32]* [[TMP0]] to i8*
-// CHECK9-NEXT: store i8* [[TMP32]], i8** [[TMP31]], align 4
-// CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 4
-// CHECK9-NEXT: [[TMP34:%.*]] = inttoptr i32 [[TMP24]] to i8*
-// CHECK9-NEXT: store i8* [[TMP34]], i8** [[TMP33]], align 4
-// CHECK9-NEXT: [[TMP35:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK9-NEXT: [[TMP36:%.*]] = load i32, i32* [[TMP35]], align 4
-// CHECK9-NEXT: [[TMP37:%.*]] = bitcast [5 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK9-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP36]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i32]*, i32)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP37]], i32 5)
-// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK9: omp.inner.for.inc:
-// CHECK9-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK9-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP38]], [[TMP39]]
-// CHECK9-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK9-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK9-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP40]], [[TMP41]]
-// CHECK9-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK9-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK9-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP42]], [[TMP43]]
-// CHECK9-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK9-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP44]], [[TMP45]]
-// CHECK9-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
-// CHECK9: cond.true11:
-// CHECK9-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK9-NEXT: br label [[COND_END13:%.*]]
-// CHECK9: cond.false12:
-// CHECK9-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: br label [[COND_END13]]
-// CHECK9: cond.end13:
-// CHECK9-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP46]], [[COND_TRUE11]] ], [ [[TMP47]], [[COND_FALSE12]] ]
-// CHECK9-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK9-NEXT: store i32 [[TMP48]], i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
-// CHECK9: omp.inner.for.end:
-// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK9: omp.loop.exit:
-// CHECK9-NEXT: [[TMP49:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK9-NEXT: [[TMP50:%.*]] = load i32, i32* [[TMP49]], align 4
-// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP50]])
-// CHECK9-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK9-NEXT: [[TMP52:%.*]] = icmp ne i32 [[TMP51]], 0
-// CHECK9-NEXT: br i1 [[TMP52]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK9: .omp.final.then:
-// CHECK9-NEXT: [[TMP53:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK9-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP53]], 0
-// CHECK9-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1
-// CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV16]], 1
-// CHECK9-NEXT: [[ADD17:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK9-NEXT: store i32 [[ADD17]], i32* [[I4]], align 4
-// CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK9: .omp.final.done:
-// CHECK9-NEXT: [[TMP54:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK9-NEXT: [[TMP55:%.*]] = icmp ne i32 [[TMP54]], 0
-// CHECK9-NEXT: br i1 [[TMP55]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
-// CHECK9: .omp.lastprivate.then:
-// CHECK9-NEXT: [[TMP56:%.*]] = load i32, i32* [[L_ADDR]], align 4
-// CHECK9-NEXT: store i32 [[TMP56]], i32* [[L_ADDR]], align 4
-// CHECK9-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
-// CHECK9: .omp.lastprivate.done:
-// CHECK9-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK9: omp.precond.end:
-// CHECK9-NEXT: [[TMP57:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared", align 2
-// CHECK9-NEXT: call void @__kmpc_restore_team_static_memory(i16 1, i16 [[TMP57]])
-// CHECK9-NEXT: ret void
-// CHECK9-LABEL: define {{[^@]+}}@__omp_outlined__1
-// CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0]] {
-// CHECK9-NEXT: entry:
-// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK9-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK9-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK9-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK9-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK9-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK9-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
-// CHECK9-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK9-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK9-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK9: omp.precond.then:
-// CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
-// CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
-// CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
-// CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK9-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 32)
-// CHECK9-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
-// CHECK9: omp.dispatch.cond:
-// CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK9-NEXT: [[CMP4:%.*]] = icmp ugt i32 [[TMP9]], [[TMP10]]
-// CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK9: cond.true:
-// CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK9-NEXT: br label [[COND_END:%.*]]
-// CHECK9: cond.false:
-// CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK9-NEXT: br label [[COND_END]]
-// CHECK9: cond.end:
-// CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
-// CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
-// CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK9-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
-// CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
-// CHECK9: omp.dispatch.body:
-// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK9: omp.inner.for.cond:
-// CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK9-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
-// CHECK9-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK9: omp.inner.for.body:
-// CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
-// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK9-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
-// CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4
-// CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 [[TMP19]]
-// CHECK9-NEXT: store i32 1, i32* [[ARRAYIDX]], align 4
-// CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[I3]], align 4
-// CHECK9-NEXT: store i32 [[TMP20]], i32* [[L_ADDR]], align 4
-// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK9: omp.body.continue:
-// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK9: omp.inner.for.inc:
-// CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP21]], 1
-// CHECK9-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
-// CHECK9: omp.inner.for.end:
-// CHECK9-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
-// CHECK9: omp.dispatch.inc:
-// CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK9-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
-// CHECK9-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4
-// CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK9-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
-// CHECK9-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4
-// CHECK9-NEXT: br label [[OMP_DISPATCH_COND]]
-// CHECK9: omp.dispatch.end:
-// CHECK9-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
-// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP27]])
-// CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK9-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
-// CHECK9-NEXT: br i1 [[TMP29]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK9: .omp.final.then:
-// CHECK9-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK9-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP30]], 0
-// CHECK9-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1
-// CHECK9-NEXT: [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 1
-// CHECK9-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]]
-// CHECK9-NEXT: store i32 [[ADD13]], i32* [[I3]], align 4
-// CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK9: .omp.final.done:
-// CHECK9-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK9-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
-// CHECK9-NEXT: br i1 [[TMP32]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
-// CHECK9: .omp.lastprivate.then:
-// CHECK9-NEXT: [[TMP33:%.*]] = load i32, i32* [[L_ADDR]], align 4
-// CHECK9-NEXT: store i32 [[TMP33]], i32* [[L_ADDR]], align 4
-// CHECK9-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
-// CHECK9: .omp.lastprivate.done:
-// CHECK9-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK9: omp.precond.end:
-// CHECK9-NEXT: ret void
-// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l44
-// CHECK9-SAME: (i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
-// CHECK9-NEXT: entry:
-// CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
-// CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK9-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK9-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK9-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK9-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK9-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK9-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK9: .execute:
-// CHECK9-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK9-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
-// CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK9-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK9-NEXT: call void @__omp_outlined__2(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP3]], [1000 x i16]* [[TMP0]]) #[[ATTR3]]
-// CHECK9-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK9: .omp.deinit:
-// CHECK9-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK9-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK9: .exit:
-// CHECK9-NEXT: ret void
-// CHECK9-LABEL: define {{[^@]+}}@__omp_outlined__2
-// CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
-// CHECK9-NEXT: entry:
-// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
-// CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 4
-// CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK9-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK9-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK9-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK9-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK9-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK9: omp.precond.then:
-// CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK9-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK9-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
-// CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
-// CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK9: cond.true:
-// CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK9-NEXT: br label [[COND_END:%.*]]
-// CHECK9: cond.false:
-// CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: br label [[COND_END]]
-// CHECK9: cond.end:
-// CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
-// CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK9-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK9: omp.inner.for.cond:
-// CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1
-// CHECK9-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]
-// CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK9: omp.inner.for.body:
-// CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK9-NEXT: store i32 [[TMP16]], i32* [[N_CASTED]], align 4
-// CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK9-NEXT: [[TMP19:%.*]] = inttoptr i32 [[TMP14]] to i8*
-// CHECK9-NEXT: store i8* [[TMP19]], i8** [[TMP18]], align 4
-// CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK9-NEXT: [[TMP21:%.*]] = inttoptr i32 [[TMP15]] to i8*
-// CHECK9-NEXT: store i8* [[TMP21]], i8** [[TMP20]], align 4
-// CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK9-NEXT: [[TMP23:%.*]] = inttoptr i32 [[TMP17]] to i8*
-// CHECK9-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 4
-// CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
-// CHECK9-NEXT: [[TMP25:%.*]] = bitcast [1000 x i16]* [[TMP0]] to i8*
-// CHECK9-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 4
-// CHECK9-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
-// CHECK9-NEXT: [[TMP28:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK9-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP27]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i16]*)* @__omp_outlined__3 to i8*), i8* null, i8** [[TMP28]], i32 4)
-// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK9: omp.inner.for.inc:
-// CHECK9-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK9-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP29]], [[TMP30]]
-// CHECK9-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK9-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK9-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP31]], [[TMP32]]
-// CHECK9-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK9-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK9-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP33]], [[TMP34]]
-// CHECK9-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK9-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP35]], [[TMP36]]
-// CHECK9-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]]
-// CHECK9: cond.true10:
-// CHECK9-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK9-NEXT: br label [[COND_END12:%.*]]
-// CHECK9: cond.false11:
-// CHECK9-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: br label [[COND_END12]]
-// CHECK9: cond.end12:
-// CHECK9-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP37]], [[COND_TRUE10]] ], [ [[TMP38]], [[COND_FALSE11]] ]
-// CHECK9-NEXT: store i32 [[COND13]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK9-NEXT: store i32 [[TMP39]], i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
-// CHECK9: omp.inner.for.end:
-// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK9: omp.loop.exit:
-// CHECK9-NEXT: [[TMP40:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK9-NEXT: [[TMP41:%.*]] = load i32, i32* [[TMP40]], align 4
-// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP41]])
-// CHECK9-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK9-NEXT: [[TMP43:%.*]] = icmp ne i32 [[TMP42]], 0
-// CHECK9-NEXT: br i1 [[TMP43]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK9: .omp.final.then:
-// CHECK9-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK9-NEXT: [[SUB14:%.*]] = sub nsw i32 [[TMP44]], 0
-// CHECK9-NEXT: [[DIV15:%.*]] = sdiv i32 [[SUB14]], 1
-// CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV15]], 1
-// CHECK9-NEXT: [[ADD16:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK9-NEXT: store i32 [[ADD16]], i32* [[I3]], align 4
-// CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK9: .omp.final.done:
-// CHECK9-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK9: omp.precond.end:
-// CHECK9-NEXT: ret void
-// CHECK9-LABEL: define {{[^@]+}}@__omp_outlined__3
-// CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
-// CHECK9-NEXT: entry:
-// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
-// CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK9-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK9-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK9-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK9-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK9-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK9-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK9-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK9: omp.precond.then:
-// CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
-// CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
-// CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
-// CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK9-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK9-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK9: omp.inner.for.cond:
-// CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK9-NEXT: [[CMP4:%.*]] = icmp ule i32 [[TMP10]], [[TMP11]]
-// CHECK9-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK9: omp.inner.for.body:
-// CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
-// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK9-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
-// CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[I3]], align 4
-// CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i16], [1000 x i16]* [[TMP0]], i32 0, i32 [[TMP13]]
-// CHECK9-NEXT: [[TMP14:%.*]] = load i16, i16* [[ARRAYIDX]], align 2
-// CHECK9-NEXT: [[CONV:%.*]] = sext i16 [[TMP14]] to i32
-// CHECK9-NEXT: [[ADD5:%.*]] = add nsw i32 [[CONV]], 1
-// CHECK9-NEXT: [[CONV6:%.*]] = trunc i32 [[ADD5]] to i16
-// CHECK9-NEXT: store i16 [[CONV6]], i16* [[ARRAYIDX]], align 2
-// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK9: omp.body.continue:
-// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK9: omp.inner.for.inc:
-// CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK9-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
-// CHECK9-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
-// CHECK9: omp.inner.for.end:
-// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK9: omp.loop.exit:
-// CHECK9-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
-// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]])
-// CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK9-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
-// CHECK9-NEXT: br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK9: .omp.final.then:
-// CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK9-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP21]], 0
-// CHECK9-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1
-// CHECK9-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1
-// CHECK9-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
-// CHECK9-NEXT: store i32 [[ADD11]], i32* [[I3]], align 4
-// CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK9: .omp.final.done:
-// CHECK9-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK9: omp.precond.end:
-// CHECK9-NEXT: ret void
-// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l49
-// CHECK9-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
-// CHECK9-NEXT: entry:
-// CHECK9-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
-// CHECK9-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK9-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
-// CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
-// CHECK9-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK9-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK9-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK9: .execute:
-// CHECK9-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK9-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK9-NEXT: call void @__omp_outlined__4(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x i32]* [[TMP0]]) #[[ATTR3]]
-// CHECK9-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK9: .omp.deinit:
-// CHECK9-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK9-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK9: .exit:
-// CHECK9-NEXT: ret void
-// CHECK9-LABEL: define {{[^@]+}}@__omp_outlined__4
-// CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
-// CHECK9-NEXT: entry:
-// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK9-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
-// CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [3 x i8*], align 4
-// CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK9-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
-// CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
-// CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK9-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK9-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
-// CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
-// CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK9: cond.true:
-// CHECK9-NEXT: br label [[COND_END:%.*]]
-// CHECK9: cond.false:
-// CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: br label [[COND_END]]
-// CHECK9: cond.end:
-// CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
-// CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK9: omp.inner.for.cond:
-// CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP6]], 10
-// CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK9: omp.inner.for.body:
-// CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK9-NEXT: [[TMP10:%.*]] = inttoptr i32 [[TMP7]] to i8*
-// CHECK9-NEXT: store i8* [[TMP10]], i8** [[TMP9]], align 4
-// CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK9-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP8]] to i8*
-// CHECK9-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 4
-// CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK9-NEXT: [[TMP14:%.*]] = bitcast [10 x i32]* [[TMP0]] to i8*
-// CHECK9-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 4
-// CHECK9-NEXT: [[TMP15:%.*]] = bitcast [3 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK9-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @__omp_outlined__5 to i8*), i8* null, i8** [[TMP15]], i32 3)
-// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK9: omp.inner.for.inc:
-// CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
-// CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK9-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
-// CHECK9-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
-// CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP22]], 9
-// CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
-// CHECK9: cond.true5:
-// CHECK9-NEXT: br label [[COND_END7:%.*]]
-// CHECK9: cond.false6:
-// CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: br label [[COND_END7]]
-// CHECK9: cond.end7:
-// CHECK9-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP23]], [[COND_FALSE6]] ]
-// CHECK9-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK9-NEXT: store i32 [[TMP24]], i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
-// CHECK9: omp.inner.for.end:
-// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK9: omp.loop.exit:
-// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
-// CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK9-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
-// CHECK9-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK9: .omp.final.then:
-// CHECK9-NEXT: store i32 10, i32* [[I]], align 4
-// CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK9: .omp.final.done:
-// CHECK9-NEXT: ret void
-// CHECK9-LABEL: define {{[^@]+}}@__omp_outlined__5
-// CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
-// CHECK9-NEXT: entry:
-// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
-// CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK9-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK9-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK9-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
-// CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
-// CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK9-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
-// CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK9-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
-// CHECK9-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
-// CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK9-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
-// CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK9: omp.inner.for.cond:
-// CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK9-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP6]], [[TMP7]]
-// CHECK9-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK9: omp.inner.for.body:
-// CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
-// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4
-// CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
-// CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]]
-// CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
-// CHECK9-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP10]], 1
-// CHECK9-NEXT: store i32 [[ADD1]], i32* [[ARRAYIDX]], align 4
-// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK9: omp.body.continue:
-// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK9: omp.inner.for.inc:
-// CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK9-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
-// CHECK9-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
-// CHECK9: omp.inner.for.end:
-// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK9: omp.loop.exit:
-// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
-// CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK9-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
-// CHECK9-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK9: .omp.final.then:
-// CHECK9-NEXT: store i32 10, i32* [[I]], align 4
-// CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK9: .omp.final.done:
-// CHECK9-NEXT: ret void
-// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l54
-// CHECK9-SAME: ([10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
-// CHECK9-NEXT: entry:
-// CHECK9-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK9-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[F_CASTED:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK9-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK9-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
-// CHECK9-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK9-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK9-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK9-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK9: .execute:
-// CHECK9-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[F_ADDR]], align 4
-// CHECK9-NEXT: store i32 [[TMP2]], i32* [[F_CASTED]], align 4
-// CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[F_CASTED]], align 4
-// CHECK9-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK9-NEXT: call void @__omp_outlined__6(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x [10 x i32]]* [[TMP0]], i32 [[TMP3]]) #[[ATTR3]]
-// CHECK9-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK9: .omp.deinit:
-// CHECK9-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK9-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK9: .exit:
-// CHECK9-NEXT: ret void
-// CHECK9-LABEL: define {{[^@]+}}@__omp_outlined__6
-// CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
-// CHECK9-NEXT: entry:
-// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK9-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK9-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[K:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[J:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[F_CASTED:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 4
-// CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK9-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK9-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
-// CHECK9-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK9-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
-// CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
-// CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK9: cond.true:
-// CHECK9-NEXT: br label [[COND_END:%.*]]
-// CHECK9: cond.false:
-// CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: br label [[COND_END]]
-// CHECK9: cond.end:
-// CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
-// CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK9: omp.inner.for.cond:
-// CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP6]], 100
-// CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK9: omp.inner.for.body:
-// CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[F_ADDR]], align 4
-// CHECK9-NEXT: store i32 [[TMP9]], i32* [[F_CASTED]], align 4
-// CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[F_CASTED]], align 4
-// CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK9-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP7]] to i8*
-// CHECK9-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 4
-// CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK9-NEXT: [[TMP14:%.*]] = inttoptr i32 [[TMP8]] to i8*
-// CHECK9-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 4
-// CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK9-NEXT: [[TMP16:%.*]] = bitcast [10 x [10 x i32]]* [[TMP0]] to i8*
-// CHECK9-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 4
-// CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
-// CHECK9-NEXT: [[TMP18:%.*]] = inttoptr i32 [[TMP10]] to i8*
-// CHECK9-NEXT: store i8* [[TMP18]], i8** [[TMP17]], align 4
-// CHECK9-NEXT: [[TMP19:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK9-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, [10 x [10 x i32]]*, i32)* @__omp_outlined__7 to i8*), i8* null, i8** [[TMP19]], i32 4)
-// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK9: omp.inner.for.inc:
-// CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
-// CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
-// CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK9-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
-// CHECK9-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP26]], 99
-// CHECK9-NEXT: br i1 [[CMP5]], label [[COND_TRUE6:%.*]], label [[COND_FALSE7:%.*]]
-// CHECK9: cond.true6:
-// CHECK9-NEXT: br label [[COND_END8:%.*]]
-// CHECK9: cond.false7:
-// CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: br label [[COND_END8]]
-// CHECK9: cond.end8:
-// CHECK9-NEXT: [[COND9:%.*]] = phi i32 [ 99, [[COND_TRUE6]] ], [ [[TMP27]], [[COND_FALSE7]] ]
-// CHECK9-NEXT: store i32 [[COND9]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK9-NEXT: store i32 [[TMP28]], i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]
-// CHECK9: omp.inner.for.end:
-// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK9: omp.loop.exit:
-// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
-// CHECK9-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK9-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0
-// CHECK9-NEXT: br i1 [[TMP30]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK9: .omp.final.then:
-// CHECK9-NEXT: store i32 10, i32* [[I]], align 4
-// CHECK9-NEXT: store i32 10, i32* [[J]], align 4
-// CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK9: .omp.final.done:
-// CHECK9-NEXT: ret void
-// CHECK9-LABEL: define {{[^@]+}}@__omp_outlined__7
-// CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
-// CHECK9-NEXT: entry:
-// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK9-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[K:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: [[J:%.*]] = alloca i32, align 4
-// CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK9-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK9-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK9-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK9-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
-// CHECK9-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
-// CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK9-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
-// CHECK9-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
-// CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK9-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
-// CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK9: omp.inner.for.cond:
-// CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK9-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP6]], [[TMP7]]
-// CHECK9-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK9: omp.inner.for.body:
-// CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP8]], 10
-// CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
-// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4
-// CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: [[DIV2:%.*]] = sdiv i32 [[TMP10]], 10
-// CHECK9-NEXT: [[MUL3:%.*]] = mul nsw i32 [[DIV2]], 10
-// CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL3]]
-// CHECK9-NEXT: [[MUL4:%.*]] = mul nsw i32 [[SUB]], 1
-// CHECK9-NEXT: [[ADD5:%.*]] = add nsw i32 0, [[MUL4]]
-// CHECK9-NEXT: store i32 [[ADD5]], i32* [[J]], align 4
-// CHECK9-NEXT: store i32 10, i32* [[K]], align 4
-// CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
-// CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[J]], align 4
-// CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[F_ADDR]], align 4
-// CHECK9-NEXT: [[MUL6:%.*]] = mul nsw i32 [[TMP12]], [[TMP13]]
-// CHECK9-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP11]], [[MUL6]]
-// CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[K]], align 4
-// CHECK9-NEXT: [[ADD8:%.*]] = add nsw i32 [[ADD7]], [[TMP14]]
-// CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4
-// CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [10 x i32]], [10 x [10 x i32]]* [[TMP0]], i32 0, i32 [[TMP15]]
-// CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[J]], align 4
-// CHECK9-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP16]]
-// CHECK9-NEXT: store i32 [[ADD8]], i32* [[ARRAYIDX9]], align 4
-// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK9: omp.body.continue:
-// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK9: omp.inner.for.inc:
-// CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK9-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
-// CHECK9-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
-// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]]
-// CHECK9: omp.inner.for.end:
-// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK9: omp.loop.exit:
-// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
-// CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK9-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
-// CHECK9-NEXT: br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK9: .omp.final.then:
-// CHECK9-NEXT: store i32 10, i32* [[I]], align 4
-// CHECK9-NEXT: store i32 10, i32* [[J]], align 4
-// CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK9: .omp.final.done:
-// CHECK9-NEXT: ret void
-// CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l38
-// CHECK10-SAME: (i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0:[0-9]+]] {
-// CHECK10-NEXT: entry:
-// CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK10-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[L_CASTED:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK10-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK10-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK10-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
-// CHECK10-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK10-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK10-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK10-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK10: .execute:
-// CHECK10-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]])
-// CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK10-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
-// CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[L_ADDR]], align 4
-// CHECK10-NEXT: store i32 [[TMP4]], i32* [[L_CASTED]], align 4
-// CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[L_CASTED]], align 4
-// CHECK10-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK10-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP3]], [1000 x i32]* [[TMP0]], i32 [[TMP5]]) #[[ATTR3:[0-9]+]]
-// CHECK10-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK10: .omp.deinit:
-// CHECK10-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK10-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK10: .exit:
-// CHECK10-NEXT: ret void
-// CHECK10-LABEL: define {{[^@]+}}@__omp_outlined__
-// CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0]] {
-// CHECK10-NEXT: entry:
-// CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK10-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[I4:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[L_CASTED:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [5 x i8*], align 4
-// CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK10-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK10-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK10-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
-// CHECK10-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK10-NEXT: [[TMP1:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared", align 2
-// CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* @"_openmp_static_kernel$size", align 4
-// CHECK10-NEXT: call void @__kmpc_get_team_static_memory(i16 1, i8* addrspacecast (i8 addrspace(3)* getelementptr inbounds (%"union._shared_openmp_static_memory_type_$_", %"union._shared_openmp_static_memory_type_$_" addrspace(3)* @"_openmp_shared_static_glob_rd_$_", i32 0, i32 0, i32 0) to i8*), i32 [[TMP2]], i16 [[TMP1]], i8** addrspacecast (i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr" to i8**))
-// CHECK10-NEXT: [[TMP3:%.*]] = load i8*, i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr", align 4
-// CHECK10-NEXT: [[TMP4:%.*]] = getelementptr inbounds i8, i8* [[TMP3]], i32 0
-// CHECK10-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to %struct._globalized_locals_ty*
-// CHECK10-NEXT: [[L1:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY:%.*]], %struct._globalized_locals_ty* [[TMP5]], i32 0, i32 0
-// CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0
-// CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK10-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK10-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK10-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]]
-// CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK10: omp.precond.then:
-// CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK10-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK10-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
-// CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 128)
-// CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK10-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]]
-// CHECK10-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK10: cond.true:
-// CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK10-NEXT: br label [[COND_END:%.*]]
-// CHECK10: cond.false:
-// CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: br label [[COND_END]]
-// CHECK10: cond.end:
-// CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ]
-// CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK10-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK10: omp.inner.for.cond:
-// CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], 1
-// CHECK10-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP17]], [[ADD]]
-// CHECK10-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK10: omp.inner.for.body:
-// CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK10-NEXT: store i32 [[TMP21]], i32* [[N_CASTED]], align 4
-// CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[L_ADDR]], align 4
-// CHECK10-NEXT: store i32 [[TMP23]], i32* [[L_CASTED]], align 4
-// CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[L_CASTED]], align 4
-// CHECK10-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK10-NEXT: [[TMP26:%.*]] = inttoptr i32 [[TMP19]] to i8*
-// CHECK10-NEXT: store i8* [[TMP26]], i8** [[TMP25]], align 4
-// CHECK10-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK10-NEXT: [[TMP28:%.*]] = inttoptr i32 [[TMP20]] to i8*
-// CHECK10-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 4
-// CHECK10-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK10-NEXT: [[TMP30:%.*]] = inttoptr i32 [[TMP22]] to i8*
-// CHECK10-NEXT: store i8* [[TMP30]], i8** [[TMP29]], align 4
-// CHECK10-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
-// CHECK10-NEXT: [[TMP32:%.*]] = bitcast [1000 x i32]* [[TMP0]] to i8*
-// CHECK10-NEXT: store i8* [[TMP32]], i8** [[TMP31]], align 4
-// CHECK10-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 4
-// CHECK10-NEXT: [[TMP34:%.*]] = inttoptr i32 [[TMP24]] to i8*
-// CHECK10-NEXT: store i8* [[TMP34]], i8** [[TMP33]], align 4
-// CHECK10-NEXT: [[TMP35:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK10-NEXT: [[TMP36:%.*]] = load i32, i32* [[TMP35]], align 4
-// CHECK10-NEXT: [[TMP37:%.*]] = bitcast [5 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK10-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP36]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i32]*, i32)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP37]], i32 5)
-// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK10: omp.inner.for.inc:
-// CHECK10-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK10-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP38]], [[TMP39]]
-// CHECK10-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK10-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK10-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP40]], [[TMP41]]
-// CHECK10-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK10-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK10-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP42]], [[TMP43]]
-// CHECK10-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK10-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP44]], [[TMP45]]
-// CHECK10-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
-// CHECK10: cond.true11:
-// CHECK10-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK10-NEXT: br label [[COND_END13:%.*]]
-// CHECK10: cond.false12:
-// CHECK10-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: br label [[COND_END13]]
-// CHECK10: cond.end13:
-// CHECK10-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP46]], [[COND_TRUE11]] ], [ [[TMP47]], [[COND_FALSE12]] ]
-// CHECK10-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK10-NEXT: store i32 [[TMP48]], i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
-// CHECK10: omp.inner.for.end:
-// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK10: omp.loop.exit:
-// CHECK10-NEXT: [[TMP49:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK10-NEXT: [[TMP50:%.*]] = load i32, i32* [[TMP49]], align 4
-// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP50]])
-// CHECK10-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK10-NEXT: [[TMP52:%.*]] = icmp ne i32 [[TMP51]], 0
-// CHECK10-NEXT: br i1 [[TMP52]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK10: .omp.final.then:
-// CHECK10-NEXT: [[TMP53:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK10-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP53]], 0
-// CHECK10-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1
-// CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV16]], 1
-// CHECK10-NEXT: [[ADD17:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK10-NEXT: store i32 [[ADD17]], i32* [[I4]], align 4
-// CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK10: .omp.final.done:
-// CHECK10-NEXT: [[TMP54:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK10-NEXT: [[TMP55:%.*]] = icmp ne i32 [[TMP54]], 0
-// CHECK10-NEXT: br i1 [[TMP55]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
-// CHECK10: .omp.lastprivate.then:
-// CHECK10-NEXT: [[TMP56:%.*]] = load i32, i32* [[L_ADDR]], align 4
-// CHECK10-NEXT: store i32 [[TMP56]], i32* [[L_ADDR]], align 4
-// CHECK10-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
-// CHECK10: .omp.lastprivate.done:
-// CHECK10-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK10: omp.precond.end:
-// CHECK10-NEXT: [[TMP57:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared", align 2
-// CHECK10-NEXT: call void @__kmpc_restore_team_static_memory(i16 1, i16 [[TMP57]])
-// CHECK10-NEXT: ret void
-// CHECK10-LABEL: define {{[^@]+}}@__omp_outlined__1
-// CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0]] {
-// CHECK10-NEXT: entry:
-// CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK10-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK10-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK10-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK10-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK10-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK10-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
-// CHECK10-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK10-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK10-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK10: omp.precond.then:
-// CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
-// CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
-// CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
-// CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK10-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 32)
-// CHECK10-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
-// CHECK10: omp.dispatch.cond:
-// CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK10-NEXT: [[CMP4:%.*]] = icmp ugt i32 [[TMP9]], [[TMP10]]
-// CHECK10-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK10: cond.true:
-// CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK10-NEXT: br label [[COND_END:%.*]]
-// CHECK10: cond.false:
-// CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK10-NEXT: br label [[COND_END]]
-// CHECK10: cond.end:
-// CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
-// CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
-// CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK10-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK10-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
-// CHECK10-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
-// CHECK10: omp.dispatch.body:
-// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK10: omp.inner.for.cond:
-// CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK10-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
-// CHECK10-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK10: omp.inner.for.body:
-// CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
-// CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK10-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
-// CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4
-// CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 [[TMP19]]
-// CHECK10-NEXT: store i32 1, i32* [[ARRAYIDX]], align 4
-// CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[I3]], align 4
-// CHECK10-NEXT: store i32 [[TMP20]], i32* [[L_ADDR]], align 4
-// CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK10: omp.body.continue:
-// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK10: omp.inner.for.inc:
-// CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP21]], 1
-// CHECK10-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
-// CHECK10: omp.inner.for.end:
-// CHECK10-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
-// CHECK10: omp.dispatch.inc:
-// CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK10-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
-// CHECK10-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4
-// CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK10-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK10-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
-// CHECK10-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4
-// CHECK10-NEXT: br label [[OMP_DISPATCH_COND]]
-// CHECK10: omp.dispatch.end:
-// CHECK10-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK10-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
-// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP27]])
-// CHECK10-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK10-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
-// CHECK10-NEXT: br i1 [[TMP29]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK10: .omp.final.then:
-// CHECK10-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK10-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP30]], 0
-// CHECK10-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1
-// CHECK10-NEXT: [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 1
-// CHECK10-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]]
-// CHECK10-NEXT: store i32 [[ADD13]], i32* [[I3]], align 4
-// CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK10: .omp.final.done:
-// CHECK10-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK10-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
-// CHECK10-NEXT: br i1 [[TMP32]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
-// CHECK10: .omp.lastprivate.then:
-// CHECK10-NEXT: [[TMP33:%.*]] = load i32, i32* [[L_ADDR]], align 4
-// CHECK10-NEXT: store i32 [[TMP33]], i32* [[L_ADDR]], align 4
-// CHECK10-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
-// CHECK10: .omp.lastprivate.done:
-// CHECK10-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK10: omp.precond.end:
-// CHECK10-NEXT: ret void
-// CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l44
-// CHECK10-SAME: (i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
-// CHECK10-NEXT: entry:
-// CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
-// CHECK10-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK10-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK10-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK10-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK10-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK10-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK10-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK10: .execute:
-// CHECK10-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK10-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
-// CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK10-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK10-NEXT: call void @__omp_outlined__2(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP3]], [1000 x i16]* [[TMP0]]) #[[ATTR3]]
-// CHECK10-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK10: .omp.deinit:
-// CHECK10-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK10-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK10: .exit:
-// CHECK10-NEXT: ret void
-// CHECK10-LABEL: define {{[^@]+}}@__omp_outlined__2
-// CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
-// CHECK10-NEXT: entry:
-// CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
-// CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 4
-// CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK10-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK10-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK10-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK10-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK10-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK10: omp.precond.then:
-// CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK10-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK10-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
-// CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK10-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
-// CHECK10-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK10: cond.true:
-// CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK10-NEXT: br label [[COND_END:%.*]]
-// CHECK10: cond.false:
-// CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: br label [[COND_END]]
-// CHECK10: cond.end:
-// CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
-// CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK10-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK10: omp.inner.for.cond:
-// CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1
-// CHECK10-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]
-// CHECK10-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK10: omp.inner.for.body:
-// CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK10-NEXT: store i32 [[TMP16]], i32* [[N_CASTED]], align 4
-// CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK10-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK10-NEXT: [[TMP19:%.*]] = inttoptr i32 [[TMP14]] to i8*
-// CHECK10-NEXT: store i8* [[TMP19]], i8** [[TMP18]], align 4
-// CHECK10-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK10-NEXT: [[TMP21:%.*]] = inttoptr i32 [[TMP15]] to i8*
-// CHECK10-NEXT: store i8* [[TMP21]], i8** [[TMP20]], align 4
-// CHECK10-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK10-NEXT: [[TMP23:%.*]] = inttoptr i32 [[TMP17]] to i8*
-// CHECK10-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 4
-// CHECK10-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
-// CHECK10-NEXT: [[TMP25:%.*]] = bitcast [1000 x i16]* [[TMP0]] to i8*
-// CHECK10-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 4
-// CHECK10-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK10-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
-// CHECK10-NEXT: [[TMP28:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK10-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP27]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i16]*)* @__omp_outlined__3 to i8*), i8* null, i8** [[TMP28]], i32 4)
-// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK10: omp.inner.for.inc:
-// CHECK10-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK10-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP29]], [[TMP30]]
-// CHECK10-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK10-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK10-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP31]], [[TMP32]]
-// CHECK10-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK10-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK10-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP33]], [[TMP34]]
-// CHECK10-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK10-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP35]], [[TMP36]]
-// CHECK10-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]]
-// CHECK10: cond.true10:
-// CHECK10-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK10-NEXT: br label [[COND_END12:%.*]]
-// CHECK10: cond.false11:
-// CHECK10-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: br label [[COND_END12]]
-// CHECK10: cond.end12:
-// CHECK10-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP37]], [[COND_TRUE10]] ], [ [[TMP38]], [[COND_FALSE11]] ]
-// CHECK10-NEXT: store i32 [[COND13]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK10-NEXT: store i32 [[TMP39]], i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
-// CHECK10: omp.inner.for.end:
-// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK10: omp.loop.exit:
-// CHECK10-NEXT: [[TMP40:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK10-NEXT: [[TMP41:%.*]] = load i32, i32* [[TMP40]], align 4
-// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP41]])
-// CHECK10-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK10-NEXT: [[TMP43:%.*]] = icmp ne i32 [[TMP42]], 0
-// CHECK10-NEXT: br i1 [[TMP43]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK10: .omp.final.then:
-// CHECK10-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK10-NEXT: [[SUB14:%.*]] = sub nsw i32 [[TMP44]], 0
-// CHECK10-NEXT: [[DIV15:%.*]] = sdiv i32 [[SUB14]], 1
-// CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV15]], 1
-// CHECK10-NEXT: [[ADD16:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK10-NEXT: store i32 [[ADD16]], i32* [[I3]], align 4
-// CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK10: .omp.final.done:
-// CHECK10-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK10: omp.precond.end:
-// CHECK10-NEXT: ret void
-// CHECK10-LABEL: define {{[^@]+}}@__omp_outlined__3
-// CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
-// CHECK10-NEXT: entry:
-// CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
-// CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK10-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK10-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK10-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK10-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK10-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK10-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK10-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK10: omp.precond.then:
-// CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
-// CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
-// CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
-// CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK10-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK10-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK10: omp.inner.for.cond:
-// CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK10-NEXT: [[CMP4:%.*]] = icmp ule i32 [[TMP10]], [[TMP11]]
-// CHECK10-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK10: omp.inner.for.body:
-// CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
-// CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK10-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
-// CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[I3]], align 4
-// CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i16], [1000 x i16]* [[TMP0]], i32 0, i32 [[TMP13]]
-// CHECK10-NEXT: [[TMP14:%.*]] = load i16, i16* [[ARRAYIDX]], align 2
-// CHECK10-NEXT: [[CONV:%.*]] = sext i16 [[TMP14]] to i32
-// CHECK10-NEXT: [[ADD5:%.*]] = add nsw i32 [[CONV]], 1
-// CHECK10-NEXT: [[CONV6:%.*]] = trunc i32 [[ADD5]] to i16
-// CHECK10-NEXT: store i16 [[CONV6]], i16* [[ARRAYIDX]], align 2
-// CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK10: omp.body.continue:
-// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK10: omp.inner.for.inc:
-// CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK10-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
-// CHECK10-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
-// CHECK10: omp.inner.for.end:
-// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK10: omp.loop.exit:
-// CHECK10-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
-// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]])
-// CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK10-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
-// CHECK10-NEXT: br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK10: .omp.final.then:
-// CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK10-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP21]], 0
-// CHECK10-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1
-// CHECK10-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1
-// CHECK10-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
-// CHECK10-NEXT: store i32 [[ADD11]], i32* [[I3]], align 4
-// CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK10: .omp.final.done:
-// CHECK10-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK10: omp.precond.end:
-// CHECK10-NEXT: ret void
-// CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l49
-// CHECK10-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
-// CHECK10-NEXT: entry:
-// CHECK10-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
-// CHECK10-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK10-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
-// CHECK10-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
-// CHECK10-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK10-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK10-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK10: .execute:
-// CHECK10-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK10-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK10-NEXT: call void @__omp_outlined__4(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x i32]* [[TMP0]]) #[[ATTR3]]
-// CHECK10-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK10: .omp.deinit:
-// CHECK10-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK10-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK10: .exit:
-// CHECK10-NEXT: ret void
-// CHECK10-LABEL: define {{[^@]+}}@__omp_outlined__4
-// CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
-// CHECK10-NEXT: entry:
-// CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK10-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
-// CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [3 x i8*], align 4
-// CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK10-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
-// CHECK10-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
-// CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK10-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK10-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
-// CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
-// CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK10: cond.true:
-// CHECK10-NEXT: br label [[COND_END:%.*]]
-// CHECK10: cond.false:
-// CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: br label [[COND_END]]
-// CHECK10: cond.end:
-// CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
-// CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK10: omp.inner.for.cond:
-// CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP6]], 10
-// CHECK10-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK10: omp.inner.for.body:
-// CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK10-NEXT: [[TMP10:%.*]] = inttoptr i32 [[TMP7]] to i8*
-// CHECK10-NEXT: store i8* [[TMP10]], i8** [[TMP9]], align 4
-// CHECK10-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK10-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP8]] to i8*
-// CHECK10-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 4
-// CHECK10-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK10-NEXT: [[TMP14:%.*]] = bitcast [10 x i32]* [[TMP0]] to i8*
-// CHECK10-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 4
-// CHECK10-NEXT: [[TMP15:%.*]] = bitcast [3 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK10-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @__omp_outlined__5 to i8*), i8* null, i8** [[TMP15]], i32 3)
-// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK10: omp.inner.for.inc:
-// CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
-// CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK10-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
-// CHECK10-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
-// CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP22]], 9
-// CHECK10-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
-// CHECK10: cond.true5:
-// CHECK10-NEXT: br label [[COND_END7:%.*]]
-// CHECK10: cond.false6:
-// CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: br label [[COND_END7]]
-// CHECK10: cond.end7:
-// CHECK10-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP23]], [[COND_FALSE6]] ]
-// CHECK10-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK10-NEXT: store i32 [[TMP24]], i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
-// CHECK10: omp.inner.for.end:
-// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK10: omp.loop.exit:
-// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
-// CHECK10-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK10-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
-// CHECK10-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK10: .omp.final.then:
-// CHECK10-NEXT: store i32 10, i32* [[I]], align 4
-// CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK10: .omp.final.done:
-// CHECK10-NEXT: ret void
-// CHECK10-LABEL: define {{[^@]+}}@__omp_outlined__5
-// CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
-// CHECK10-NEXT: entry:
-// CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
-// CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK10-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK10-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK10-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
-// CHECK10-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
-// CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK10-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
-// CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK10-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
-// CHECK10-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
-// CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK10-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
-// CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK10: omp.inner.for.cond:
-// CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK10-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP6]], [[TMP7]]
-// CHECK10-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK10: omp.inner.for.body:
-// CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
-// CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4
-// CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
-// CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]]
-// CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
-// CHECK10-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP10]], 1
-// CHECK10-NEXT: store i32 [[ADD1]], i32* [[ARRAYIDX]], align 4
-// CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK10: omp.body.continue:
-// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK10: omp.inner.for.inc:
-// CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK10-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
-// CHECK10-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
-// CHECK10: omp.inner.for.end:
-// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK10: omp.loop.exit:
-// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
-// CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK10-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
-// CHECK10-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK10: .omp.final.then:
-// CHECK10-NEXT: store i32 10, i32* [[I]], align 4
-// CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK10: .omp.final.done:
-// CHECK10-NEXT: ret void
-// CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l54
-// CHECK10-SAME: ([10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
-// CHECK10-NEXT: entry:
-// CHECK10-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK10-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[F_CASTED:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK10-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK10-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
-// CHECK10-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK10-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK10-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK10-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK10: .execute:
-// CHECK10-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[F_ADDR]], align 4
-// CHECK10-NEXT: store i32 [[TMP2]], i32* [[F_CASTED]], align 4
-// CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[F_CASTED]], align 4
-// CHECK10-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK10-NEXT: call void @__omp_outlined__6(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x [10 x i32]]* [[TMP0]], i32 [[TMP3]]) #[[ATTR3]]
-// CHECK10-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK10: .omp.deinit:
-// CHECK10-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK10-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK10: .exit:
-// CHECK10-NEXT: ret void
-// CHECK10-LABEL: define {{[^@]+}}@__omp_outlined__6
-// CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
-// CHECK10-NEXT: entry:
-// CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK10-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK10-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[K:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[J:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[F_CASTED:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 4
-// CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK10-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK10-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
-// CHECK10-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK10-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK10-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
-// CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
-// CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK10: cond.true:
-// CHECK10-NEXT: br label [[COND_END:%.*]]
-// CHECK10: cond.false:
-// CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: br label [[COND_END]]
-// CHECK10: cond.end:
-// CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
-// CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK10: omp.inner.for.cond:
-// CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP6]], 100
-// CHECK10-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK10: omp.inner.for.body:
-// CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[F_ADDR]], align 4
-// CHECK10-NEXT: store i32 [[TMP9]], i32* [[F_CASTED]], align 4
-// CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[F_CASTED]], align 4
-// CHECK10-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK10-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP7]] to i8*
-// CHECK10-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 4
-// CHECK10-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK10-NEXT: [[TMP14:%.*]] = inttoptr i32 [[TMP8]] to i8*
-// CHECK10-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 4
-// CHECK10-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK10-NEXT: [[TMP16:%.*]] = bitcast [10 x [10 x i32]]* [[TMP0]] to i8*
-// CHECK10-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 4
-// CHECK10-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
-// CHECK10-NEXT: [[TMP18:%.*]] = inttoptr i32 [[TMP10]] to i8*
-// CHECK10-NEXT: store i8* [[TMP18]], i8** [[TMP17]], align 4
-// CHECK10-NEXT: [[TMP19:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK10-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, [10 x [10 x i32]]*, i32)* @__omp_outlined__7 to i8*), i8* null, i8** [[TMP19]], i32 4)
-// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK10: omp.inner.for.inc:
-// CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
-// CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
-// CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK10-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
-// CHECK10-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP26]], 99
-// CHECK10-NEXT: br i1 [[CMP5]], label [[COND_TRUE6:%.*]], label [[COND_FALSE7:%.*]]
-// CHECK10: cond.true6:
-// CHECK10-NEXT: br label [[COND_END8:%.*]]
-// CHECK10: cond.false7:
-// CHECK10-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: br label [[COND_END8]]
-// CHECK10: cond.end8:
-// CHECK10-NEXT: [[COND9:%.*]] = phi i32 [ 99, [[COND_TRUE6]] ], [ [[TMP27]], [[COND_FALSE7]] ]
-// CHECK10-NEXT: store i32 [[COND9]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK10-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK10-NEXT: store i32 [[TMP28]], i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]
-// CHECK10: omp.inner.for.end:
-// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK10: omp.loop.exit:
-// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
-// CHECK10-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK10-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0
-// CHECK10-NEXT: br i1 [[TMP30]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK10: .omp.final.then:
-// CHECK10-NEXT: store i32 10, i32* [[I]], align 4
-// CHECK10-NEXT: store i32 10, i32* [[J]], align 4
-// CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK10: .omp.final.done:
-// CHECK10-NEXT: ret void
-// CHECK10-LABEL: define {{[^@]+}}@__omp_outlined__7
-// CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
-// CHECK10-NEXT: entry:
-// CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK10-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[K:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: [[J:%.*]] = alloca i32, align 4
-// CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK10-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK10-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK10-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK10-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
-// CHECK10-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK10-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
-// CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK10-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
-// CHECK10-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
-// CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK10-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
-// CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK10: omp.inner.for.cond:
-// CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK10-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP6]], [[TMP7]]
-// CHECK10-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK10: omp.inner.for.body:
-// CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP8]], 10
-// CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
-// CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4
-// CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: [[DIV2:%.*]] = sdiv i32 [[TMP10]], 10
-// CHECK10-NEXT: [[MUL3:%.*]] = mul nsw i32 [[DIV2]], 10
-// CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL3]]
-// CHECK10-NEXT: [[MUL4:%.*]] = mul nsw i32 [[SUB]], 1
-// CHECK10-NEXT: [[ADD5:%.*]] = add nsw i32 0, [[MUL4]]
-// CHECK10-NEXT: store i32 [[ADD5]], i32* [[J]], align 4
-// CHECK10-NEXT: store i32 10, i32* [[K]], align 4
-// CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
-// CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[J]], align 4
-// CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[F_ADDR]], align 4
-// CHECK10-NEXT: [[MUL6:%.*]] = mul nsw i32 [[TMP12]], [[TMP13]]
-// CHECK10-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP11]], [[MUL6]]
-// CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[K]], align 4
-// CHECK10-NEXT: [[ADD8:%.*]] = add nsw i32 [[ADD7]], [[TMP14]]
-// CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4
-// CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [10 x i32]], [10 x [10 x i32]]* [[TMP0]], i32 0, i32 [[TMP15]]
-// CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[J]], align 4
-// CHECK10-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP16]]
-// CHECK10-NEXT: store i32 [[ADD8]], i32* [[ARRAYIDX9]], align 4
-// CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK10: omp.body.continue:
-// CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK10: omp.inner.for.inc:
-// CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK10-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
-// CHECK10-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
-// CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]]
-// CHECK10: omp.inner.for.end:
-// CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK10: omp.loop.exit:
-// CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
-// CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK10-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
-// CHECK10-NEXT: br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK10: .omp.final.then:
-// CHECK10-NEXT: store i32 10, i32* [[I]], align 4
-// CHECK10-NEXT: store i32 10, i32* [[J]], align 4
-// CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK10: .omp.final.done:
-// CHECK10-NEXT: ret void
-// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l38
-// CHECK11-SAME: (i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0:[0-9]+]] {
-// CHECK11-NEXT: entry:
-// CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK11-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[L_CASTED:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK11-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK11-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
-// CHECK11-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK11-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK11-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK11-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK11: .execute:
-// CHECK11-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]])
-// CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK11-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
-// CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[L_ADDR]], align 4
-// CHECK11-NEXT: store i32 [[TMP4]], i32* [[L_CASTED]], align 4
-// CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[L_CASTED]], align 4
-// CHECK11-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK11-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP3]], [1000 x i32]* [[TMP0]], i32 [[TMP5]]) #[[ATTR3:[0-9]+]]
-// CHECK11-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK11: .omp.deinit:
-// CHECK11-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK11-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK11: .exit:
-// CHECK11-NEXT: ret void
-// CHECK11-LABEL: define {{[^@]+}}@__omp_outlined__
-// CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0]] {
-// CHECK11-NEXT: entry:
-// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK11-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[I4:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[L_CASTED:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [5 x i8*], align 4
-// CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK11-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK11-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
-// CHECK11-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK11-NEXT: [[TMP1:%.*]] = call i8* @__kmpc_data_sharing_push_stack(i32 4, i16 1)
-// CHECK11-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to %struct._globalized_locals_ty*
-// CHECK11-NEXT: [[L1:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY:%.*]], %struct._globalized_locals_ty* [[TMP2]], i32 0, i32 0
-// CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK11-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
-// CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK11-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK11-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK11-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
-// CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK11: omp.precond.then:
-// CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK11-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 128)
-// CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK11-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
-// CHECK11-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK11: cond.true:
-// CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK11-NEXT: br label [[COND_END:%.*]]
-// CHECK11: cond.false:
-// CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: br label [[COND_END]]
-// CHECK11: cond.end:
-// CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
-// CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK11-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK11: omp.inner.for.cond:
-// CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], 1
-// CHECK11-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP14]], [[ADD]]
-// CHECK11-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK11: omp.inner.for.body:
-// CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK11-NEXT: store i32 [[TMP18]], i32* [[N_CASTED]], align 4
-// CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[L_ADDR]], align 4
-// CHECK11-NEXT: store i32 [[TMP20]], i32* [[L_CASTED]], align 4
-// CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[L_CASTED]], align 4
-// CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK11-NEXT: [[TMP23:%.*]] = inttoptr i32 [[TMP16]] to i8*
-// CHECK11-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 4
-// CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK11-NEXT: [[TMP25:%.*]] = inttoptr i32 [[TMP17]] to i8*
-// CHECK11-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 4
-// CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK11-NEXT: [[TMP27:%.*]] = inttoptr i32 [[TMP19]] to i8*
-// CHECK11-NEXT: store i8* [[TMP27]], i8** [[TMP26]], align 4
-// CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
-// CHECK11-NEXT: [[TMP29:%.*]] = bitcast [1000 x i32]* [[TMP0]] to i8*
-// CHECK11-NEXT: store i8* [[TMP29]], i8** [[TMP28]], align 4
-// CHECK11-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 4
-// CHECK11-NEXT: [[TMP31:%.*]] = inttoptr i32 [[TMP21]] to i8*
-// CHECK11-NEXT: store i8* [[TMP31]], i8** [[TMP30]], align 4
-// CHECK11-NEXT: [[TMP32:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK11-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4
-// CHECK11-NEXT: [[TMP34:%.*]] = bitcast [5 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK11-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP33]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i32]*, i32)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP34]], i32 5)
-// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK11: omp.inner.for.inc:
-// CHECK11-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK11-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP35]], [[TMP36]]
-// CHECK11-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK11-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP37]], [[TMP38]]
-// CHECK11-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK11-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP39]], [[TMP40]]
-// CHECK11-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK11-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP41]], [[TMP42]]
-// CHECK11-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
-// CHECK11: cond.true11:
-// CHECK11-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK11-NEXT: br label [[COND_END13:%.*]]
-// CHECK11: cond.false12:
-// CHECK11-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: br label [[COND_END13]]
-// CHECK11: cond.end13:
-// CHECK11-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP43]], [[COND_TRUE11]] ], [ [[TMP44]], [[COND_FALSE12]] ]
-// CHECK11-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK11-NEXT: store i32 [[TMP45]], i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
-// CHECK11: omp.inner.for.end:
-// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK11: omp.loop.exit:
-// CHECK11-NEXT: [[TMP46:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK11-NEXT: [[TMP47:%.*]] = load i32, i32* [[TMP46]], align 4
-// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP47]])
-// CHECK11-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK11-NEXT: [[TMP49:%.*]] = icmp ne i32 [[TMP48]], 0
-// CHECK11-NEXT: br i1 [[TMP49]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK11: .omp.final.then:
-// CHECK11-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK11-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP50]], 0
-// CHECK11-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1
-// CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV16]], 1
-// CHECK11-NEXT: [[ADD17:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK11-NEXT: store i32 [[ADD17]], i32* [[I4]], align 4
-// CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK11: .omp.final.done:
-// CHECK11-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK11-NEXT: [[TMP52:%.*]] = icmp ne i32 [[TMP51]], 0
-// CHECK11-NEXT: br i1 [[TMP52]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
-// CHECK11: .omp.lastprivate.then:
-// CHECK11-NEXT: [[TMP53:%.*]] = load i32, i32* [[L_ADDR]], align 4
-// CHECK11-NEXT: store i32 [[TMP53]], i32* [[L_ADDR]], align 4
-// CHECK11-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
-// CHECK11: .omp.lastprivate.done:
-// CHECK11-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK11: omp.precond.end:
-// CHECK11-NEXT: call void @__kmpc_data_sharing_pop_stack(i8* [[TMP1]])
-// CHECK11-NEXT: ret void
-// CHECK11-LABEL: define {{[^@]+}}@__omp_outlined__1
-// CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0]] {
-// CHECK11-NEXT: entry:
-// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK11-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK11-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK11-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
-// CHECK11-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK11-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK11-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK11: omp.precond.then:
-// CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
-// CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
-// CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
-// CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK11-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 32)
-// CHECK11-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
-// CHECK11: omp.dispatch.cond:
-// CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK11-NEXT: [[CMP4:%.*]] = icmp ugt i32 [[TMP9]], [[TMP10]]
-// CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK11: cond.true:
-// CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK11-NEXT: br label [[COND_END:%.*]]
-// CHECK11: cond.false:
-// CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK11-NEXT: br label [[COND_END]]
-// CHECK11: cond.end:
-// CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
-// CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
-// CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK11-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
-// CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
-// CHECK11: omp.dispatch.body:
-// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK11: omp.inner.for.cond:
-// CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK11-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
-// CHECK11-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK11: omp.inner.for.body:
-// CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
-// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK11-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
-// CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4
-// CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 [[TMP19]]
-// CHECK11-NEXT: store i32 1, i32* [[ARRAYIDX]], align 4
-// CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[I3]], align 4
-// CHECK11-NEXT: store i32 [[TMP20]], i32* [[L_ADDR]], align 4
-// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK11: omp.body.continue:
-// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK11: omp.inner.for.inc:
-// CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP21]], 1
-// CHECK11-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
-// CHECK11: omp.inner.for.end:
-// CHECK11-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
-// CHECK11: omp.dispatch.inc:
-// CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
-// CHECK11-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4
-// CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
-// CHECK11-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4
-// CHECK11-NEXT: br label [[OMP_DISPATCH_COND]]
-// CHECK11: omp.dispatch.end:
-// CHECK11-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
-// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP27]])
-// CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK11-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
-// CHECK11-NEXT: br i1 [[TMP29]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK11: .omp.final.then:
-// CHECK11-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK11-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP30]], 0
-// CHECK11-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1
-// CHECK11-NEXT: [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 1
-// CHECK11-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]]
-// CHECK11-NEXT: store i32 [[ADD13]], i32* [[I3]], align 4
-// CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK11: .omp.final.done:
-// CHECK11-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK11-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
-// CHECK11-NEXT: br i1 [[TMP32]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
-// CHECK11: .omp.lastprivate.then:
-// CHECK11-NEXT: [[TMP33:%.*]] = load i32, i32* [[L_ADDR]], align 4
-// CHECK11-NEXT: store i32 [[TMP33]], i32* [[L_ADDR]], align 4
-// CHECK11-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
-// CHECK11: .omp.lastprivate.done:
-// CHECK11-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK11: omp.precond.end:
-// CHECK11-NEXT: ret void
-// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l44
-// CHECK11-SAME: (i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
-// CHECK11-NEXT: entry:
-// CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
-// CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK11-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK11-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK11-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK11-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK11-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK11: .execute:
-// CHECK11-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK11-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
-// CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK11-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK11-NEXT: call void @__omp_outlined__2(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP3]], [1000 x i16]* [[TMP0]]) #[[ATTR3]]
-// CHECK11-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK11: .omp.deinit:
-// CHECK11-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK11-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK11: .exit:
-// CHECK11-NEXT: ret void
-// CHECK11-LABEL: define {{[^@]+}}@__omp_outlined__2
-// CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
-// CHECK11-NEXT: entry:
-// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
-// CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 4
-// CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK11-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK11-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK11-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK11-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK11: omp.precond.then:
-// CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK11-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK11-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
-// CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
-// CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK11: cond.true:
-// CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK11-NEXT: br label [[COND_END:%.*]]
-// CHECK11: cond.false:
-// CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: br label [[COND_END]]
-// CHECK11: cond.end:
-// CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
-// CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK11-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK11: omp.inner.for.cond:
-// CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1
-// CHECK11-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]
-// CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK11: omp.inner.for.body:
-// CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK11-NEXT: store i32 [[TMP16]], i32* [[N_CASTED]], align 4
-// CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK11-NEXT: [[TMP19:%.*]] = inttoptr i32 [[TMP14]] to i8*
-// CHECK11-NEXT: store i8* [[TMP19]], i8** [[TMP18]], align 4
-// CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK11-NEXT: [[TMP21:%.*]] = inttoptr i32 [[TMP15]] to i8*
-// CHECK11-NEXT: store i8* [[TMP21]], i8** [[TMP20]], align 4
-// CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK11-NEXT: [[TMP23:%.*]] = inttoptr i32 [[TMP17]] to i8*
-// CHECK11-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 4
-// CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
-// CHECK11-NEXT: [[TMP25:%.*]] = bitcast [1000 x i16]* [[TMP0]] to i8*
-// CHECK11-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 4
-// CHECK11-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
-// CHECK11-NEXT: [[TMP28:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK11-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP27]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i16]*)* @__omp_outlined__3 to i8*), i8* null, i8** [[TMP28]], i32 4)
-// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK11: omp.inner.for.inc:
-// CHECK11-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP29]], [[TMP30]]
-// CHECK11-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK11-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK11-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP31]], [[TMP32]]
-// CHECK11-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK11-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP33]], [[TMP34]]
-// CHECK11-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK11-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP35]], [[TMP36]]
-// CHECK11-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]]
-// CHECK11: cond.true10:
-// CHECK11-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK11-NEXT: br label [[COND_END12:%.*]]
-// CHECK11: cond.false11:
-// CHECK11-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: br label [[COND_END12]]
-// CHECK11: cond.end12:
-// CHECK11-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP37]], [[COND_TRUE10]] ], [ [[TMP38]], [[COND_FALSE11]] ]
-// CHECK11-NEXT: store i32 [[COND13]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK11-NEXT: store i32 [[TMP39]], i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
-// CHECK11: omp.inner.for.end:
-// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK11: omp.loop.exit:
-// CHECK11-NEXT: [[TMP40:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK11-NEXT: [[TMP41:%.*]] = load i32, i32* [[TMP40]], align 4
-// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP41]])
-// CHECK11-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK11-NEXT: [[TMP43:%.*]] = icmp ne i32 [[TMP42]], 0
-// CHECK11-NEXT: br i1 [[TMP43]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK11: .omp.final.then:
-// CHECK11-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK11-NEXT: [[SUB14:%.*]] = sub nsw i32 [[TMP44]], 0
-// CHECK11-NEXT: [[DIV15:%.*]] = sdiv i32 [[SUB14]], 1
-// CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV15]], 1
-// CHECK11-NEXT: [[ADD16:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK11-NEXT: store i32 [[ADD16]], i32* [[I3]], align 4
-// CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK11: .omp.final.done:
-// CHECK11-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK11: omp.precond.end:
-// CHECK11-NEXT: ret void
-// CHECK11-LABEL: define {{[^@]+}}@__omp_outlined__3
-// CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
-// CHECK11-NEXT: entry:
-// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
-// CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK11-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK11-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK11-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK11-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK11: omp.precond.then:
-// CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
-// CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
-// CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
-// CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK11-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK11-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK11: omp.inner.for.cond:
-// CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK11-NEXT: [[CMP4:%.*]] = icmp ule i32 [[TMP10]], [[TMP11]]
-// CHECK11-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK11: omp.inner.for.body:
-// CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
-// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK11-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
-// CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[I3]], align 4
-// CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i16], [1000 x i16]* [[TMP0]], i32 0, i32 [[TMP13]]
-// CHECK11-NEXT: [[TMP14:%.*]] = load i16, i16* [[ARRAYIDX]], align 2
-// CHECK11-NEXT: [[CONV:%.*]] = sext i16 [[TMP14]] to i32
-// CHECK11-NEXT: [[ADD5:%.*]] = add nsw i32 [[CONV]], 1
-// CHECK11-NEXT: [[CONV6:%.*]] = trunc i32 [[ADD5]] to i16
-// CHECK11-NEXT: store i16 [[CONV6]], i16* [[ARRAYIDX]], align 2
-// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK11: omp.body.continue:
-// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK11: omp.inner.for.inc:
-// CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK11-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
-// CHECK11-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
-// CHECK11: omp.inner.for.end:
-// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK11: omp.loop.exit:
-// CHECK11-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
-// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]])
-// CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK11-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
-// CHECK11-NEXT: br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK11: .omp.final.then:
-// CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK11-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP21]], 0
-// CHECK11-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1
-// CHECK11-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1
-// CHECK11-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
-// CHECK11-NEXT: store i32 [[ADD11]], i32* [[I3]], align 4
-// CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK11: .omp.final.done:
-// CHECK11-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK11: omp.precond.end:
-// CHECK11-NEXT: ret void
-// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l49
-// CHECK11-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
-// CHECK11-NEXT: entry:
-// CHECK11-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
-// CHECK11-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK11-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
-// CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
-// CHECK11-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK11-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK11-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK11: .execute:
-// CHECK11-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK11-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK11-NEXT: call void @__omp_outlined__4(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x i32]* [[TMP0]]) #[[ATTR3]]
-// CHECK11-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK11: .omp.deinit:
-// CHECK11-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK11-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK11: .exit:
-// CHECK11-NEXT: ret void
-// CHECK11-LABEL: define {{[^@]+}}@__omp_outlined__4
-// CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
-// CHECK11-NEXT: entry:
-// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK11-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
-// CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [3 x i8*], align 4
-// CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK11-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
-// CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
-// CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK11-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK11-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
-// CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
-// CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK11: cond.true:
-// CHECK11-NEXT: br label [[COND_END:%.*]]
-// CHECK11: cond.false:
-// CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: br label [[COND_END]]
-// CHECK11: cond.end:
-// CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
-// CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK11: omp.inner.for.cond:
-// CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP6]], 10
-// CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK11: omp.inner.for.body:
-// CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK11-NEXT: [[TMP10:%.*]] = inttoptr i32 [[TMP7]] to i8*
-// CHECK11-NEXT: store i8* [[TMP10]], i8** [[TMP9]], align 4
-// CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK11-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP8]] to i8*
-// CHECK11-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 4
-// CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK11-NEXT: [[TMP14:%.*]] = bitcast [10 x i32]* [[TMP0]] to i8*
-// CHECK11-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 4
-// CHECK11-NEXT: [[TMP15:%.*]] = bitcast [3 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK11-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @__omp_outlined__5 to i8*), i8* null, i8** [[TMP15]], i32 3)
-// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK11: omp.inner.for.inc:
-// CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
-// CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK11-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
-// CHECK11-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
-// CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP22]], 9
-// CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
-// CHECK11: cond.true5:
-// CHECK11-NEXT: br label [[COND_END7:%.*]]
-// CHECK11: cond.false6:
-// CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: br label [[COND_END7]]
-// CHECK11: cond.end7:
-// CHECK11-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP23]], [[COND_FALSE6]] ]
-// CHECK11-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK11-NEXT: store i32 [[TMP24]], i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
-// CHECK11: omp.inner.for.end:
-// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK11: omp.loop.exit:
-// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
-// CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK11-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
-// CHECK11-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK11: .omp.final.then:
-// CHECK11-NEXT: store i32 10, i32* [[I]], align 4
-// CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK11: .omp.final.done:
-// CHECK11-NEXT: ret void
-// CHECK11-LABEL: define {{[^@]+}}@__omp_outlined__5
-// CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
-// CHECK11-NEXT: entry:
-// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
-// CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK11-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
-// CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
-// CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK11-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
-// CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK11-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
-// CHECK11-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
-// CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK11-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
-// CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK11: omp.inner.for.cond:
-// CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK11-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP6]], [[TMP7]]
-// CHECK11-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK11: omp.inner.for.body:
-// CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
-// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4
-// CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
-// CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]]
-// CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
-// CHECK11-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP10]], 1
-// CHECK11-NEXT: store i32 [[ADD1]], i32* [[ARRAYIDX]], align 4
-// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK11: omp.body.continue:
-// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK11: omp.inner.for.inc:
-// CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK11-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
-// CHECK11-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
-// CHECK11: omp.inner.for.end:
-// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK11: omp.loop.exit:
-// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
-// CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK11-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
-// CHECK11-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK11: .omp.final.then:
-// CHECK11-NEXT: store i32 10, i32* [[I]], align 4
-// CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK11: .omp.final.done:
-// CHECK11-NEXT: ret void
-// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l54
-// CHECK11-SAME: ([10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
-// CHECK11-NEXT: entry:
-// CHECK11-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK11-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[F_CASTED:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK11-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK11-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
-// CHECK11-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK11-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK11-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK11-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK11: .execute:
-// CHECK11-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[F_ADDR]], align 4
-// CHECK11-NEXT: store i32 [[TMP2]], i32* [[F_CASTED]], align 4
-// CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[F_CASTED]], align 4
-// CHECK11-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK11-NEXT: call void @__omp_outlined__6(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x [10 x i32]]* [[TMP0]], i32 [[TMP3]]) #[[ATTR3]]
-// CHECK11-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK11: .omp.deinit:
-// CHECK11-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK11-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK11: .exit:
-// CHECK11-NEXT: ret void
-// CHECK11-LABEL: define {{[^@]+}}@__omp_outlined__6
-// CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
-// CHECK11-NEXT: entry:
-// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK11-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK11-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[K:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[J:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[F_CASTED:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 4
-// CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK11-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK11-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
-// CHECK11-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK11-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK11-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
-// CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
-// CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK11: cond.true:
-// CHECK11-NEXT: br label [[COND_END:%.*]]
-// CHECK11: cond.false:
-// CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: br label [[COND_END]]
-// CHECK11: cond.end:
-// CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
-// CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK11: omp.inner.for.cond:
-// CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP6]], 100
-// CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK11: omp.inner.for.body:
-// CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[F_ADDR]], align 4
-// CHECK11-NEXT: store i32 [[TMP9]], i32* [[F_CASTED]], align 4
-// CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[F_CASTED]], align 4
-// CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK11-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP7]] to i8*
-// CHECK11-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 4
-// CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK11-NEXT: [[TMP14:%.*]] = inttoptr i32 [[TMP8]] to i8*
-// CHECK11-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 4
-// CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK11-NEXT: [[TMP16:%.*]] = bitcast [10 x [10 x i32]]* [[TMP0]] to i8*
-// CHECK11-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 4
-// CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
-// CHECK11-NEXT: [[TMP18:%.*]] = inttoptr i32 [[TMP10]] to i8*
-// CHECK11-NEXT: store i8* [[TMP18]], i8** [[TMP17]], align 4
-// CHECK11-NEXT: [[TMP19:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK11-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, [10 x [10 x i32]]*, i32)* @__omp_outlined__7 to i8*), i8* null, i8** [[TMP19]], i32 4)
-// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK11: omp.inner.for.inc:
-// CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
-// CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
-// CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK11-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
-// CHECK11-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP26]], 99
-// CHECK11-NEXT: br i1 [[CMP5]], label [[COND_TRUE6:%.*]], label [[COND_FALSE7:%.*]]
-// CHECK11: cond.true6:
-// CHECK11-NEXT: br label [[COND_END8:%.*]]
-// CHECK11: cond.false7:
-// CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: br label [[COND_END8]]
-// CHECK11: cond.end8:
-// CHECK11-NEXT: [[COND9:%.*]] = phi i32 [ 99, [[COND_TRUE6]] ], [ [[TMP27]], [[COND_FALSE7]] ]
-// CHECK11-NEXT: store i32 [[COND9]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK11-NEXT: store i32 [[TMP28]], i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]
-// CHECK11: omp.inner.for.end:
-// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK11: omp.loop.exit:
-// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
-// CHECK11-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK11-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0
-// CHECK11-NEXT: br i1 [[TMP30]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK11: .omp.final.then:
-// CHECK11-NEXT: store i32 10, i32* [[I]], align 4
-// CHECK11-NEXT: store i32 10, i32* [[J]], align 4
-// CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK11: .omp.final.done:
-// CHECK11-NEXT: ret void
-// CHECK11-LABEL: define {{[^@]+}}@__omp_outlined__7
-// CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
-// CHECK11-NEXT: entry:
-// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK11-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[K:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: [[J:%.*]] = alloca i32, align 4
-// CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK11-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK11-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
-// CHECK11-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK11-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
-// CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK11-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
-// CHECK11-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
-// CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK11-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
-// CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK11: omp.inner.for.cond:
-// CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK11-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP6]], [[TMP7]]
-// CHECK11-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK11: omp.inner.for.body:
-// CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP8]], 10
-// CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
-// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4
-// CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[DIV2:%.*]] = sdiv i32 [[TMP10]], 10
-// CHECK11-NEXT: [[MUL3:%.*]] = mul nsw i32 [[DIV2]], 10
-// CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL3]]
-// CHECK11-NEXT: [[MUL4:%.*]] = mul nsw i32 [[SUB]], 1
-// CHECK11-NEXT: [[ADD5:%.*]] = add nsw i32 0, [[MUL4]]
-// CHECK11-NEXT: store i32 [[ADD5]], i32* [[J]], align 4
-// CHECK11-NEXT: store i32 10, i32* [[K]], align 4
-// CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
-// CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[J]], align 4
-// CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[F_ADDR]], align 4
-// CHECK11-NEXT: [[MUL6:%.*]] = mul nsw i32 [[TMP12]], [[TMP13]]
-// CHECK11-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP11]], [[MUL6]]
-// CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[K]], align 4
-// CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[ADD7]], [[TMP14]]
-// CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4
-// CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [10 x i32]], [10 x [10 x i32]]* [[TMP0]], i32 0, i32 [[TMP15]]
-// CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[J]], align 4
-// CHECK11-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP16]]
-// CHECK11-NEXT: store i32 [[ADD8]], i32* [[ARRAYIDX9]], align 4
-// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK11: omp.body.continue:
-// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK11: omp.inner.for.inc:
-// CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK11-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
-// CHECK11-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
-// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]]
-// CHECK11: omp.inner.for.end:
-// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK11: omp.loop.exit:
-// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
-// CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK11-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
-// CHECK11-NEXT: br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK11: .omp.final.then:
-// CHECK11-NEXT: store i32 10, i32* [[I]], align 4
-// CHECK11-NEXT: store i32 10, i32* [[J]], align 4
-// CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK11: .omp.final.done:
-// CHECK11-NEXT: ret void
-// CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l38
-// CHECK12-SAME: (i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0:[0-9]+]] {
-// CHECK12-NEXT: entry:
-// CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK12-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[L_CASTED:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK12-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK12-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
-// CHECK12-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK12-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK12-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK12-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK12: .execute:
-// CHECK12-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]])
-// CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK12-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
-// CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[L_ADDR]], align 4
-// CHECK12-NEXT: store i32 [[TMP4]], i32* [[L_CASTED]], align 4
-// CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[L_CASTED]], align 4
-// CHECK12-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK12-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP3]], [1000 x i32]* [[TMP0]], i32 [[TMP5]]) #[[ATTR3:[0-9]+]]
-// CHECK12-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK12: .omp.deinit:
-// CHECK12-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK12-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK12: .exit:
-// CHECK12-NEXT: ret void
-// CHECK12-LABEL: define {{[^@]+}}@__omp_outlined__
-// CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0]] {
-// CHECK12-NEXT: entry:
-// CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK12-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[I4:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[L_CASTED:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [5 x i8*], align 4
-// CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK12-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK12-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
-// CHECK12-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK12-NEXT: [[TMP1:%.*]] = call i8* @__kmpc_data_sharing_push_stack(i32 4, i16 1)
-// CHECK12-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to %struct._globalized_locals_ty*
-// CHECK12-NEXT: [[L1:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY:%.*]], %struct._globalized_locals_ty* [[TMP2]], i32 0, i32 0
-// CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK12-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
-// CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK12-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK12-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK12-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
-// CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK12: omp.precond.then:
-// CHECK12-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK12-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK12-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 128)
-// CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK12-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
-// CHECK12-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK12: cond.true:
-// CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK12-NEXT: br label [[COND_END:%.*]]
-// CHECK12: cond.false:
-// CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: br label [[COND_END]]
-// CHECK12: cond.end:
-// CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
-// CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK12-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK12: omp.inner.for.cond:
-// CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], 1
-// CHECK12-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP14]], [[ADD]]
-// CHECK12-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK12: omp.inner.for.body:
-// CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK12-NEXT: store i32 [[TMP18]], i32* [[N_CASTED]], align 4
-// CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[L_ADDR]], align 4
-// CHECK12-NEXT: store i32 [[TMP20]], i32* [[L_CASTED]], align 4
-// CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[L_CASTED]], align 4
-// CHECK12-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK12-NEXT: [[TMP23:%.*]] = inttoptr i32 [[TMP16]] to i8*
-// CHECK12-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 4
-// CHECK12-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK12-NEXT: [[TMP25:%.*]] = inttoptr i32 [[TMP17]] to i8*
-// CHECK12-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 4
-// CHECK12-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK12-NEXT: [[TMP27:%.*]] = inttoptr i32 [[TMP19]] to i8*
-// CHECK12-NEXT: store i8* [[TMP27]], i8** [[TMP26]], align 4
-// CHECK12-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
-// CHECK12-NEXT: [[TMP29:%.*]] = bitcast [1000 x i32]* [[TMP0]] to i8*
-// CHECK12-NEXT: store i8* [[TMP29]], i8** [[TMP28]], align 4
-// CHECK12-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 4
-// CHECK12-NEXT: [[TMP31:%.*]] = inttoptr i32 [[TMP21]] to i8*
-// CHECK12-NEXT: store i8* [[TMP31]], i8** [[TMP30]], align 4
-// CHECK12-NEXT: [[TMP32:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK12-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4
-// CHECK12-NEXT: [[TMP34:%.*]] = bitcast [5 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK12-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP33]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i32]*, i32)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP34]], i32 5)
-// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK12: omp.inner.for.inc:
-// CHECK12-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK12-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP35]], [[TMP36]]
-// CHECK12-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK12-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK12-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP37]], [[TMP38]]
-// CHECK12-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK12-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK12-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP39]], [[TMP40]]
-// CHECK12-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK12-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP41]], [[TMP42]]
-// CHECK12-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
-// CHECK12: cond.true11:
-// CHECK12-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
-// CHECK12-NEXT: br label [[COND_END13:%.*]]
-// CHECK12: cond.false12:
-// CHECK12-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: br label [[COND_END13]]
-// CHECK12: cond.end13:
-// CHECK12-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP43]], [[COND_TRUE11]] ], [ [[TMP44]], [[COND_FALSE12]] ]
-// CHECK12-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK12-NEXT: store i32 [[TMP45]], i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
-// CHECK12: omp.inner.for.end:
-// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK12: omp.loop.exit:
-// CHECK12-NEXT: [[TMP46:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK12-NEXT: [[TMP47:%.*]] = load i32, i32* [[TMP46]], align 4
-// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP47]])
-// CHECK12-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK12-NEXT: [[TMP49:%.*]] = icmp ne i32 [[TMP48]], 0
-// CHECK12-NEXT: br i1 [[TMP49]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK12: .omp.final.then:
-// CHECK12-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK12-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP50]], 0
-// CHECK12-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1
-// CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV16]], 1
-// CHECK12-NEXT: [[ADD17:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK12-NEXT: store i32 [[ADD17]], i32* [[I4]], align 4
-// CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK12: .omp.final.done:
-// CHECK12-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK12-NEXT: [[TMP52:%.*]] = icmp ne i32 [[TMP51]], 0
-// CHECK12-NEXT: br i1 [[TMP52]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
-// CHECK12: .omp.lastprivate.then:
-// CHECK12-NEXT: [[TMP53:%.*]] = load i32, i32* [[L_ADDR]], align 4
-// CHECK12-NEXT: store i32 [[TMP53]], i32* [[L_ADDR]], align 4
-// CHECK12-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
-// CHECK12: .omp.lastprivate.done:
-// CHECK12-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK12: omp.precond.end:
-// CHECK12-NEXT: call void @__kmpc_data_sharing_pop_stack(i8* [[TMP1]])
-// CHECK12-NEXT: ret void
-// CHECK12-LABEL: define {{[^@]+}}@__omp_outlined__1
-// CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0]] {
-// CHECK12-NEXT: entry:
-// CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
-// CHECK12-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK12-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK12-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK12-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
-// CHECK12-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
-// CHECK12-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
-// CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK12-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK12-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK12: omp.precond.then:
-// CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
-// CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
-// CHECK12-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
-// CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK12-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 32)
-// CHECK12-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
-// CHECK12: omp.dispatch.cond:
-// CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK12-NEXT: [[CMP4:%.*]] = icmp ugt i32 [[TMP9]], [[TMP10]]
-// CHECK12-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK12: cond.true:
-// CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK12-NEXT: br label [[COND_END:%.*]]
-// CHECK12: cond.false:
-// CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK12-NEXT: br label [[COND_END]]
-// CHECK12: cond.end:
-// CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
-// CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
-// CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK12-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK12-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
-// CHECK12-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
-// CHECK12: omp.dispatch.body:
-// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK12: omp.inner.for.cond:
-// CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK12-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
-// CHECK12-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK12: omp.inner.for.body:
-// CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
-// CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK12-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
-// CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4
-// CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 [[TMP19]]
-// CHECK12-NEXT: store i32 1, i32* [[ARRAYIDX]], align 4
-// CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[I3]], align 4
-// CHECK12-NEXT: store i32 [[TMP20]], i32* [[L_ADDR]], align 4
-// CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK12: omp.body.continue:
-// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK12: omp.inner.for.inc:
-// CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP21]], 1
-// CHECK12-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
-// CHECK12: omp.inner.for.end:
-// CHECK12-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
-// CHECK12: omp.dispatch.inc:
-// CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK12-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK12-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
-// CHECK12-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4
-// CHECK12-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
-// CHECK12-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK12-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
-// CHECK12-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4
-// CHECK12-NEXT: br label [[OMP_DISPATCH_COND]]
-// CHECK12: omp.dispatch.end:
-// CHECK12-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK12-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
-// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP27]])
-// CHECK12-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK12-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
-// CHECK12-NEXT: br i1 [[TMP29]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK12: .omp.final.then:
-// CHECK12-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK12-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP30]], 0
-// CHECK12-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1
-// CHECK12-NEXT: [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 1
-// CHECK12-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]]
-// CHECK12-NEXT: store i32 [[ADD13]], i32* [[I3]], align 4
-// CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK12: .omp.final.done:
-// CHECK12-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK12-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
-// CHECK12-NEXT: br i1 [[TMP32]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
-// CHECK12: .omp.lastprivate.then:
-// CHECK12-NEXT: [[TMP33:%.*]] = load i32, i32* [[L_ADDR]], align 4
-// CHECK12-NEXT: store i32 [[TMP33]], i32* [[L_ADDR]], align 4
-// CHECK12-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
-// CHECK12: .omp.lastprivate.done:
-// CHECK12-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK12: omp.precond.end:
-// CHECK12-NEXT: ret void
-// CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l44
-// CHECK12-SAME: (i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
-// CHECK12-NEXT: entry:
-// CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
-// CHECK12-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK12-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK12-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK12-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK12-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK12-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK12: .execute:
-// CHECK12-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK12-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
-// CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK12-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK12-NEXT: call void @__omp_outlined__2(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP3]], [1000 x i16]* [[TMP0]]) #[[ATTR3]]
-// CHECK12-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK12: .omp.deinit:
-// CHECK12-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK12-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK12: .exit:
-// CHECK12-NEXT: ret void
-// CHECK12-LABEL: define {{[^@]+}}@__omp_outlined__2
-// CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
-// CHECK12-NEXT: entry:
-// CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
-// CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 4
-// CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK12-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK12-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK12-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK12-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK12: omp.precond.then:
-// CHECK12-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK12-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK12-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
-// CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK12-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
-// CHECK12-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK12: cond.true:
-// CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK12-NEXT: br label [[COND_END:%.*]]
-// CHECK12: cond.false:
-// CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: br label [[COND_END]]
-// CHECK12: cond.end:
-// CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
-// CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK12-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK12: omp.inner.for.cond:
-// CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1
-// CHECK12-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]
-// CHECK12-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK12: omp.inner.for.body:
-// CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK12-NEXT: store i32 [[TMP16]], i32* [[N_CASTED]], align 4
-// CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_CASTED]], align 4
-// CHECK12-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK12-NEXT: [[TMP19:%.*]] = inttoptr i32 [[TMP14]] to i8*
-// CHECK12-NEXT: store i8* [[TMP19]], i8** [[TMP18]], align 4
-// CHECK12-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK12-NEXT: [[TMP21:%.*]] = inttoptr i32 [[TMP15]] to i8*
-// CHECK12-NEXT: store i8* [[TMP21]], i8** [[TMP20]], align 4
-// CHECK12-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK12-NEXT: [[TMP23:%.*]] = inttoptr i32 [[TMP17]] to i8*
-// CHECK12-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 4
-// CHECK12-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
-// CHECK12-NEXT: [[TMP25:%.*]] = bitcast [1000 x i16]* [[TMP0]] to i8*
-// CHECK12-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 4
-// CHECK12-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK12-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
-// CHECK12-NEXT: [[TMP28:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK12-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP27]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i16]*)* @__omp_outlined__3 to i8*), i8* null, i8** [[TMP28]], i32 4)
-// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK12: omp.inner.for.inc:
-// CHECK12-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK12-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP29]], [[TMP30]]
-// CHECK12-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK12-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK12-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP31]], [[TMP32]]
-// CHECK12-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK12-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK12-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP33]], [[TMP34]]
-// CHECK12-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK12-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP35]], [[TMP36]]
-// CHECK12-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]]
-// CHECK12: cond.true10:
-// CHECK12-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK12-NEXT: br label [[COND_END12:%.*]]
-// CHECK12: cond.false11:
-// CHECK12-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: br label [[COND_END12]]
-// CHECK12: cond.end12:
-// CHECK12-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP37]], [[COND_TRUE10]] ], [ [[TMP38]], [[COND_FALSE11]] ]
-// CHECK12-NEXT: store i32 [[COND13]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK12-NEXT: store i32 [[TMP39]], i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
-// CHECK12: omp.inner.for.end:
-// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK12: omp.loop.exit:
-// CHECK12-NEXT: [[TMP40:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK12-NEXT: [[TMP41:%.*]] = load i32, i32* [[TMP40]], align 4
-// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP41]])
-// CHECK12-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK12-NEXT: [[TMP43:%.*]] = icmp ne i32 [[TMP42]], 0
-// CHECK12-NEXT: br i1 [[TMP43]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK12: .omp.final.then:
-// CHECK12-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK12-NEXT: [[SUB14:%.*]] = sub nsw i32 [[TMP44]], 0
-// CHECK12-NEXT: [[DIV15:%.*]] = sdiv i32 [[SUB14]], 1
-// CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV15]], 1
-// CHECK12-NEXT: [[ADD16:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK12-NEXT: store i32 [[ADD16]], i32* [[I3]], align 4
-// CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK12: .omp.final.done:
-// CHECK12-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK12: omp.precond.end:
-// CHECK12-NEXT: ret void
-// CHECK12-LABEL: define {{[^@]+}}@__omp_outlined__3
-// CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
-// CHECK12-NEXT: entry:
-// CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
-// CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[I3:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK12-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK12-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
-// CHECK12-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK12-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
-// CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
-// CHECK12-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
-// CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
-// CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
-// CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK12-NEXT: store i32 0, i32* [[I]], align 4
-// CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
-// CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
-// CHECK12: omp.precond.then:
-// CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
-// CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
-// CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
-// CHECK12-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
-// CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK12-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK12-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK12: omp.inner.for.cond:
-// CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK12-NEXT: [[CMP4:%.*]] = icmp ule i32 [[TMP10]], [[TMP11]]
-// CHECK12-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK12: omp.inner.for.body:
-// CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
-// CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK12-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
-// CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[I3]], align 4
-// CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i16], [1000 x i16]* [[TMP0]], i32 0, i32 [[TMP13]]
-// CHECK12-NEXT: [[TMP14:%.*]] = load i16, i16* [[ARRAYIDX]], align 2
-// CHECK12-NEXT: [[CONV:%.*]] = sext i16 [[TMP14]] to i32
-// CHECK12-NEXT: [[ADD5:%.*]] = add nsw i32 [[CONV]], 1
-// CHECK12-NEXT: [[CONV6:%.*]] = trunc i32 [[ADD5]] to i16
-// CHECK12-NEXT: store i16 [[CONV6]], i16* [[ARRAYIDX]], align 2
-// CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK12: omp.body.continue:
-// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK12: omp.inner.for.inc:
-// CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK12-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
-// CHECK12-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
-// CHECK12: omp.inner.for.end:
-// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK12: omp.loop.exit:
-// CHECK12-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
-// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]])
-// CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK12-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
-// CHECK12-NEXT: br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK12: .omp.final.then:
-// CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
-// CHECK12-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP21]], 0
-// CHECK12-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1
-// CHECK12-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1
-// CHECK12-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
-// CHECK12-NEXT: store i32 [[ADD11]], i32* [[I3]], align 4
-// CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK12: .omp.final.done:
-// CHECK12-NEXT: br label [[OMP_PRECOND_END]]
-// CHECK12: omp.precond.end:
-// CHECK12-NEXT: ret void
-// CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l49
-// CHECK12-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
-// CHECK12-NEXT: entry:
-// CHECK12-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
-// CHECK12-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK12-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
-// CHECK12-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
-// CHECK12-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK12-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK12-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK12: .execute:
-// CHECK12-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK12-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK12-NEXT: call void @__omp_outlined__4(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x i32]* [[TMP0]]) #[[ATTR3]]
-// CHECK12-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK12: .omp.deinit:
-// CHECK12-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK12-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK12: .exit:
-// CHECK12-NEXT: ret void
-// CHECK12-LABEL: define {{[^@]+}}@__omp_outlined__4
-// CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
-// CHECK12-NEXT: entry:
-// CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK12-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
-// CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [3 x i8*], align 4
-// CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK12-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
-// CHECK12-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
-// CHECK12-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK12-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK12-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
-// CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
-// CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK12: cond.true:
-// CHECK12-NEXT: br label [[COND_END:%.*]]
-// CHECK12: cond.false:
-// CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: br label [[COND_END]]
-// CHECK12: cond.end:
-// CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
-// CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK12: omp.inner.for.cond:
-// CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP6]], 10
-// CHECK12-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK12: omp.inner.for.body:
-// CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK12-NEXT: [[TMP10:%.*]] = inttoptr i32 [[TMP7]] to i8*
-// CHECK12-NEXT: store i8* [[TMP10]], i8** [[TMP9]], align 4
-// CHECK12-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK12-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP8]] to i8*
-// CHECK12-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 4
-// CHECK12-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK12-NEXT: [[TMP14:%.*]] = bitcast [10 x i32]* [[TMP0]] to i8*
-// CHECK12-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 4
-// CHECK12-NEXT: [[TMP15:%.*]] = bitcast [3 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK12-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @__omp_outlined__5 to i8*), i8* null, i8** [[TMP15]], i32 3)
-// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK12: omp.inner.for.inc:
-// CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
-// CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK12-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
-// CHECK12-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK12-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
-// CHECK12-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP22]], 9
-// CHECK12-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
-// CHECK12: cond.true5:
-// CHECK12-NEXT: br label [[COND_END7:%.*]]
-// CHECK12: cond.false6:
-// CHECK12-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: br label [[COND_END7]]
-// CHECK12: cond.end7:
-// CHECK12-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP23]], [[COND_FALSE6]] ]
-// CHECK12-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK12-NEXT: store i32 [[TMP24]], i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
-// CHECK12: omp.inner.for.end:
-// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK12: omp.loop.exit:
-// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
-// CHECK12-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK12-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
-// CHECK12-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK12: .omp.final.then:
-// CHECK12-NEXT: store i32 10, i32* [[I]], align 4
-// CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK12: .omp.final.done:
-// CHECK12-NEXT: ret void
-// CHECK12-LABEL: define {{[^@]+}}@__omp_outlined__5
-// CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
-// CHECK12-NEXT: entry:
-// CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
-// CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK12-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK12-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK12-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
-// CHECK12-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
-// CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK12-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
-// CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK12-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
-// CHECK12-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
-// CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK12-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
-// CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK12: omp.inner.for.cond:
-// CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK12-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP6]], [[TMP7]]
-// CHECK12-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK12: omp.inner.for.body:
-// CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
-// CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4
-// CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
-// CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]]
-// CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
-// CHECK12-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP10]], 1
-// CHECK12-NEXT: store i32 [[ADD1]], i32* [[ARRAYIDX]], align 4
-// CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK12: omp.body.continue:
-// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK12: omp.inner.for.inc:
-// CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK12-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
-// CHECK12-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
-// CHECK12: omp.inner.for.end:
-// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK12: omp.loop.exit:
-// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
-// CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK12-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
-// CHECK12-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK12: .omp.final.then:
-// CHECK12-NEXT: store i32 10, i32* [[I]], align 4
-// CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK12: .omp.final.done:
-// CHECK12-NEXT: ret void
-// CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l54
-// CHECK12-SAME: ([10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
-// CHECK12-NEXT: entry:
-// CHECK12-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK12-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[F_CASTED:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
-// CHECK12-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK12-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
-// CHECK12-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK12-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK12-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
-// CHECK12-NEXT: br label [[DOTEXECUTE:%.*]]
-// CHECK12: .execute:
-// CHECK12-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
-// CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[F_ADDR]], align 4
-// CHECK12-NEXT: store i32 [[TMP2]], i32* [[F_CASTED]], align 4
-// CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[F_CASTED]], align 4
-// CHECK12-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK12-NEXT: call void @__omp_outlined__6(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x [10 x i32]]* [[TMP0]], i32 [[TMP3]]) #[[ATTR3]]
-// CHECK12-NEXT: br label [[DOTOMP_DEINIT:%.*]]
-// CHECK12: .omp.deinit:
-// CHECK12-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
-// CHECK12-NEXT: br label [[DOTEXIT:%.*]]
-// CHECK12: .exit:
-// CHECK12-NEXT: ret void
-// CHECK12-LABEL: define {{[^@]+}}@__omp_outlined__6
-// CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
-// CHECK12-NEXT: entry:
-// CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK12-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK12-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[K:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[J:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[F_CASTED:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 4
-// CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK12-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK12-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
-// CHECK12-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK12-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK12-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK12-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
-// CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
-// CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
-// CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
-// CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// CHECK12: cond.true:
-// CHECK12-NEXT: br label [[COND_END:%.*]]
-// CHECK12: cond.false:
-// CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: br label [[COND_END]]
-// CHECK12: cond.end:
-// CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
-// CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK12: omp.inner.for.cond:
-// CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP6]], 100
-// CHECK12-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK12: omp.inner.for.body:
-// CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[F_ADDR]], align 4
-// CHECK12-NEXT: store i32 [[TMP9]], i32* [[F_CASTED]], align 4
-// CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[F_CASTED]], align 4
-// CHECK12-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
-// CHECK12-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP7]] to i8*
-// CHECK12-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 4
-// CHECK12-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
-// CHECK12-NEXT: [[TMP14:%.*]] = inttoptr i32 [[TMP8]] to i8*
-// CHECK12-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 4
-// CHECK12-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
-// CHECK12-NEXT: [[TMP16:%.*]] = bitcast [10 x [10 x i32]]* [[TMP0]] to i8*
-// CHECK12-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 4
-// CHECK12-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
-// CHECK12-NEXT: [[TMP18:%.*]] = inttoptr i32 [[TMP10]] to i8*
-// CHECK12-NEXT: store i8* [[TMP18]], i8** [[TMP17]], align 4
-// CHECK12-NEXT: [[TMP19:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
-// CHECK12-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, [10 x [10 x i32]]*, i32)* @__omp_outlined__7 to i8*), i8* null, i8** [[TMP19]], i32 4)
-// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK12: omp.inner.for.inc:
-// CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
-// CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK12-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK12-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
-// CHECK12-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK12-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK12-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
-// CHECK12-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP26]], 99
-// CHECK12-NEXT: br i1 [[CMP5]], label [[COND_TRUE6:%.*]], label [[COND_FALSE7:%.*]]
-// CHECK12: cond.true6:
-// CHECK12-NEXT: br label [[COND_END8:%.*]]
-// CHECK12: cond.false7:
-// CHECK12-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: br label [[COND_END8]]
-// CHECK12: cond.end8:
-// CHECK12-NEXT: [[COND9:%.*]] = phi i32 [ 99, [[COND_TRUE6]] ], [ [[TMP27]], [[COND_FALSE7]] ]
-// CHECK12-NEXT: store i32 [[COND9]], i32* [[DOTOMP_COMB_UB]], align 4
-// CHECK12-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
-// CHECK12-NEXT: store i32 [[TMP28]], i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]
-// CHECK12: omp.inner.for.end:
-// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK12: omp.loop.exit:
-// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
-// CHECK12-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK12-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0
-// CHECK12-NEXT: br i1 [[TMP30]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK12: .omp.final.then:
-// CHECK12-NEXT: store i32 10, i32* [[I]], align 4
-// CHECK12-NEXT: store i32 10, i32* [[J]], align 4
-// CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK12: .omp.final.done:
-// CHECK12-NEXT: ret void
-// CHECK12-LABEL: define {{[^@]+}}@__omp_outlined__7
-// CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
-// CHECK12-NEXT: entry:
-// CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
-// CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
-// CHECK12-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[K:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: [[J:%.*]] = alloca i32, align 4
-// CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
-// CHECK12-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK12-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK12-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK12-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
-// CHECK12-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
-// CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
-// CHECK12-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
-// CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
-// CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK12-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
-// CHECK12-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
-// CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK12-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
-// CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
-// CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
-// CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
-// CHECK12: omp.inner.for.cond:
-// CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
-// CHECK12-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP6]], [[TMP7]]
-// CHECK12-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// CHECK12: omp.inner.for.body:
-// CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP8]], 10
-// CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
-// CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4
-// CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[DIV2:%.*]] = sdiv i32 [[TMP10]], 10
-// CHECK12-NEXT: [[MUL3:%.*]] = mul nsw i32 [[DIV2]], 10
-// CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL3]]
-// CHECK12-NEXT: [[MUL4:%.*]] = mul nsw i32 [[SUB]], 1
-// CHECK12-NEXT: [[ADD5:%.*]] = add nsw i32 0, [[MUL4]]
-// CHECK12-NEXT: store i32 [[ADD5]], i32* [[J]], align 4
-// CHECK12-NEXT: store i32 10, i32* [[K]], align 4
-// CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
-// CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[J]], align 4
-// CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[F_ADDR]], align 4
-// CHECK12-NEXT: [[MUL6:%.*]] = mul nsw i32 [[TMP12]], [[TMP13]]
-// CHECK12-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP11]], [[MUL6]]
-// CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[K]], align 4
-// CHECK12-NEXT: [[ADD8:%.*]] = add nsw i32 [[ADD7]], [[TMP14]]
-// CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4
-// CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [10 x i32]], [10 x [10 x i32]]* [[TMP0]], i32 0, i32 [[TMP15]]
-// CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[J]], align 4
-// CHECK12-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP16]]
-// CHECK12-NEXT: store i32 [[ADD8]], i32* [[ARRAYIDX9]], align 4
-// CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
-// CHECK12: omp.body.continue:
-// CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
-// CHECK12: omp.inner.for.inc:
-// CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
-// CHECK12-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
-// CHECK12-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
-// CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]]
-// CHECK12: omp.inner.for.end:
-// CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
-// CHECK12: omp.loop.exit:
-// CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
-// CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
-// CHECK12-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
-// CHECK12-NEXT: br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
-// CHECK12: .omp.final.then:
-// CHECK12-NEXT: store i32 10, i32* [[I]], align 4
-// CHECK12-NEXT: store i32 10, i32* [[J]], align 4
-// CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]]
-// CHECK12: .omp.final.done:
-// CHECK12-NEXT: ret void
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l26
// CHECK1-SAME: (i64 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i64 noundef [[L:%.*]]) #[[ATTR0:[0-9]+]] {
// CHECK1-NEXT: entry:
@@ -9732,7 +411,7 @@ int bar(int n){
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l32
-// CHECK1-SAME: (i64 noundef [[N:%.*]], [1000 x i16]* noundef nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR5:[0-9]+]] {
+// CHECK1-SAME: (i64 noundef [[N:%.*]], [1000 x i16]* noundef nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR6:[0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
// CHECK1-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 8
@@ -10799,7 +1478,7 @@ int bar(int n){
//
//
// CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l32
-// CHECK2-SAME: (i32 noundef [[N:%.*]], [1000 x i16]* noundef nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR5:[0-9]+]] {
+// CHECK2-SAME: (i32 noundef [[N:%.*]], [1000 x i16]* noundef nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR6:[0-9]+]] {
// CHECK2-NEXT: entry:
// CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
// CHECK2-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
@@ -11837,7 +2516,7 @@ int bar(int n){
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l32
-// CHECK3-SAME: (i32 noundef [[N:%.*]], [1000 x i16]* noundef nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR5:[0-9]+]] {
+// CHECK3-SAME: (i32 noundef [[N:%.*]], [1000 x i16]* noundef nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR6:[0-9]+]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
// CHECK3-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
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