[PATCH] D120449: [RISCV][RVV] Add strict vfcvt intrinsics that have side effects for dynamically-set rounding mode

[ShihPo Hung via Phabricator via cfe-commits]

arcbbb planned changes to this revision.
arcbbb added a comment.
Herald added a subscriber: StephenFan.

I started a discussion on how RVV clang builtins interact with FENV_ACCESS in https://github.com/riscv-non-isa/rvv-intrinsic-doc/issues/147
I would drop this patch if those builtins are going to be independent of FENV.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D120449/new/

https://reviews.llvm.org/D120449