[PATCH] D121758: [clang-format] Add support for formatting Verilog code
Björn Schäpers via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Wed Mar 16 13:23:21 PDT 2022
HazardyKnusperkeks added a comment.
This is an enormous patch. @MyDeveloperDay mentioned different places which could be separate patches, but in addition could the adding of the verilog language be split up, so that one can comprehend the patch in a reasonable time?
================
Comment at: clang/lib/Format/UnwrappedLineParser.cpp:534
continue;
- parseBlock(/*MustBeDeclaration=*/false, /*AddLevels=*/1u,
- /*MunchSemi=*/true, /*UnindentWhitesmithBraces=*/false,
- CanContainBracedList,
+ parseBlock(/*Flags=*/CanContainBracedList * BLOCK_CAN_CONTAIN_BRACED_LIST,
+ /*AddLevels=*/1u,
----------------
MyDeveloperDay wrote:
> sstwcw wrote:
> > One of the people in charge said multiplying with a boolean might trigger warnings. Here I compiled with gcc. This version doesn't trigger warnings. The other way to do it, `CanContainBracedList ? BLOCK_CAN_CONTAIN_BRACED_LIST : 0`, triggers a warning that I shouldn't mix enum and integer.
> this is a hard no from me.
bool should only be used as boolean value, not as integral, even if c++ allows it.
================
Comment at: clang/lib/Format/UnwrappedLineParser.h:110
+ BLOCK_VERILOG_HIER = 0x10
+ };
+ IfStmtKind parseBlock(unsigned Flags = 0u, unsigned AddLevels = 1u,
----------------
MyDeveloperDay wrote:
> Oh! please no... I can't say how much of my life has been ruined by flags and the various `| || & && ~&` bugs, I'm sorry I'd rather have a structure and it be clear
struct would be better, yes.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D121758/new/
https://reviews.llvm.org/D121758
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