[PATCH] D121206: [AARCH64] ssbs should be enabled by default for cortex-x1c
Dave Green via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Tue Mar 8 04:55:44 PST 2022
dmgreen added inline comments.
================
Comment at: llvm/lib/Target/AArch64/AArch64.td:978
FeatureNEON, FeatureRCPC, FeaturePerfMon,
FeatureSPE, FeatureFullFP16, FeatureDotProd];
list<SubtargetFeature> X1C = [HasV8_2aOps, FeatureCrypto, FeatureFPARMv8,
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X1 and A77 missing SSBS too. Should they be added at the same time?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D121206/new/
https://reviews.llvm.org/D121206
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