[libunwind] 3fa2e66 - [libunwind] Further fix for 32-bit PowerPC processors without AltiVec
Brad Smith via cfe-commits
cfe-commits at lists.llvm.org
Mon Feb 21 12:31:39 PST 2022
Author: George Koehler
Date: 2022-02-21T15:31:23-05:00
New Revision: 3fa2e66c10aadac1d209afadba34d90c9bd95221
URL: https://github.com/llvm/llvm-project/commit/3fa2e66c10aadac1d209afadba34d90c9bd95221
DIFF: https://github.com/llvm/llvm-project/commit/3fa2e66c10aadac1d209afadba34d90c9bd95221.diff
LOG: [libunwind] Further fix for 32-bit PowerPC processors without AltiVec
https://reviews.llvm.org/D91906 did most of the work necessary to fix libunwind on
32-bit PowerPC processors without AltiVec, but there was one more piece necessary.
Reviewed By: luporl
Differential Revision: https://reviews.llvm.org/D120197
Added:
Modified:
libunwind/src/UnwindRegistersSave.S
Removed:
################################################################################
diff --git a/libunwind/src/UnwindRegistersSave.S b/libunwind/src/UnwindRegistersSave.S
index 9566bb0335fee..b39489235ce63 100644
--- a/libunwind/src/UnwindRegistersSave.S
+++ b/libunwind/src/UnwindRegistersSave.S
@@ -603,9 +603,11 @@ DEFINE_LIBUNWIND_FUNCTION(__unw_getcontext)
stw 30,128(3)
stw 31,132(3)
+#if defined(__ALTIVEC__)
// save VRSave register
mfspr 0, 256
stw 0, 156(3)
+#endif
// save CR registers
mfcr 0
stw 0, 136(3)
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