[clang] 9de4fc0 - [CUDA][SPIRV] Assign global address space to CUDA kernel arguments
Justin Lebar via cfe-commits
cfe-commits at lists.llvm.org
Thu Feb 17 09:38:57 PST 2022
Author: Shangwu Yao
Date: 2022-02-17T09:38:06-08:00
New Revision: 9de4fc0f2d3b60542956f7e5254951d049edeb1f
URL: https://github.com/llvm/llvm-project/commit/9de4fc0f2d3b60542956f7e5254951d049edeb1f
DIFF: https://github.com/llvm/llvm-project/commit/9de4fc0f2d3b60542956f7e5254951d049edeb1f.diff
LOG: [CUDA][SPIRV] Assign global address space to CUDA kernel arguments
This patch converts CUDA pointer kernel arguments with default address space to
CrossWorkGroup address space (__global in OpenCL). This is because Generic or
Function (OpenCL's private) is not supported as storage class for kernel pointer types.
Differential Revision: https://reviews.llvm.org/D119207
Added:
clang/test/CodeGenCUDASPIRV/kernel-argument.cu
Modified:
clang/lib/Basic/Targets/SPIR.h
clang/lib/CodeGen/TargetInfo.cpp
Removed:
################################################################################
diff --git a/clang/lib/Basic/Targets/SPIR.h b/clang/lib/Basic/Targets/SPIR.h
index a40d4b3ca27e1..08c49f018ac79 100644
--- a/clang/lib/Basic/Targets/SPIR.h
+++ b/clang/lib/Basic/Targets/SPIR.h
@@ -144,16 +144,16 @@ class LLVM_LIBRARY_VISIBILITY BaseSPIRTargetInfo : public TargetInfo {
// FIXME: SYCL specification considers unannotated pointers and references
// to be pointing to the generic address space. See section 5.9.3 of
// SYCL 2020 specification.
- // Currently, there is no way of representing SYCL's and HIP's default
+ // Currently, there is no way of representing SYCL's and HIP/CUDA's default
// address space language semantic along with the semantics of embedded C's
// default address space in the same address space map. Hence the map needs
// to be reset to allow mapping to the desired value of 'Default' entry for
- // SYCL and HIP.
+ // SYCL and HIP/CUDA.
setAddressSpaceMap(
/*DefaultIsGeneric=*/Opts.SYCLIsDevice ||
- // The address mapping from HIP language for device code is only defined
- // for SPIR-V.
- (getTriple().isSPIRV() && Opts.HIP && Opts.CUDAIsDevice));
+ // The address mapping from HIP/CUDA language for device code is only
+ // defined for SPIR-V.
+ (getTriple().isSPIRV() && Opts.CUDAIsDevice));
}
void setSupportedOpenCLOpts() override {
diff --git a/clang/lib/CodeGen/TargetInfo.cpp b/clang/lib/CodeGen/TargetInfo.cpp
index 3e1df744b2ad7..5a2991dfe1762 100644
--- a/clang/lib/CodeGen/TargetInfo.cpp
+++ b/clang/lib/CodeGen/TargetInfo.cpp
@@ -10320,10 +10320,10 @@ void CommonSPIRABIInfo::setCCs() {
}
ABIArgInfo SPIRVABIInfo::classifyKernelArgumentType(QualType Ty) const {
- if (getContext().getLangOpts().HIP) {
+ if (getContext().getLangOpts().CUDAIsDevice) {
// Coerce pointer arguments with default address space to CrossWorkGroup
- // pointers for HIPSPV. When the language mode is HIP, the SPIRTargetInfo
- // maps cuda_device to SPIR-V's CrossWorkGroup address space.
+ // pointers for HIPSPV/CUDASPV. When the language mode is HIP/CUDA, the
+ // SPIRTargetInfo maps cuda_device to SPIR-V's CrossWorkGroup address space.
llvm::Type *LTy = CGT.ConvertType(Ty);
auto DefaultAS = getContext().getTargetAddressSpace(LangAS::Default);
auto GlobalAS = getContext().getTargetAddressSpace(LangAS::cuda_device);
diff --git a/clang/test/CodeGenCUDASPIRV/kernel-argument.cu b/clang/test/CodeGenCUDASPIRV/kernel-argument.cu
new file mode 100644
index 0000000000000..0ccacffd12a5f
--- /dev/null
+++ b/clang/test/CodeGenCUDASPIRV/kernel-argument.cu
@@ -0,0 +1,17 @@
+// Tests CUDA kernel arguments get global address space when targetting SPIR-V.
+
+// REQUIRES: clang-driver
+
+// RUN: %clang -emit-llvm --cuda-device-only --offload=spirv32 \
+// RUN: -nocudalib -nocudainc %s -o %t.bc -c 2>&1
+// RUN: llvm-dis %t.bc -o %t.ll
+// RUN: FileCheck %s --input-file=%t.ll
+
+// RUN: %clang -emit-llvm --cuda-device-only --offload=spirv64 \
+// RUN: -nocudalib -nocudainc %s -o %t.bc -c 2>&1
+// RUN: llvm-dis %t.bc -o %t.ll
+// RUN: FileCheck %s --input-file=%t.ll
+
+// CHECK: define spir_kernel void @_Z6kernelPi(i32 addrspace(1)* noundef %output.coerce)
+
+__attribute__((global)) void kernel(int* output) { *output = 1; }
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