[PATCH] D119720: [ARM] Pass for Cortex-A57 and Cortex-A72 Fused AES Erratum

[Sam Elliott via Phabricator via cfe-commits]

lenary added a comment.

@kparzysz I've tagged you due to the changes in RDFGraph, which I believe you are the owner of. The asserts are hit in `llvm/test/CodeGen/ARM/inlineasm-error-t-toofewregs.ll` - the Register Allocator Chokes on the test due to not having enough registers for the inline assembly. `llc` then reports the error, but continues running passes (including this one), which then core dumps on the asserts I've removed (The first one hit is in `DataFlowGraph::buildStmt`). When I run the same testcase with `-verify-machineinstrs`, there is no verification error, but the verifier seems to have decided that analysing physical reg liveness is too hard (see e.g. `MachineVerifier.cpp` line 2990). I haven't worked out how else to prevent this pass running if the register allocation is known to be wrong, without analysing every instruction before building the RDFGraph. I wasn't sure the right approach, so I wanted to post the patch and then discuss it, rather than the other way around (so you can see the testcase).


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D119720/new/

https://reviews.llvm.org/D119720