[PATCH] D119688: [RISCV] Add the passthru operand for vmv.vv/vmv.vx/vfmv.vf IR intrinsics.

Zakk Chen via Phabricator via cfe-commits cfe-commits at lists.llvm.org
Sun Feb 13 21:04:01 PST 2022


khchen created this revision.
khchen added reviewers: craig.topper, rogfer01, frasercrmck, kito-cheng, arcbbb, monkchiang, eopXD.
Herald added subscribers: VincentWu, luke957, achieveartificialintelligence, vkmr, evandro, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, edward-jones, zzheng, jrtc27, niosHD, sabuasal, simoncook, johnrusso, rbar, asb, hiraditya, qcolombet.
khchen requested review of this revision.
Herald added subscribers: llvm-commits, cfe-commits, pcwang-thead, MaskRay.
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Add the passthru operand for
VMV_V_X_VL, VFMV_V_F_VL and SPLAT_VECTOR_SPLIT_I64_VL also.

The goal is support tail and mask policy in RVV builtins.
We focus on IR part first.
If the passthru operand is undef, we use tail agnostic, otherwise
use tail undisturbed.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D119688

Files:
  clang/include/clang/Basic/riscv_vector.td
  clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vmv.c
  clang/test/CodeGen/RISCV/rvv-intrinsics/vfmv.c
  clang/test/CodeGen/RISCV/rvv-intrinsics/vmv.c
  llvm/include/llvm/IR/IntrinsicsRISCV.td
  llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/lib/Target/RISCV/RISCVISelLowering.h
  llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
  llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
  llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
  llvm/test/CodeGen/RISCV/rvv/setcc-integer-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/setcc-integer-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/unmasked-tu.ll
  llvm/test/CodeGen/RISCV/rvv/vfmv.v.f.ll
  llvm/test/CodeGen/RISCV/rvv/vmv.v.v-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vmv.v.v-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vmv.v.x-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vmv.v.x-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll
  llvm/test/CodeGen/RISCV/spill-fpr-scalar.ll

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