[PATCH] D93298: [RISCV] add the MC layer support of Zfinx extension

[Jim Lin via Phabricator via cfe-commits]

Jim added inline comments.


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Comment at: llvm/lib/Target/RISCV/RISCVRegisterInfo.td:555
+def GPRF64  : RegisterClass<"RISCV", [f64], 64, (add GPR)>;
+def GPRPF64 : RegisterClass<"RISCV", [f64], 64, (add
+    X10_PD, X12_PD, X14_PD, X16_PD,
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Is XLenRI correct for GPRPF64? RV32 has size 32.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D93298/new/

https://reviews.llvm.org/D93298