[PATCH] D117795: [AArch64] Add some missing strict FP vector lowering
Dave Green via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Tue Feb 1 02:17:28 PST 2022
dmgreen added inline comments.
================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:1484
+ // of the vector comparison instructions.
+ setOperationAction(ISD::STRICT_FSETCCS, VT, Expand);
+ // FIXME: We could potentially make use of the vector comparison instructions
----------------
Can you split this into a separate patch? I know I sound like a broken record, but it doesn't seem to be related to the converts below.
Also pre-committing as much of the test that works as possible would cut it down from this patch quite a bit.
================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:3419
+ {NewVT, MVT::Other},
+ {Op.getOperand(0), Op.getOperand(1)});
+ return DAG.getNode(Op.getOpcode(), dl, {VT, MVT::Other},
----------------
Some formatting apparently needs fixing up.
================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:3672
+ In = DAG.getNode(Opc, dl, {CastVT, MVT::Other},
+ {Op.getOperand(0), Op.getOperand(1)});
+ return DAG.getNode(
----------------
Op.getOperand(1) -> In?
================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:3694
+ if (VT.getVectorNumElements() == 1) {
+ SDLoc dl(Op);
+ SDValue Extract = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl,
----------------
dl is already defined.
================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:3697
+ InVT.getScalarType(),
+ Op.getOperand(IsStrict ? 1 : 0),
+ DAG.getConstant(0, dl, MVT::i64));
----------------
Op.getOperand(IsStrict ? 1 : 0) -> In?
================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:3700
+ EVT ScalarVT = VT.getScalarType();
+ SDValue ScalarCvt;
+ if (IsStrict)
----------------
This isn't used anywhere
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D117795/new/
https://reviews.llvm.org/D117795
More information about the cfe-commits
mailing list